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1. 发明申请

US20060084023A1 METHOD OF AND AUXILIARY CLEANER FOR USE IN CLEANING A DIFFUSION FURNACE OF SEMICONDUCTOR MANUFACTURING EQUIPMENT 有权
标题翻译：用于清洁半导体制造设备的扩散炉的方法和辅助清洁剂
公开(公告)号：US20060084023A1
公开(公告)日：2006-04-20
申请号：US11197346
申请日：2005-08-05
申请人： Jung-Nam Kim
发明人： Jung-Nam Kim
IPC分类号： F27B5/04
CPC分类号： F27B17/0025 , C23C16/4405 , C30B31/10
摘要： A diffusion furnace of semiconductor manufacturing equipment is cleaned efficiently with a cleaning gas (ClF3) by using an auxiliary cleaner. The auxiliary cleaner is inserted into an inner tube of the wafer diffusion furnace. The auxiliary cleaner has a cylindrical body that occupies a central region of the interior of the furnace but is spaced apart from an inner wall surface of the inner tube. Accordingly, the gas is confined to a peripheral region adjacent the inner wall surface. As a result, a relatively small amount of the cleaning gas is comsumed during the cleaning process.
摘要翻译：通过使用辅助清洁器，通过清洁气体（ClF 3 3）有效地清洁半导体制造设备的扩散炉。辅助清洁剂插入晶片扩散炉的内管中。辅助清洁器具有圆柱体，其占据炉内部的中心区域，但与内管的内壁表面间隔开。因此，气体被限制在与内壁面相邻的周边区域。结果，在清洁过程中消耗相对少量的清洁气体。

2. 发明申请

US20070024305A1 Apparatuses for inspecting pogo pins of an electrical die sorting system and a method for performing the same 失效
标题翻译：用于检查电动分模系统的弹簧销的装置及其执行方法
公开(公告)号：US20070024305A1
公开(公告)日：2007-02-01
申请号：US11490120
申请日：2006-07-21
申请人： Jung-Nam Kim
发明人： Jung-Nam Kim
IPC分类号： G01R31/02
CPC分类号： G01R1/06794
摘要： Apparatuses for inspecting pogo pins of an electrical die sorting (EDS) system are provided and a method for performing the same are provided. Apparatuses for inspecting pogo pins that delivers electrical signals between a tester and a probe when dies on a substrate are electrically tested are also provided. The apparatuses may include a lower plate, an upper plate and/or a sensing unit. The lower plate may be positioned under a pogo block including the pogo pins. The lower plate may include a conductive layer electrically connected to lower end portions of the pogo pins. The upper plate may be positioned over the pogo block. The upper plate may include conductive plugs corresponding to upper portions of the pogo pins. The sensing unit, for generating signals, may be coupled to an electrical contact between the conductive plugs and the pogo pins.
摘要翻译：提供了用于检查电动分模（EDS）系统的弹簧销的装置，并且提供了用于执行其的方法。还提供了用于检查在衬底上模具时在测试仪和探针之间传递电信号的弹簧针的装置。这些装置可以包括下板，上板和/或感测单元。下板可以位于包括弹簧销的弹簧块的下方。下板可以包括电连接到弹簧销的下端部分的导电层。上板可以位于pogo块上方。上板可以包括与弹簧销的上部相对应的导电插塞。用于产生信号的感测单元可以耦合到导电插头和弹簧销之间的电接触。

3. 发明授权

US08692223B2 Resistance variable memory device including nano particles and method for fabricating the same 有权
标题翻译：包括纳米颗粒的电阻可变存储器件及其制造方法
公开(公告)号：US08692223B2
公开(公告)日：2014-04-08
申请号：US13596807
申请日：2012-08-28
申请人： Ji-Won Moon , Moon-Sig Joo , Sung-Hoon Lee , Jung-Nam Kim
发明人： Ji-Won Moon , Moon-Sig Joo , Sung-Hoon Lee , Jung-Nam Kim
IPC分类号： H01L47/00
CPC分类号： H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/146 , H01L45/147 , H01L45/1608 , H01L45/1641
摘要： A resistance variable memory device includes: a first electrode; a second electrode; a resistance variable layer interposed between the first electrode and the second electrode; and nano particles that are disposed in the resistance variable layer and have a lower dielectric constant than the resistance variable layer.
摘要翻译：电阻可变存储器件包括：第一电极; 第二电极; 介于所述第一电极和所述第二电极之间的电阻变化层; 和纳米颗粒，其设置在电阻变化层中并具有比电阻变化层低的介电常数。

4. 发明授权

US07466153B2 Apparatuses for inspecting pogo pins of an electrical die sorting system and a method for performing the same 失效
标题翻译：用于检查电动分模系统的弹簧销的装置及其执行方法
公开(公告)号：US07466153B2
公开(公告)日：2008-12-16
申请号：US11490120
申请日：2006-07-21
申请人： Jung-Nam Kim
发明人： Jung-Nam Kim
IPC分类号： G01R31/02
CPC分类号： G01R1/06794
摘要： Apparatuses for inspecting pogo pins of an electrical die sorting (EDS) system are provided and a method for performing the same are provided. Apparatuses for inspecting pogo pins that delivers electrical signals between a tester and a probe when dies on a substrate are electrically tested are also provided. The apparatuses may include a lower plate, an upper plate and/or a sensing unit. The lower plate may be positioned under a pogo block including the pogo pins. The lower plate may include a conductive layer electrically connected to lower end portions of the pogo pins. The upper plate may be positioned over the pogo block. The upper plate may include conductive plugs corresponding to upper portions of the pogo pins. The sensing unit, for generating signals, may be coupled to an electrical contact between the conductive plugs and the pogo pins.
摘要翻译：提供了用于检查电动分模（EDS）系统的弹簧销的装置，并且提供了用于执行其的方法。还提供了用于检查在衬底上模具时在测试仪和探针之间传递电信号的弹簧针的装置。这些装置可以包括下板，上板和/或感测单元。下板可以位于包括弹簧销的弹簧块的下方。下板可以包括电连接到弹簧销的下端部分的导电层。上板可以位于pogo块上方。上板可以包括与弹簧销的上部相对应的导电插塞。用于产生信号的感测单元可以耦合到导电插头和弹簧销之间的电接触。

5. 发明申请

US20060141691A1 Method for fabricating semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20060141691A1
公开(公告)日：2006-06-29
申请号：US11284565
申请日：2005-11-21
申请人： Jung-Nam Kim
发明人： Jung-Nam Kim
IPC分类号： H01L21/336
CPC分类号： H01L27/1052 , H01L27/105 , H01L27/10876 , H01L27/10894
摘要： A method for fabricating a semiconductor memory device is provided. The method includes: forming a trench in a portion of a substrate, defined as a cell region; forming a first polysilicon layer doped with N-type impurities on regions where N-type metal-oxide-semiconductor (MOS) transistors are to be formed in the cell region and the periphery region; forming a second polysilicon layer doped with P-type impurities on an area where a P-type MOS transistor is to be formed; forming a gate metal layer over the first and the second polysilicon layers; forming a gate hard mask layer on the gate metal layer; and patterning the gate hard mask layer, the gate metal layer, and the first and the second polysilicon layers to form gate patterns for the N-type MOS transistors in the cell region and the periphery region, and the P-type MOS transistor in the periphery region.
摘要翻译：提供一种制造半导体存储器件的方法。该方法包括：在被定义为单元区域的衬底的一部分中形成沟槽; 在单元区域和外围区域中形成N型金属氧化物半导体（MOS）晶体管的区域上形成掺杂有N型杂质的第一多晶硅层; 在要形成P型MOS晶体管的区域上形成掺杂有P型杂质的第二多晶硅层; 在第一和第二多晶硅层上形成栅极金属层; 在栅极金属层上形成栅极硬掩模层; 以及图案化栅极硬掩模层，栅极金属层以及第一和第二多晶硅层，以在单元区域和外围区域中形成用于N型MOS晶体管的栅极图案，并且在P型MOS晶体管周边地区。

6. 发明申请

US20130168632A1 RESISTANCE VARIABLE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：电阻可变存储器件及其制造方法
公开(公告)号：US20130168632A1
公开(公告)日：2013-07-04
申请号：US13596807
申请日：2012-08-28
申请人： Ji-Won MOON , Moon-Sig JOO , Sung-Hoon LEE , Jung-Nam Kim
发明人： Ji-Won MOON , Moon-Sig JOO , Sung-Hoon LEE , Jung-Nam Kim
IPC分类号： H01L45/00 , H01L21/02 , B82Y10/00
CPC分类号： H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/146 , H01L45/147 , H01L45/1608 , H01L45/1641
摘要： A resistance variable memory device includes: a first electrode; a second electrode; a resistance variable layer interposed between the first electrode and the second electrode; and nano particles that are disposed in the resistance variable layer and have a lower dielectric constant than the resistance variable layer.
摘要翻译：电阻可变存储器件包括：第一电极; 第二电极; 介于所述第一电极和所述第二电极之间的电阻变化层; 和纳米颗粒，其设置在电阻变化层中并具有比电阻变化层低的介电常数。

7. 发明授权

US07218097B2 Wafer test equipment and method of aligning test equipment 失效
标题翻译：晶圆试验设备和对准试验设备的方法
公开(公告)号：US07218097B2
公开(公告)日：2007-05-15
申请号：US11104337
申请日：2005-04-12
申请人： Jung-Nam Kim , Young-Jong Kim
发明人： Jung-Nam Kim , Young-Jong Kim
IPC分类号： G01R31/02
CPC分类号： G01R31/2891
摘要： Wafer test equipment includes a probe station having a wafer chuck for supporting a wafer, a test head disposed on the probe station, a manipulator for moving the test head to and from an upper surface of the probe station, and an alignment monitoring member for monitoring an alignment of the test head docked to the probe station.
摘要翻译：晶片测试设备包括具有用于支撑晶片的晶片卡盘的探针台，设置在探测台上的测试头，用于将测试头移动到探测台的上表面和从探测台的上表面移动的操纵器，以及用于监测的对准监视构件测试头对准到探测台的对准。

8. 发明授权

US07151386B2 Apparatus for testing integrated circuit chips 有权
标题翻译：集成电路芯片测试装置
公开(公告)号：US07151386B2
公开(公告)日：2006-12-19
申请号：US10832285
申请日：2004-04-27
申请人： Jung-Nam Kim
发明人： Jung-Nam Kim
IPC分类号： G01R31/02 , G01R31/26
CPC分类号： G01R31/2886 , G01R3/00
摘要： A test apparatus, for testing electric properties of an integrated circuit, may include: a housing; a chuck on which an integrated circuit is placed as an object of the testing, the chuck being disposed in the housing; a tester part, having a probe needle, to test electric properties of the object, the tester part being attached to the housing; and a cleaning part to clean the probe needle, the cleaning part being disposed in the housing, and the cleaning part including a supporter, a mounting stand removably/attachably coupled to the supporter, and a polishing pad attached to the mounting stand to polish the probe needle.
摘要翻译：用于测试集成电路的电性能的测试装置可以包括：壳体; 作为测试对象放置集成电路的卡盘，卡盘设置在壳体中; 测试器部件，具有探针，用于测试所述物体的电特性，所述测试器部件附接到所述壳体; 以及用于清洁探针的清洁部件，所述清洁部件设置在所述壳体中，并且所述清洁部件包括支撑件，可拆卸地/可附接地联接到所述支撑件的安装支架和附接到所述安装支架的抛光垫，探针。

9. 发明申请

US20050264279A1 Wafer test equipment and method of aligning test equipment 失效
标题翻译：晶圆试验设备和对准试验设备的方法
公开(公告)号：US20050264279A1
公开(公告)日：2005-12-01
申请号：US11104337
申请日：2005-04-12
申请人： Jung-Nam Kim , Young-Jong Kim
发明人： Jung-Nam Kim , Young-Jong Kim
IPC分类号： H01L21/66 , G01R31/02 , G01R31/28
CPC分类号： G01R31/2891
摘要： Wafer test equipment comprises a probe station having a wafer chuck for supporting a wafer, a test head disposed on the probe station, a manipulator for moving the test head to and from an upper surface of the probe station, and an alignment monitoring member for monitoring an alignment of the test head docked to the probe station.
摘要翻译：晶片测试设备包括具有用于支撑晶片的晶片卡盘的探针台，设置在探测台上的测试头，用于将测试头移动到探测台的上表面和从测头的上表面移动的操纵器，以及用于监视的对准监视构件测试头对准到探测台的对准。

10. 发明申请

US20080011231A1 Applicator for use in semiconductor manufacturing apparatus 审中-公开
标题翻译：半导体制造装置中使用的涂布器
公开(公告)号：US20080011231A1
公开(公告)日：2008-01-17
申请号：US11635746
申请日：2006-12-07
申请人： Jung-Nam Kim
发明人： Jung-Nam Kim
IPC分类号： C23C16/00
CPC分类号： H01J37/32229 , H01J37/32192
摘要： An applicator for use in a semiconductor manufacturing apparatus is provided, which makes it possible to reuse a relatively expensive copper pipe coil component of such an apparatus by providing a design that facilitates attachment/detachment of the copper pipe coil when replacing the quartz tube component of the applicator. The applicator of this invention includes a quartz tube having a spiral rail, an upper head portion inserted into an upper part of the quartz tube, a lower head portion inserted into a lower part of the quartz tube, and a copper pipe coil that removably mates with the spiral rail of the quartz tube through a rotation operation. In one embodiment of the apparatus, a copper pipe coil is formed as part of a structure together with an upper head portion and a lower head portion sized to mate with the respective ends of the quartz tube, then the copper pipe coil is installed and engaged with the quartz tube by a rotation along the spiral rail formed along the exterior of the quartz tube, without the use of adhesive. Consequently, the copper pipe coil does not have to be replaced when the quartz tube is etched and needs to be exchanged. Instead, only the quartz tube needs to be replaced, thereby reducing an important equipment cost.
摘要翻译：提供一种用于半导体制造装置的涂布器，其可以通过提供一种设计来重新利用这种装置的相对昂贵的铜管线圈部件，该设计便于在更换石英管部件时更换铜管线圈的附接/ 涂抹器。本发明的涂抹器包括石英管，其具有螺旋形导轨，插入石英管的上部的上部头部，插入石英管的下部的下部头部，以及可拆卸地配合的铜管线圈与石英管的螺旋轨道通过旋转操作。在该装置的一个实施例中，铜管线圈与上部头部和下部头部一起形成为结构的一部分，上部头部和下部头部的尺寸设计成与石英管的相应端部配合，然后将铜管线圈安装和接合石英管沿着沿着石英管的外部形成的螺旋形轨道旋转，而不使用粘合剂。因此，当石英管被蚀刻并且需要更换时，不需要更换铜管线圈。相反，只需要更换石英管，从而降低重要的设备成本。

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