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1. 发明授权

US09275904B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09275904B2
公开(公告)日：2016-03-01
申请号：US12614991
申请日：2009-11-09
申请人： Sung-Jin Whang , Moon-Sig Joo , Yong-Seok Eun , Kwon Hong , Bo-Min Seo , Kyoung-Eun Chang , Seung-Woo Shin
发明人： Sung-Jin Whang , Moon-Sig Joo , Yong-Seok Eun , Kwon Hong , Bo-Min Seo , Kyoung-Eun Chang , Seung-Woo Shin
IPC分类号： H01L21/8234 , H01L21/28 , H01L27/108 , H01L27/115 , H01L29/423 , H01L29/49
CPC分类号： H01L21/823443 , H01L21/28052 , H01L21/28114 , H01L21/28518 , H01L21/2855 , H01L21/28556 , H01L21/31051 , H01L21/31111 , H01L21/32139 , H01L27/10873 , H01L27/11521 , H01L27/11568 , H01L29/42376 , H01L29/4933
摘要： A method for fabricating a semiconductor device, including forming gate patterns over a substrate, forming conductive layer covering top and sidewalls of each gate pattern, forming a metal layer for a silicidation process over the conductive layer, and silicifying the conductive layer and the gate patterns using the metal layer.
摘要翻译：一种制造半导体器件的方法，包括在衬底上形成栅极图案，形成覆盖每个栅极图案的顶部和侧壁的导电层，在导电层上形成用于硅化工艺的金属层，以及硅化导电层和栅极图案使用金属层。

2. 发明授权

US08294200B2 Non-volatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US08294200B2
公开(公告)日：2012-10-23
申请号：US13089865
申请日：2011-04-19
申请人： Moon Sig Joo , Seung Ho Pyi , Yong Soo Kim
发明人： Moon Sig Joo , Seung Ho Pyi , Yong Soo Kim
IPC分类号： H01L29/792
CPC分类号： H01L21/28282
摘要： A non-volatile memory device includes a substrate, a tunneling layer over the substrate, a charge trapping layer including a nitride layer and a silicon boron nitride layer over the tunneling layer, and a blocking layer over the charge trapping layer, and a control gate electrode arranged on the blocking layer.
摘要翻译：非易失性存储器件包括衬底，衬底上的隧道层，在隧穿层上方包括氮化物层和氮化硼氮化物层的电荷俘获层，以及电荷俘获层上的阻挡层，以及控制栅极电极布置在阻挡层上。

3. 发明授权

US08048743B2 Method for fabricating vertical channel type nonvolatile memory device 有权
标题翻译：垂直通道型非易失性存储器件的制造方法
公开(公告)号：US08048743B2
公开(公告)日：2011-11-01
申请号：US12493439
申请日：2009-06-29
申请人： Ki-Hong Lee , Moon-Sig Joo , Kwon Hong , Sun-Hwan Hwang
发明人： Ki-Hong Lee , Moon-Sig Joo , Kwon Hong , Sun-Hwan Hwang
IPC分类号： H01L21/336
CPC分类号： H01L29/66833 , H01L21/2236 , H01L27/11578 , H01L27/11582
摘要： A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer.
摘要翻译：一种用于制造垂直通道型非易失性存储器件的方法，包括：在衬底上交替堆叠多个层间绝缘层和多个栅电极导电层; 蚀刻层间绝缘层和栅电极导电层以形成暴露衬底的沟槽; 在包括沟道沟槽的所得结构上形成未掺杂的第一沟道层; 通过等离子体掺杂工艺对具有杂质的第一沟道层进行掺杂; 以及用第二通道层填充沟槽。

4. 发明授权

US07948025B2 Non-volatile memory device having charge trapping layer and method for fabricating the same 有权
标题翻译：具有电荷捕获层的非易失性存储器件及其制造方法
公开(公告)号：US07948025B2
公开(公告)日：2011-05-24
申请号：US11770985
申请日：2007-06-29
申请人： Moon Sig Joo , Seung Ho Pyi , Yong Soo Kim
发明人： Moon Sig Joo , Seung Ho Pyi , Yong Soo Kim
IPC分类号： H01L29/788 , H01L29/792
CPC分类号： H01L21/28282
摘要： A non-volatile memory device includes a substrate, a tunneling layer over the substrate, a charge trapping layer including a nitride layer and a silicon boron nitride layer over the tunneling layer, and a blocking layer over the charge trapping layer, and a control gate electrode arranged on the blocking layer.
摘要翻译：非易失性存储器件包括衬底，衬底上的隧道层，在隧穿层上方包括氮化物层和氮化硼氮化物层的电荷俘获层，以及电荷俘获层上的阻挡层，以及控制栅极电极布置在阻挡层上。

5. 发明授权

US07824992B2 Method of fabricating non-volatile memory device 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US07824992B2
公开(公告)日：2010-11-02
申请号：US12345785
申请日：2008-12-30
申请人： Moon Sig Joo , Heung Jae Cho , Yong Soo Kim , Won Joon Choi
发明人： Moon Sig Joo , Heung Jae Cho , Yong Soo Kim , Won Joon Choi
IPC分类号： H01L21/4763
CPC分类号： H01L21/28273 , H01L21/3145 , H01L21/31645 , H01L21/76224 , H01L29/513 , H01L29/518 , H01L29/7881
摘要： A method of fabricating a non-volatile memory device includes: forming a tunnel insulation layer pattern and a floating gate electrode layer pattern over a semiconductor substrate; forming an isolation trench by etching an exposed portion of the semiconductor substrate so that the isolation trench is aligned with the tunnel insulation layer pattern and the floating gate electrode layer pattern; forming an isolation layer by filling the isolation trench with a filling insulation layer; forming a hafnium-rich hafnium silicon oxide layer over the isolation layer and the floating gate electrode layer pattern; forming a hafnium-rich hafnium silicon oxynitride layer by carrying out a first nitridation on the hafnium-rich hafnium silicon oxide layer; forming a silicon-rich hafnium silicon oxide layer over the hafnium-rich hafnium silicon oxynitride layer; forming a silicon-rich hafnium silicon oxynitride layer by carrying out a second nitridation on the silicon-rich hafnium silicon oxide layer; and forming a control gate electrode layer over the silicon-rich hafnium silicon oxynitride layer.
摘要翻译：制造非易失性存储器件的方法包括：在半导体衬底上形成隧道绝缘层图案和浮栅电极层图案; 通过蚀刻半导体衬底的暴露部分形成隔离沟槽，使得隔离沟槽与隧道绝缘层图案和浮栅电极层图案对准; 通过用填充绝缘层填充隔离沟槽来形成隔离层; 在隔离层和浮栅电极层图案上形成富铪铪氧化硅层; 通过在富铪铪氧化硅层上进行第一次氮化，形成富铪铪硅氮化物层; 在富铪铪硅氮化物层上形成富硅铪氧化硅层; 通过在富硅铪氧化硅层上进行第二次氮化，形成富硅铪硅氮氧化物层; 以及在所述富硅铪硅氮氧化物层上形成控制栅电极层。

6. 发明申请

US20080230830A1 NONVOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 失效
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20080230830A1
公开(公告)日：2008-09-25
申请号：US12052914
申请日：2008-03-21
申请人： Se Jun KIM , Eun Seok CHOI , Kyoung Hwan PARK , Hyun Seung YOO , Myung Shik LEE , Young Ok HONG , Jung Ryul AHN , Yong Top KIM , Kyung Pil HWANG , Won Sic WOO , Jae Young PARK , Ki Hong LEE , Ki Seon PARK , Moon Sig JOO
发明人： Se Jun KIM , Eun Seok CHOI , Kyoung Hwan PARK , Hyun Seung YOO , Myung Shik LEE , Young Ok HONG , Jung Ryul AHN , Yong Top KIM , Kyung Pil HWANG , Won Sic WOO , Jae Young PARK , Ki Hong LEE , Ki Seon PARK , Moon Sig JOO
IPC分类号： H01L29/792 , H01L21/28 , H01L21/762
CPC分类号： H01L29/513 , H01L27/105 , H01L27/11568 , H01L27/11573 , H01L29/792
摘要： A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.
摘要翻译：提供了一种非易失性存储器件及其制造方法，以防止存储在电荷陷阱层中的电荷移动到相邻存储器单元。制造非易失性存储器件的方法包括在半导体衬底上形成第一电介质层，其中有源区由隔离层限定，在第一电介质层上形成电荷陷阱层，去除第一介电层和电荷陷阱层在隔离层上，在包括电荷陷阱层的隔离层上形成第二电介质层，并在第二介电层上形成导电层。

7. 发明授权

US06365467B1 Method of forming gate oxide layer in semiconductor device 失效
标题翻译：在半导体器件中形成栅氧化层的方法
公开(公告)号：US06365467B1
公开(公告)日：2002-04-02
申请号：US09436780
申请日：1999-11-08
申请人： Moon Sig Joo
发明人： Moon Sig Joo
IPC分类号： H01L218238
CPC分类号： H01L21/28194 , H01L21/28202 , H01L21/3143 , H01L21/3144 , H01L29/513 , H01L29/517 , H01L29/518
摘要： A method of forming a gate oxide layer in a s conductor device which can obtain low leakage current and high reliability with obtaining effective thickness of 40 Å or lees, is disclosed. According to the present invention, a NO-oxynitride layer as the bottom oxide layer is formed on a semiconductor substrate and a tantalum oxide layer as the medium oxide layer is thereon. The oxide layer is then formed on the tantalum oxide layer and the substrate is thermal-treated under N2O gas atmosphere.
摘要翻译：公开了一种形成作为导体器件的栅极氧化物层的方法，其可以获得低漏电流和高可靠性，获得有效厚度的或es，。根据本发明，将作为底部氧化物层的NO-氮氧化物层形成在半导体衬底上，其氧化钽层作为介质氧化物层。然后在氧化钽层上形成氧化物层，并在N2O气体气氛下对衬底进行热处理。

8. 发明授权

US08692223B2 Resistance variable memory device including nano particles and method for fabricating the same 有权
标题翻译：包括纳米颗粒的电阻可变存储器件及其制造方法
公开(公告)号：US08692223B2
公开(公告)日：2014-04-08
申请号：US13596807
申请日：2012-08-28
申请人： Ji-Won Moon , Moon-Sig Joo , Sung-Hoon Lee , Jung-Nam Kim
发明人： Ji-Won Moon , Moon-Sig Joo , Sung-Hoon Lee , Jung-Nam Kim
IPC分类号： H01L47/00
CPC分类号： H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/146 , H01L45/147 , H01L45/1608 , H01L45/1641
摘要： A resistance variable memory device includes: a first electrode; a second electrode; a resistance variable layer interposed between the first electrode and the second electrode; and nano particles that are disposed in the resistance variable layer and have a lower dielectric constant than the resistance variable layer.
摘要翻译：电阻可变存储器件包括：第一电极; 第二电极; 介于所述第一电极和所述第二电极之间的电阻变化层; 和纳米颗粒，其设置在电阻变化层中并具有比电阻变化层低的介电常数。

9. 发明授权

US08399323B2 Method for fabricating vertical channel type nonvolatile memory device 有权
标题翻译：垂直通道型非易失性存储器件的制造方法
公开(公告)号：US08399323B2
公开(公告)日：2013-03-19
申请号：US13244247
申请日：2011-09-23
申请人： Ki-Hong Lee , Moon-Sig Joo , Kwon Hong , Sun-Hwan Hwang
发明人： Ki-Hong Lee , Moon-Sig Joo , Kwon Hong , Sun-Hwan Hwang
IPC分类号： H01L21/336
CPC分类号： H01L29/66833 , H01L21/2236 , H01L27/11578 , H01L27/11582
摘要： A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer.
摘要翻译：一种用于制造垂直通道型非易失性存储器件的方法，包括：在衬底上交替堆叠多个层间绝缘层和多个栅电极导电层; 蚀刻层间绝缘层和栅电极导电层以形成暴露衬底的沟槽; 在包括沟道沟槽的所得结构上形成未掺杂的第一沟道层; 通过等离子体掺杂工艺对具有杂质的第一沟道层进行掺杂; 以及用第二通道层填充沟槽。

10. 发明申请

US20120021574A1 METHOD FOR FABRICATING VERTICAL CHANNEL TYPE NONVOLATILE MEMORY DEVICE 有权
标题翻译：用于制造垂直通道型非易失性存储器件的方法
公开(公告)号：US20120021574A1
公开(公告)日：2012-01-26
申请号：US13244247
申请日：2011-09-23
申请人： Ki-Hong LEE , Moon-Sig Joo , Kwon Hong , Sun-Hwan Hwang
发明人： Ki-Hong LEE , Moon-Sig Joo , Kwon Hong , Sun-Hwan Hwang
IPC分类号： H01L21/336
CPC分类号： H01L29/66833 , H01L21/2236 , H01L27/11578 , H01L27/11582
摘要： A method for fabricating a vertical channel type nonvolatile memory device includes: stacking a plurality of interlayer insulating layers and a plurality of gate electrode conductive layers alternately over a substrate; etching the interlayer insulating layers and the gate electrode conductive layers to form a channel trench exposing the substrate; forming an undoped first channel layer over the resulting structure including the channel trench; doping the first channel layer with impurities through a plasma doping process; and filling the channel trench with a second channel layer.
摘要翻译：一种用于制造垂直通道型非易失性存储器件的方法，包括：在衬底上交替堆叠多个层间绝缘层和多个栅电极导电层; 蚀刻层间绝缘层和栅电极导电层以形成暴露衬底的沟槽; 在包括沟道沟槽的所得结构上形成未掺杂的第一沟道层; 通过等离子体掺杂工艺对具有杂质的第一沟道层进行掺杂; 以及用第二通道层填充沟槽。

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