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1. 发明授权

US07605473B2 Nonvolatile memory devices 失效
标题翻译：非易失性存储器件
公开(公告)号：US07605473B2
公开(公告)日：2009-10-20
申请号：US11403964
申请日：2006-04-13
申请人： Jung-Dal Choi , Yun-Seung Shin , Jong-Sun Sel
发明人： Jung-Dal Choi , Yun-Seung Shin , Jong-Sun Sel
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11531
摘要： Methods of fabricating nonvolatile memory devices are provided. An isolation layer is formed on a substrate. The substrate has a memory region and a well contact region and the isolation layer defines an active region of the substrate. A gate insulating layer is formed on the active region. The gate insulating layer is patterned to define an opening therein. The opening exposes at least a portion of the well contact region of the substrate and acts as a charge pathway for charges generated during a subsequent etch of the isolation layer. Related memory device are also provided.
摘要翻译：提供制造非易失性存储器件的方法。在基板上形成隔离层。衬底具有存储区和阱接触区，并且隔离层限定衬底的有源区。在有源区上形成栅极绝缘层。栅极绝缘层被图案化以在其中限定开口。开口暴露衬底的阱接触区域的至少一部分，并且充当用于隔离层的后续蚀刻期间产生的电荷的电荷路径。还提供了相关的存储器件。

2. 发明申请

US20090325374A1 Methods of Fabricating Nonvolatile Memory Devices 审中-公开
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US20090325374A1
公开(公告)日：2009-12-31
申请号：US12556757
申请日：2009-09-10
申请人： Jung-Dal Choi , Yun-Seung Shin , Jong-Sun Sel
发明人： Jung-Dal Choi , Yun-Seung Shin , Jong-Sun Sel
IPC分类号： H01L21/28
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11531
摘要： Methods of fabricating nonvolatile memory devices are provided. An isolation layer is formed on a substrate. The substrate has a memory region and a well contact region and the isolation layer defines an active region of the substrate. A gate insulating layer is formed on the active region. The gate insulating layer is patterned to define an opening therein. The opening exposes at least a portion of the well contact region of the substrate and acts as a charge pathway for charges generated during a subsequent etch of the isolation layer. Related memory device are also provided.
摘要翻译：提供制造非易失性存储器件的方法。在基板上形成隔离层。衬底具有存储区和阱接触区，并且隔离层限定衬底的有源区。在有源区上形成栅极绝缘层。栅极绝缘层被图案化以在其中限定开口。开口暴露衬底的阱接触区域的至少一部分，并且充当用于隔离层的后续蚀刻期间产生的电荷的电荷路径。还提供了相关的存储器件。

3. 发明申请

US20060234447A1 Methods of fabricating nonvolatile memory devices and related devices 失效
标题翻译：制造非易失性存储器件和相关器件的方法
公开(公告)号：US20060234447A1
公开(公告)日：2006-10-19
申请号：US11403964
申请日：2006-04-13
申请人： Jung-Dal Choi , Yun-Seung Shin , Jong-Sun Sel
发明人： Jung-Dal Choi , Yun-Seung Shin , Jong-Sun Sel
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L27/11521 , H01L27/11526 , H01L27/11531
摘要： Methods of fabricating nonvolatile memory devices are provided. An isolation layer is formed on a substrate. The substrate has a memory region and a well contact region and the isolation layer defines an active region of the substrate. A gate insulating layer is formed on the active region. The gate insulating layer is patterned to define an opening therein. The opening exposes at least a portion of the well contact region of the substrate and acts as a charge pathway for charges generated during a subsequent etch of the isolation layer. Related memory device are also provided.
摘要翻译：提供制造非易失性存储器件的方法。在基板上形成隔离层。衬底具有存储区和阱接触区，并且隔离层限定衬底的有源区。在有源区上形成栅极绝缘层。栅极绝缘层被图案化以在其中限定开口。开口暴露衬底的阱接触区域的至少一部分，并且充当用于隔离层的后续蚀刻期间产生的电荷的电荷路径。还提供了相关的存储器件。

4. 发明授权

US08043869B2 Magnetic memory device and method of fabricating the same 失效
标题翻译：磁记忆装置及其制造方法
公开(公告)号：US08043869B2
公开(公告)日：2011-10-25
申请号：US12915335
申请日：2010-10-29
申请人： Woo-Yeong Cho , Yun-Seung Shin , Hyun-Geun Byun , Choong-Keun Kwak
发明人： Woo-Yeong Cho , Yun-Seung Shin , Hyun-Geun Byun , Choong-Keun Kwak
IPC分类号： H01L29/82
CPC分类号： H01L27/224 , B82Y10/00 , G11C11/161 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675
摘要： A magnetic memory device includes a common line; a first write-in diode, a readout diode and a second write-in diode being connected to the common line in parallel. The magnetic memory device further includes a magnetic tunnel junction structure connected to the readout diode, first and second write-in conductors disposed at both sides of the magnetic tunnel junction structure and connected to the first and second write-in diodes, respectively and a first write-in line, a readout line and a second write-in line, which are connected to the first write-in conductor, the magnetic tunnel injection structure, and the second write-in conductor, respectively.
摘要翻译：磁存储器件包括公共线; 第一写入二极管，读出二极管和第二写入二极管并联连接到公共线。磁存储器件还包括连接到读出二极管的磁隧道结结构，分别设置在磁隧道结结构的两侧并连接到第一和第二写入二极管的第一和第二写入导体，写入线，读出线和第二写入线，分别连接到第一写入导体，磁隧道注入结构和第二写入导体。

5. 发明授权

US4948990A BiCMOS inverter circuit 失效
标题翻译： BiCMOS逆变电路
公开(公告)号：US4948990A
公开(公告)日：1990-08-14
申请号：US292883
申请日：1989-01-03
申请人： Yun-Seung Shin , Sung-Ki Min
发明人： Yun-Seung Shin , Sung-Ki Min
IPC分类号： H03K17/567 , H03K19/00 , H03K19/013 , H03K19/08 , H03K19/0944
CPC分类号： H03K19/09448 , H03K19/0136
摘要： A BiCMOS inverter circuit having complementary MOS transistors and complementary bipolar transistors enables a high speed inverting operation as well as high degree of integration when it is fabricated on a semiconductor chip. The inverter circuit may further include another complementary MOS transistors to allow the logic output to be advantageously full switched in the range of V.sub.cc -0 V keeping the high speed operation.
摘要翻译：具有互补MOS晶体管和互补双极晶体管的BiCMOS逆变器电路在半导体芯片上制造时能够实现高速反相操作以及高集成度。逆变器电路还可以包括另一个互补MOS晶体管，以允许逻辑输出有利地在保持高速操作的Vcc-0V的范围内全切换。

6. 发明授权

US07994493B2 Phase change memory devices employing cell diodes and methods of fabricating the same 有权
标题翻译：使用单元二极管的相变存储器件及其制造方法
公开(公告)号：US07994493B2
公开(公告)日：2011-08-09
申请号：US12196137
申请日：2008-08-21
申请人： Woo-Yeong Cho , Du-Eung Kim , Yun-Seung Shin , Hyun-Geun Byun , Sang-Beom Kang , Beak-Hyung Cho , Choong-Keun Kwak
发明人： Woo-Yeong Cho , Du-Eung Kim , Yun-Seung Shin , Hyun-Geun Byun , Sang-Beom Kang , Beak-Hyung Cho , Choong-Keun Kwak
IPC分类号： H01L29/04 , H01L47/00
CPC分类号： G11C13/0004 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1675
摘要： Phase change memory devices may include a semiconductor substrate of a first conductivity type and a plurality of parallel word lines disposed on the semiconductor substrate. The word lines may have a second conductivity type different from the first conductivity type and substantially flat top surfaces. First and second semiconductor patterns may be sequentially stacked on each word line, and an insulating layer may be provided to fill gap regions between the word lines, gap regions between the first semiconductor patterns and gap regions between the second semiconductor patterns. A plurality of phase change material patterns may be two-dimensionally arrayed on the insulating layer and electrically connected to the second semiconductor patterns.
摘要翻译：相变存储器件可以包括第一导电类型的半导体衬底和设置在半导体衬底上的多个平行字线。字线可以具有不同于第一导电类型和基本上平坦的顶表面的第二导电类型。第一和第二半导体图案可以顺序地堆叠在每个字线上，并且可以提供绝缘层以填充字线之间的间隙区域，第一半导体图案之间的间隙区域和第二半导体图案之间的间隙区域。多个相变材料图案可以二维排列在绝缘层上并电连接到第二半导体图案。

7. 发明申请

US20110053293A1 MAGNETIC MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 失效
标题翻译：磁记忆体装置及其制造方法
公开(公告)号：US20110053293A1
公开(公告)日：2011-03-03
申请号：US12915335
申请日：2010-10-29
申请人： Woo-Yeong CHO , Yun-Seung Shin , Hyun-Geun Byun , Choong-Keun Kwak
发明人： Woo-Yeong CHO , Yun-Seung Shin , Hyun-Geun Byun , Choong-Keun Kwak
IPC分类号： H01L21/62
CPC分类号： H01L27/224 , B82Y10/00 , G11C11/161 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675
摘要： A magnetic memory device includes a common line; a first write-in diode, a readout diode and a second write-in diode being connected to the common line in parallel. The magnetic memory device further includes a magnetic tunnel junction structure connected to the readout diode, first and second write-in conductors disposed at both sides of the magnetic tunnel junction structure and connected to the first and second write-in diodes, respectively and a first write-in line, a readout line and a second write-in line, which are connected to the first write-in conductor, the magnetic tunnel injection structure, and the second write-in conductor, respectively.
摘要翻译：磁存储器件包括公共线; 第一写入二极管，读出二极管和第二写入二极管并联连接到公共线。磁存储器件还包括连接到读出二极管的磁隧道结结构，分别设置在磁隧道结结构的两侧并连接到第一和第二写入二极管的第一和第二写入导体，写入线，读出线和第二写入线，分别连接到第一写入导体，磁隧道注入结构和第二写入导体。

8. 发明申请

US20060186483A1 Phase change memory devices employing cell diodes and methods of fabricating the same 有权
标题翻译：使用单元二极管的相变存储器件及其制造方法
公开(公告)号：US20060186483A1
公开(公告)日：2006-08-24
申请号：US11324112
申请日：2005-12-30
申请人： Woo-Yeong Cho , Du-Eung Kim , Yun-Seung Shin , Hyun-Geun Byun , Sang-Beom Kang , Beak-Hyung Cho , Choong-Keun Kwak
发明人： Woo-Yeong Cho , Du-Eung Kim , Yun-Seung Shin , Hyun-Geun Byun , Sang-Beom Kang , Beak-Hyung Cho , Choong-Keun Kwak
IPC分类号： H01L29/76
CPC分类号： G11C13/0004 , G11C2213/72 , H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1675
摘要： Phase change memory devices having cell diodes and related methods are provided, where the phase change memory devices include a semiconductor substrate of a first conductivity type and a plurality of parallel word lines disposed on the semiconductor substrate, the word lines have a second conductivity type different from the first conductivity type and have substantially flat top surfaces, a plurality of first semiconductor patterns are one-dimensionally arrayed on each word line along a length direction of the word line, the first semiconductor patterns have the first conductivity type or the second conductivity type, second semiconductor patterns having the first conductivity type are stacked on the first semiconductor patterns, an insulating layer is provided on the substrate having the second semiconductor patterns, the insulating layer fills gap regions between the word lines, gap regions between the first semiconductor patterns and gap regions between the second semiconductor patterns, a plurality of phase change material patterns are two-dimensionally arrayed on the insulating layer, and the phase change material patterns are electrically connected to the second semiconductor patterns, respectively.
摘要翻译：提供具有单元二极管和相关方法的相变存储器件，其中相变存储器件包括第一导电类型的半导体衬底和设置在半导体衬底上的多个平行字线，字线具有不同的第二导电类型从第一导电类型并且具有基本上平坦的顶表面，沿着字线的长度方向在每个字线上一维地排列多个第一半导体图案，第一半导体图案具有第一导电类型或第二导电类型具有第一导电类型的第二半导体图案堆叠在第一半导体图案上，在具有第二半导体图案的基板上设置绝缘层，绝缘层填充字线之间的间隙区域，第一半导体图案之间的间隙区域和第二半导体之间的间隙区域多个相变材料图案被二维排列在绝缘层上，并且相变材料图案分别电连接到第二半导体图案。

9. 发明授权

US5019881A Nonvolatile semiconductor memory component 失效
标题翻译：非易失性半导体存储器组件
公开(公告)号：US5019881A
公开(公告)日：1991-05-28
申请号：US391865
申请日：1989-08-10
申请人： Yun-Seung Shin , Sung-Oh Chun
发明人： Yun-Seung Shin , Sung-Oh Chun
IPC分类号： G11C17/00 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7885
摘要： The invention provides a nonvolatile semiconductor memory component comprising: field region of thick oxide, the first and second active regions surrounded with the field region, the first and second gate insulating layers on the first and second active regions, the first gate of a low resistance formed on the first and second gate insulating layer, the third insulating layer on the first gate of a low resistance the second gate of a low resistance formed on the third insulating layer, the channel region below the first gate insulating layer formed by the first gate, and the highly doped drain and source separated by channel region opposite to the type of the substrate. In addition, the process for forming the transistor with one channel and the substrate diffusion can be achieved on the semiconductor substrate or opposite type well formed on the semiconductor substrate. Programming at a low voltage may be possible and the reliability characteristics of the cell may be improved according to present invention.
摘要翻译：本发明提供了一种非易失性半导体存储器组件，包括：厚氧化物的场区域，被场区域包围的第一和第二有源区域，第一和第二有源区域上的第一和第二栅极绝缘层，低电阻的第一栅极形成在所述第一和第二栅极绝缘层上，所述第一栅极上的所述第三绝缘层具有低电阻，形成在所述第三绝缘层上的低电阻的第二栅极，所述第一栅极绝缘层下方的所述沟道区域由所述第一栅极，并且高掺杂的漏极和源极通过与衬底类型相反的沟道区分离。此外，用于形成具有一个沟道的晶体管和衬底扩散的工艺可以在半导体衬底上或在半导体衬底上良好形成的相反类型上实现。根据本发明，可以以低电压进行编程，并且可以提高电池的可靠性特性。

10. 发明申请

US20070047295A1 Magnetic memory device and method of fabricating the same 失效
标题翻译：磁记忆装置及其制造方法
公开(公告)号：US20070047295A1
公开(公告)日：2007-03-01
申请号：US11480242
申请日：2006-06-30
申请人： Woo-Yeong Cho , Yun-Seung Shin , Hyun-Geun Byun , Choong-Keun Kwak
发明人： Woo-Yeong Cho , Yun-Seung Shin , Hyun-Geun Byun , Choong-Keun Kwak
IPC分类号： G11C11/00
CPC分类号： H01L27/224 , B82Y10/00 , G11C11/161 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1675
摘要： A magnetic memory device includes a common line; a first write-in diode, a readout diode and a second write-in diode being connected to the common line in parallel. The magnetic memory device further includes a magnetic tunnel junction structure connected to the readout diode, first and second write-in conductors disposed at both sides of the magnetic tunnel junction structure and connected to the first and second write-in diodes, respectively and a first write-in line, a readout line and a second write-in line, which are connected to the first write-in conductor, the magnetic tunnel injection structure, and the second write-in conductor, respectively.
摘要翻译：磁存储器件包括公共线; 第一写入二极管，读出二极管和第二写入二极管并联连接到公共线。磁存储器件还包括连接到读出二极管的磁隧道结结构，分别设置在磁隧道结结构的两侧并连接到第一和第二写入二极管的第一和第二写入导体，写入线，读出线和第二写入线，分别连接到第一写入导体，磁隧道注入结构和第二写入导体。

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