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1. 发明授权

US08852851B2 Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same 有权
标题翻译：在形成半导体器件期间使用交替间隔物沉积的减径技术及包括其的系统
公开(公告)号：US08852851B2
公开(公告)日：2014-10-07
申请号：US11484271
申请日：2006-07-10
申请人： Baosuo Zhou , Mirzafer K. Abatchev , Ardavan Niroomand , Paul A. Morgan , Shuang Meng , Joseph N. Greeley , Brian J. Coppa
发明人： Baosuo Zhou , Mirzafer K. Abatchev , Ardavan Niroomand , Paul A. Morgan , Shuang Meng , Joseph N. Greeley , Brian J. Coppa
IPC分类号： H01L21/033 , H01L21/308
CPC分类号： H01L21/30625 , H01L21/0335 , H01L21/0337 , H01L21/0338 , H01L21/30604 , H01L21/3086 , H01L21/3088 , H01L23/564 , H01L2924/0002 , H01L2924/00
摘要： A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
摘要翻译：图案化层的方法使用一系列自对准间隔物增加在初始图案化层上形成的特征的密度。提供待蚀刻的层，然后在待蚀刻的层上形成例如使用光学光刻形成的初始牺牲图案形成层。根据实施例，图案化层可以被修整，然后形成并蚀刻一系列间隔层。间隔层的数量及其目标尺寸取决于所需的特征密度增加。还描述了一种过程中半导体器件和电子系统。

2. 发明授权

US07585782B2 Methods of forming semiconductor constructions, and methods of selectively removing metal-containing materials relative to oxide 失效
标题翻译：形成半导体结构的方法以及相对于氧化物选择性除去含金属材料的方法
公开(公告)号：US07585782B2
公开(公告)日：2009-09-08
申请号：US11402698
申请日：2006-04-11
申请人： Joseph N. Greeley , Paul A. Morgan
发明人： Joseph N. Greeley , Paul A. Morgan
IPC分类号： H01L21/22 , H01L21/38
CPC分类号： H01L21/7684 , H01L21/32134 , H01L21/76865 , H01L21/76883
摘要： The invention includes methods of selectively removing metal-containing copper barrier materials (such as tantalum-containing materials, titanium-containing materials and tungsten-containing materials) relative to oxide (such as silicon dioxide) and/or copper. The selective removal can utilize etchant solutions containing hydrofluoric acid and one or more carboxylic acids. The etchant solutions can contain less than 6 weight percent water, and/or can have a dielectric constant below 40.
摘要翻译：本发明包括相对于氧化物（例如二氧化硅）和/或铜选择性除去含金属铜阻挡材料（例如含钽材料，含钛材料和含钨材料）的方法。选择性去除可以使用含有氢氟酸和一种或多种羧酸的蚀刻剂溶液。蚀刻剂溶液可以含有少于6重量％的水，和/或可以具有低于40的介电常数。

3. 发明申请

US20080008969A1 Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same 有权
标题翻译：在形成半导体器件期间使用交替间隔物沉积的减径技术及包括其的系统
公开(公告)号：US20080008969A1
公开(公告)日：2008-01-10
申请号：US11484271
申请日：2006-07-10
申请人： Baosuo Zhou , Mirzafer K. Abatchev , Ardavan Niroomand , Paul A. Morgan , Shuang Meng , Joseph N. Greeley , Brian J. Coppa
发明人： Baosuo Zhou , Mirzafer K. Abatchev , Ardavan Niroomand , Paul A. Morgan , Shuang Meng , Joseph N. Greeley , Brian J. Coppa
IPC分类号： G03F7/26
CPC分类号： H01L21/30625 , H01L21/0335 , H01L21/0337 , H01L21/0338 , H01L21/30604 , H01L21/3086 , H01L21/3088 , H01L23/564 , H01L2924/0002 , H01L2924/00
摘要： A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.
摘要翻译：图案化层的方法使用一系列自对准间隔物增加在初始图案化层上形成的特征的密度。提供待蚀刻的层，然后在待蚀刻的层上形成例如使用光学光刻形成的初始牺牲图案形成层。根据实施例，图案化层可以被修整，然后形成并蚀刻一系列间隔层。间隔层的数量及其目标尺寸取决于所需的特征密度增加。还描述了一种过程中半导体器件和电子系统。

4. 发明授权

US08252119B2 Microelectronic substrate cleaning systems with polyelectrolyte and associated methods 失效
标题翻译：具有聚电解质和相关方法的微电子基板清洗系统
公开(公告)号：US08252119B2
公开(公告)日：2012-08-28
申请号：US12195003
申请日：2008-08-20
申请人： Joseph N. Greeley , Nishant Sinha , Lukasz Hupka , Timothy A. Quick , Prashant Raghu
发明人： Joseph N. Greeley , Nishant Sinha , Lukasz Hupka , Timothy A. Quick , Prashant Raghu
IPC分类号： B08B3/08
CPC分类号： B08B3/08 , C11D3/37 , C11D7/06 , C11D11/0047 , H01L21/02057 , H01L21/67051 , H01L21/67057
摘要： Several embodiments of cleaning systems using polyelectrolyte and various associated methods for cleaning microelectronic substrates are disclosed herein. One embodiment is directed to a system that has a substrate support for holding the microelectronic substrate, a dispenser positioned above the substrate support and facing a surface of the microelectronic substrate, a reservoir in fluid communication with the dispenser via a conduit, and a washing solution contained in the reservoir. The washing solution includes a polyelectrolyte.
摘要翻译：本文公开了使用聚电解质的清洁系统和用于清洁微电子衬底的各种相关方法的几个实施例。一个实施例涉及一种具有用于保持微电子基板的基板支撑件的系统，位于基板支撑件上方并面向微电子基板的表面的分配器，经由导管与分配器流体连通的储存器和洗涤液储存在容器中。洗涤液包括聚电解质。

5. 发明申请

US20120267599A1 RESISTIVE RAM DEVICES AND METHODS 有权
标题翻译：电阻RAM设备和方法
公开(公告)号：US20120267599A1
公开(公告)日：2012-10-25
申请号：US13517747
申请日：2012-06-14
申请人： Joseph N. Greeley , John A. Smythe, III
发明人： Joseph N. Greeley , John A. Smythe, III
IPC分类号： H01L47/00 , H01L21/02
CPC分类号： H01L45/1683 , H01L27/2463 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/145 , H01L45/146 , H01L45/1616 , H01L45/1625 , H01L45/1633
摘要： The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element.
摘要翻译：本公开包括高密度电阻随机存取存储器（RRAM）装置，以及制造高密度RRAM装置的方法。形成RRAM器件的一种方法包括形成具有金属 - 金属氧化物界面的电阻元件。形成电阻元件包括在第一电极上形成绝缘材料，以及在绝缘材料中形成通孔。通孔由金属材料共形填充，并且金属材料被平坦化到通孔内。通孔内的金属材料的一部分被选择性地处理以在通孔内产生金属 - 金属氧化物界面。第二电极形成在电阻元件上。

6. 发明申请

US20120097911A1 PHASE CHANGE MEMORY CELL STRUCTURES AND METHODS 有权
标题翻译：相变存储器单元结构和方法
公开(公告)号：US20120097911A1
公开(公告)日：2012-04-26
申请号：US13342172
申请日：2012-01-02
申请人： Timothy A. Quick , Eugene P. Marsh , Joseph N. Greeley
发明人： Timothy A. Quick , Eugene P. Marsh , Joseph N. Greeley
IPC分类号： H01L47/00 , H01L29/02
CPC分类号： H01L45/1683 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144
摘要： Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material.
摘要翻译：本文描述了相变存储器单元结构和方法。形成相变存储单元结构的多种方法包括在第一电极上形成电介质堆叠结构，其中形成电介质叠层结构包括在电介质叠层结构的第一区和第三区之间形成第二区，第二区域，其热导率不同于第一区域的热导率，并且不同于介电叠层的第三区域的热导率。一个或多个实施例包括通过介电堆叠结构的第一，第二和第三区域形成通孔，在通孔中沉积相变材料，以及在相变材料上形成第二电极。

7. 发明授权

US08097537B2 Phase change memory cell structures and methods 有权
标题翻译：相变存储单元结构和方法
公开(公告)号：US08097537B2
公开(公告)日：2012-01-17
申请号：US12787070
申请日：2010-05-25
申请人： Timothy A. Quick , Eugene P. Marsh , Joseph N. Greeley
发明人： Timothy A. Quick , Eugene P. Marsh , Joseph N. Greeley
IPC分类号： H01L21/44
CPC分类号： H01L45/1683 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/1293 , H01L45/144
摘要： Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material.
摘要翻译：本文描述了相变存储器单元结构和方法。形成相变存储单元结构的多种方法包括在第一电极上形成电介质堆叠结构，其中形成电介质叠层结构包括在电介质叠层结构的第一区和第三区之间形成第二区，第二区域，其热导率不同于第一区域的热导率，并且不同于介电叠层的第三区域的热导率。一个或多个实施例包括通过介电堆叠结构的第一，第二和第三区域形成通孔，在通孔中沉积相变材料，以及在相变材料上形成第二电极。

8. 发明授权

US08435904B2 Methods of uniformly removing silicon oxide and an intermediate semiconductor device 有权
标题翻译：均匀去除氧化硅和中间半导体器件的方法
公开(公告)号：US08435904B2
公开(公告)日：2013-05-07
申请号：US12850441
申请日：2010-08-04
申请人： Nishant Sinha , Gurtej S. Sandhu , Joseph N. Greeley
发明人： Nishant Sinha , Gurtej S. Sandhu , Joseph N. Greeley
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/31116 , H01L21/76229 , H01L21/823412 , H01L21/823481 , H01L27/11521 , H01L29/7846 , Y10S438/911
摘要： A method of substantially uniformly removing silicon oxide is disclosed. The silicon oxide to be removed includes at least one cavity therein or more than one density or strain therein. The silicon oxide having the at least one cavity or more than one density or strain is exposed to a gaseous mixture of NH3 and HF and heated, to substantially uniformly remove the silicon oxide. A method of removing an exposed sacrificial layer without substantially removing exposed isolation regions using the gaseous mixture of NH3 and HF and heat is also disclosed, as is an intermediate semiconductor device structure that includes a semiconductor substrate, a sacrificial layer overlying the semiconductor substrate, a diffusion barrier overlying the sacrificial layer, and exposed isolation regions.
摘要翻译：公开了一种基本均匀地去除氧化硅的方法。要除去的氧化硅包括其中至少一个空腔或其中的多于一个密度或应变。将具有至少一个空腔或多于一个密度或应变的氧化硅暴露于NH 3和HF的气体混合物并加热，以基本均匀地除去氧化硅。还公开了使用NH 3和HF的气体混合物和热量基本上去除暴露的隔离区域去除暴露的牺牲层的方法，中间半导体器件结构包括半导体衬底，覆盖半导体衬底的牺牲层，覆盖牺牲层的扩散阻挡层和暴露的隔离区域。

9. 发明申请

US20110203940A1 Method of Selectively Removing Conductive Material 有权
标题翻译：选择性去除导电材料的方法
公开(公告)号：US20110203940A1
公开(公告)日：2011-08-25
申请号：US13098572
申请日：2011-05-02
申请人： Rita J. Klein , Dale W. Collins , Paul Morgan , Joseph N. Greeley , Nishant Sinha
发明人： Rita J. Klein , Dale W. Collins , Paul Morgan , Joseph N. Greeley , Nishant Sinha
IPC分类号： C25F3/02 , C25B9/00
CPC分类号： H01L21/67086 , B82Y30/00 , C23F1/02 , C23F1/10 , H01B1/122 , H01L21/32115 , H01L21/67075
摘要： An electrolyte solution, methods, and systems for selectively removing a conductive metal from a substrate are provided. The electrolyte solution comprising nanoparticles that are more noble than the conductive metal being removed, is applied to a substrate to remove the conductive metal selectively relative to a dielectric material without application of an external potential or contact of a processing pad with the surface of the substrate. The solutions and methods can be applied, for example, to remove a conductive metal layer (e.g., barrier metal) selectively relative to dielectric material and to a materially different conductive metal (e.g., copper interconnect) without application of an external potential or contact of a processing pad with the surface of the substrate.
摘要翻译：提供了一种用于从衬底选择性地去除导电金属的电解质溶液，方法和系统。将包含比被除去的导电金属更贵的纳米颗粒的电解质溶液施加到基板上以相对于电介质材料选择性地去除导电金属，而不施加外部电位或处理垫与基板表面的接触。解决方案和方法可以应用于例如相对于电介质材料选择性地去除导电金属层（例如阻挡金属），并且可以应用于物理上不同的导电金属（例如，铜互连），而不施加外部电位或接触具有衬底表面的处理衬垫。

10. 发明申请

US20080041725A1 Method of selectively removing conductive material 有权
标题翻译：选择性去除导电材料的方法
公开(公告)号：US20080041725A1
公开(公告)日：2008-02-21
申请号：US11507291
申请日：2006-08-21
申请人： Rita J. Klein , Dale W. Collins , Paul Morgan , Joseph N. Greeley , Nishant Sinha
发明人： Rita J. Klein , Dale W. Collins , Paul Morgan , Joseph N. Greeley , Nishant Sinha
IPC分类号： B01D35/06
CPC分类号： H01L21/67086 , B82Y30/00 , C23F1/02 , C23F1/10 , H01B1/122 , H01L21/32115 , H01L21/67075
摘要： An electrolyte solution, methods, and systems for selectively removing a conductive metal from a substrate are provided. The electrolyte solution comprising nanoparticles that are more noble than the conductive metal being removed, is applied to a substrate to remove the conductive metal selectively relative to a dielectric material without application of an external potential or contact of a processing pad with the surface of the substrate. The solutions and methods can be applied, for example, to remove a conductive metal layer (e.g., barrier metal) selectively relative to dielectric material and to a materially different conductive metal (e.g., copper interconnect) without application of an external potential or contact of a processing pad with the surface of the substrate.
摘要翻译：提供了一种用于从衬底选择性地去除导电金属的电解质溶液，方法和系统。将包含比被除去的导电金属更贵的纳米颗粒的电解质溶液施加到基板上以相对于电介质材料选择性地去除导电金属，而不施加外部电位或处理垫与基板表面的接触。解决方案和方法可以应用于例如相对于电介质材料选择性地去除导电金属层（例如阻挡金属），并且可以应用于物理上不同的导电金属（例如，铜互连），而不施加外部电位或接触具有衬底表面的处理衬垫。

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