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    • 1. 发明申请
    • THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME
    • 薄膜晶体管及其制造方法
    • US20110084276A1
    • 2011-04-14
    • US12753732
    • 2010-04-02
    • Jin-Hee KANGChun-Gi YOUSun PARKJong-Hyun PARKYul-Kyu LEE
    • Jin-Hee KANGChun-Gi YOUSun PARKJong-Hyun PARKYul-Kyu LEE
    • H01L29/786H01L21/336
    • H01L29/78609H01L29/78618
    • A thin film transistor (TFT) and a method of fabricating the same are disclosed. The TFT includes a substrate, a gate electrode disposed over the substrate, a gate insulating layer disposed over the gate electrode, a semiconductor layer disposed over the gate insulating layer and including a polycrystalline silicon (poly-Si) layer, an ohmic contact layer disposed over a predetermined region of the semiconductor layer, an insulating interlayer disposed over substantially an entire surface of the substrate including the ohmic contact layer, and source and drain electrodes electrically connected to the ohmic contact layer through contact holes formed in the interlayer insulating layer. A barrier layer is interposed between the semiconductor layer and the ohmic contact layer. Thus, when an off-current of a bottom-gate-type TFT is controlled, degradation of characteristics due to a leakage current may be prevented using a simple process.
    • 公开了一种薄膜晶体管(TFT)及其制造方法。 TFT包括衬底,设置在衬底上的栅电极,设置在栅电极上的栅极绝缘层,设置在栅极绝缘层上方并包括多晶硅(poly-Si)层的半导体层,设置的欧姆接触层 超过半导体层的预定区域,设置在包括欧姆接触层的基板的基本上整个表面上的绝缘夹层,以及通过形成在层间绝缘层中的接触孔与欧姆接触层电连接的源极和漏极。 阻挡层介于半导体层和欧姆接触层之间。 因此,当控制底栅型TFT的截止电流时,可以通过简单的处理来防止由漏电流引起的特性的劣化。
    • 4. 发明申请
    • METHOD FOR MANUFACTURING AN ORGANIC LIGHT EMITTING DIODE DISPLAY
    • 用于制造有机发光二极管显示器的方法
    • US20130217165A1
    • 2013-08-22
    • US13860339
    • 2013-04-10
    • Yul-Kyu LEESun PARKChun-Gi YOUJong-Hyun PARK
    • Yul-Kyu LEESun PARKChun-Gi YOUJong-Hyun PARK
    • H01L51/56
    • H01L51/56H01L27/3258H01L27/3262H01L27/3265
    • Making an OLED display, includes forming a first storage plate and a gate insulating layer covering the first storage plate on a substrate; sequentially forming a second storage plate covering the first storage plate and a capacitor intermediate in the gate insulating layer; forming a first doping region by injecting an impurity to a part that is not covered by the capacitor intermediate in the first storage plate; forming an interlayer insulating layer having a capacitor opening exposing the capacitor intermediate, and a plurality of erosion preventing layers on an edge of the capacitor intermediate toward the first doping region in the capacitor opening; removing the capacitor intermediate including the erosion preventing layer and a lower region of the erosion preventing layer, and injecting an impurity in the first storage plate through the second storage plate to form a second doping region contacting the first doping region.
    • 制造OLED显示器包括在基板上形成覆盖第一存储板的第一存储板和栅极绝缘层; 顺序地形成覆盖第一存储板的第二存储板和在栅极绝缘层中间的电容器; 通过向第一存储板中未被电容器中间体覆盖的部分注入杂质而形成第一掺杂区; 形成具有使所述电容器中间露出的电容器开口的层间绝缘层,以及在所述电容器开口中的朝向所述第一掺杂区域的电容器的边缘上的多个防蚀蚀层; 去除包括侵蚀防止层的电容器中间件和侵蚀防止层的下部区域,以及通过第二存储板在第一存储板中注入杂质以形成与第一掺杂区域接触的第二掺杂区域。
    • 10. 发明申请
    • SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    • 半导体器件及其制造方法
    • US20160268287A1
    • 2016-09-15
    • US15047882
    • 2016-02-19
    • Jong-Hyun PARKJee-Yong KIMDae-Seok BYEON
    • Jong-Hyun PARKJee-Yong KIMDae-Seok BYEON
    • H01L27/115H01L29/792
    • H01L27/11575H01L27/11565H01L27/1157H01L27/11582
    • A semiconductor device includes a substrate including cell and dummy regions, first channel structures on the cell region and extending in a first direction vertical with respect to the substrate, gate lines surrounding outer sidewalls of the first channel structures and extending in a second direction parallel to the substrate, the gate lines being spaced apart from each other along the first direction, cutting lines between the gate lines on the cell region and extending in the second direction, dummy patterns spaced apart from each other along the first direction on the dummy region, the dummy patterns having a stepped shape along a third direction parallel to the top surface of the substrate and perpendicular to the second direction, at least a portion of the dummy patterns including a same conductive material as that in the gate lines, and dummy lines through the dummy patterns.
    • 一种半导体器件包括:包括单元和虚设区域的基板,单元区域上的第一通道结构,并且相对于基板垂直于第一方向延伸;栅极线,其围绕第一通道结构的外侧壁延伸,并且沿第二方向平行延伸 所述基板,所述栅极线沿着所述第一方向彼此间隔开,在所述单元区域上的所述栅极线之间切割并沿所述第二方向延伸,在所述虚拟区域上沿着所述第一方向彼此间隔开的虚拟图案, 所述虚拟图案沿着与所述基板的顶面平行且垂直于所述第二方向的第三方向具有台阶状,所述虚设图案的至少一部分包括与所述栅极线相同的导电性材料, 虚拟模式。