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1. 发明授权

US07872823B2 AGC loop with weighted zero forcing and LMS error sources and methods for using such 有权
标题翻译：具有加权零强制和LMS误差源的AGC环路及其使用方法
公开(公告)号：US07872823B2
公开(公告)日：2011-01-18
申请号：US12352540
申请日：2009-01-12
申请人： Jingfeng Liu , Hongwei Song , Jongseung Park , George Mathew , Yuan Xing Lee
发明人： Jingfeng Liu , Hongwei Song , Jongseung Park , George Mathew , Yuan Xing Lee
IPC分类号： G11B5/09
CPC分类号： G11B5/09 , G11B20/10009 , G11B20/10027 , G11B20/10046 , H03G3/30 , H03M1/185
摘要： Various embodiments of the present invention provide systems and methods for gain control. For example, some embodiments of the present invention provide variable gain control circuits. Such circuits include a zero forcing loop generating a zero forcing feedback and a least mean square loop generating a least mean square feedback. An error quantization circuit generates a hybrid feedback based upon a threshold condition using the zero forcing feedback and the least mean square feedback. A variable gain amplifier is at least in part controlled by a derivative of the hybrid feedback.
摘要翻译：本发明的各种实施例提供用于增益控制的系统和方法。例如，本发明的一些实施例提供可变增益控制电路。这种电路包括产生零强制反馈的零强制环路和产生最小均方反馈的最小均方环路。误差量化电路使用零强制反馈和最小均方反馈基于阈值条件产生混合反馈。可变增益放大器至少部分地由混合反馈的导数来控制。

2. 发明申请

US20100177419A1 AGC Loop with Weighted Zero Forcing and LMS Error Sources and Methods for Using Such 有权
标题翻译：具有加权零强制和LMS误差源的AGC环路及其使用方法
公开(公告)号：US20100177419A1
公开(公告)日：2010-07-15
申请号：US12352540
申请日：2009-01-12
申请人： Jingfeng Liu , Hongwei Song , Jongseung Park , George Mathew , Yuan Xing Lee
发明人： Jingfeng Liu , Hongwei Song , Jongseung Park , George Mathew , Yuan Xing Lee
IPC分类号： G11B5/00 , H03G3/30
CPC分类号： G11B5/09 , G11B20/10009 , G11B20/10027 , G11B20/10046 , H03G3/30 , H03M1/185
摘要： Various embodiments of the present invention provide systems and methods for gain control. For example, some embodiments of the present invention provide variable gain control circuits. Such circuits include a zero forcing loop generating a zero forcing feedback and a least mean square loop generating a least mean square feedback. An error quantization circuit generates a hybrid feedback based upon a threshold condition using the zero forcing feedback and the least mean square feedback. A variable gain amplifier is at least in part controlled by a derivative of the hybrid feedback.
摘要翻译：本发明的各种实施例提供用于增益控制的系统和方法。例如，本发明的一些实施例提供可变增益控制电路。这种电路包括产生零强制反馈的零强制环路和产生最小均方反馈的最小均方环路。误差量化电路使用零强制反馈和最小均方反馈基于阈值条件产生混合反馈。可变增益放大器至少部分地由混合反馈的导数来控制。

3. 发明授权

US08175201B2 Systems and methods for adaptive equalization in recording channels 有权
标题翻译：记录通道自适应均衡的系统和方法
公开(公告)号：US08175201B2
公开(公告)日：2012-05-08
申请号：US12663325
申请日：2008-10-27
申请人： George Mathew , Yuan Xing Lee , Hongwei Song , Liu Jingfeng , Jongseung Park
发明人： George Mathew , Yuan Xing Lee , Hongwei Song , Liu Jingfeng , Jongseung Park
IPC分类号： H03D1/06 , H03D11/04 , H03K5/01 , H03K6/04 , H04B1/10 , H04L1/00 , H04L25/08
CPC分类号： G11B19/041 , G11B5/09 , G11B20/10009 , G11B20/10046 , G11B20/10481 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for performing adaptive equalization. For example, various embodiments of the present invention provide methods for adaptive equalization that include providing a data processing system with an equalizer circuit (210) and a target filter circuit (265). The equalizer circuit performs equalization based at least in part on an equalizer coefficient (215). The methods further include generating an error (285) based upon a first output from the equalizer circuit and a second output from the target filter circuit. An inter-symbol interference component (295) is extracted from the error (285) and used to calculate an equalizer gradient (226). Based at least in part on the equalizer gradient (226), the equalizer coefficient (215) is calculated.
摘要翻译：本发明的各种实施例提供了用于执行自适应均衡的系统和方法。例如，本发明的各种实施例提供了用于自适应均衡的方法，其包括向数据处理系统提供均衡器电路（210）和目标滤波器电路（265）。均衡器电路至少部分地基于均衡器系数（215）来执行均衡。所述方法还包括基于均衡器电路的第一输出和来自目标滤波器电路的第二输出产生误差（285）。从误差（285）提取符号间干扰分量（295），并用于计算均衡器梯度（226）。至少部分基于均衡器梯度（226），计算均衡器系数（215）。

4. 发明申请

US20100287420A1 Systems and Methods for Adaptive Equalization in Recording Channels 有权
标题翻译：记录通道自适应均衡的系统和方法
公开(公告)号：US20100287420A1
公开(公告)日：2010-11-11
申请号：US12663325
申请日：2008-10-27
申请人： George Mathew , Yuan Xing Lee , Hongwei Song , Liu Jingfeng , Jongseung Park
发明人： George Mathew , Yuan Xing Lee , Hongwei Song , Liu Jingfeng , Jongseung Park
IPC分类号： G06F11/07
CPC分类号： G11B19/041 , G11B5/09 , G11B20/10009 , G11B20/10046 , G11B20/10481 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for performing adaptive equalization. For example, various embodiments of the present invention provide methods for adaptive equalization that include providing a data processing system with an equalizer circuit (210) and a target filter circuit (265). The equalizer circuit performs equalization based at least in part on an equalizer coefficient (215). The methods further include generating an error (285) based upon a first output from the equalizer circuit and a second output from the target filter circuit. An inter-symbol interference component (295) is extracted from the error (285) and used to calculate an equalizer gradient (226). Based at least in part on the equalizer gradient (226), the equalizer coefficient (215) is calculated.
摘要翻译：本发明的各种实施例提供了用于执行自适应均衡的系统和方法。例如，本发明的各种实施例提供了用于自适应均衡的方法，其包括向数据处理系统提供均衡器电路（210）和目标滤波器电路（265）。均衡器电路至少部分地基于均衡器系数（215）来执行均衡。所述方法还包括基于均衡器电路的第一输出和来自目标滤波器电路的第二输出产生误差（285）。从误差（285）提取符号间干扰分量（295），并用于计算均衡器梯度（226）。至少部分地基于均衡器梯度（226），计算均衡器系数（215）。

5. 发明授权

US08804260B2 Systems and methods for inter-track interference compensation 有权
标题翻译：轨道间干扰补偿的系统和方法
公开(公告)号：US08804260B2
公开(公告)日：2014-08-12
申请号：US13186174
申请日：2011-07-19
申请人： George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch , Ming Jin , Yuan Xing Lee
发明人： George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch , Ming Jin , Yuan Xing Lee
IPC分类号： G11B5/09
CPC分类号： G11B20/10046 , G11B5/012 , G11B5/09 , G11B19/045 , G11B20/10398 , G11B20/1217 , G11B2020/10759 , G11B2020/1232 , G11B2020/1298 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的数据处理电路。数据缓冲器可操作以存储先前的轨迹数据集。轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。

6. 发明申请

US20120063022A1 Systems and Methods for Inter-track Interference Compensation 有权
标题翻译：轨道间干扰补偿的系统和方法
公开(公告)号：US20120063022A1
公开(公告)日：2012-03-15
申请号：US13186174
申请日：2011-07-19
申请人： George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch , Ming Jin , Yuan Xing Lee
发明人： George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch , Ming Jin , Yuan Xing Lee
IPC分类号： G11B5/09
CPC分类号： G11B20/10046 , G11B5/012 , G11B5/09 , G11B19/045 , G11B20/10398 , G11B20/1217 , G11B2020/10759 , G11B2020/1232 , G11B2020/1298 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的数据处理电路。数据缓冲器可操作以存储先前的轨迹数据集。轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。

7. 发明授权

US08149529B2 Dibit extraction for estimation of channel parameters 有权
标题翻译： Dibit提取用于估计信道参数
公开(公告)号：US08149529B2
公开(公告)日：2012-04-03
申请号：US12845110
申请日：2010-07-28
申请人： George Mathew , Hongwei Song , Yuan Xing Lee
发明人： George Mathew , Hongwei Song , Yuan Xing Lee
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B20/10046 , G11B20/10212 , G11B20/10305 , G11B20/10462 , G11B20/10481
摘要： In one embodiment, a storage-device-implemented method for estimating one or more channel parameters of a storage device including a read channel and a storage medium with a bit sequence stored on the storage medium. The method includes: (a) the storage device reading at least a portion of the bit sequence from the storage medium to generate a bit response; (b) the storage device convolving the bit response to compute an impulse response of the read channel; and (c) the storage device estimating one or more channel parameters based on the computed impulse response.
摘要翻译：在一个实施例中，一种用于估计存储设备的一个或多个信道参数的存储设备实现的方法，所述存储设备包括读取通道和具有存储在存储介质上的位序列的存储介质。该方法包括：（a）存储装置从存储介质中读取比特序列的至少一部分以产生比特响应; （b）所述存储装置卷积所述位响应以计算所述读通道的脉冲响应; 以及（c）所述存储装置基于所计算的脉冲响应来估计一个或多个信道参数。

8. 发明申请

US20120033316A1 Systems and Methods for Format Efficient Calibration for Servo Data Based Harmonics Calculation 失效
标题翻译：基于伺服数据的谐波计算格式有效校准的系统和方法
公开(公告)号：US20120033316A1
公开(公告)日：2012-02-09
申请号：US12851425
申请日：2010-08-05
申请人： George Mathew , Suharli Tedja , Hongwei Song , Robert A. Greene , Yuan Xing Lee
发明人： George Mathew , Suharli Tedja , Hongwei Song , Robert A. Greene , Yuan Xing Lee
IPC分类号： G11B27/36
CPC分类号： G11B5/6029 , G11B20/10018 , G11B20/10481 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for servo data based harmonics calculation. For example, a method for calculating harmonics is disclosed that includes: providing a data processing circuit; receiving a first data set derived from a data source during a servo data processing period; performing a first harmonics calculation using the first data set to yield a first harmonics ratio; receiving a second data set derived from a source other than the previously mentioned data source during a user data processing period; performing a second harmonics calculation using the second data set to yield a second harmonics ratio; and calculating a ratio of the first harmonics ratio to the second harmonics ratio.
摘要翻译：本发明的各种实施例提供了用于基于伺服数据的谐波计算的系统和方法。例如，公开了一种用于计算谐波的方法，包括：提供数据处理电路; 在伺服数据处理期间接收从数据源导出的第一数据组; 使用所述第一数据组执行第一谐波计算以产生第一谐波比; 在用户数据处理期间接收从除了前述数据源之外的源得到的第二数据集; 使用所述第二数据组执行二次谐波计算以产生第二谐波比; 以及计算所述第一谐波比与所述第二谐波比的比率。

9. 发明授权

US07990642B2 Systems and methods for storage channel testing 有权
标题翻译：存储通道测试的系统和方法
公开(公告)号：US07990642B2
公开(公告)日：2011-08-02
申请号：US12425757
申请日：2009-04-17
申请人： Yuan Xing Lee , George Mathew , Shaohua Yang , Hongwei Song , Weijun Tan , Hao Zhong
发明人： Yuan Xing Lee , George Mathew , Shaohua Yang , Hongwei Song , Weijun Tan , Hao Zhong
IPC分类号： G11B27/36
CPC分类号： G11B20/182 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for validating elements of storage devices. A an example, various embodiments of the present invention provide semiconductor devices that include a write path circuit, a read path circuit and a validation circuit. The write path circuit is operable to receive a data input and to convert the data input into write data suitable for storage to a storage medium. The read path circuit is operable to receive read data and to convert the read data into a data output. The validation circuit is operable to: receive the write data, augment the write data with a first noise sequence to yield a first augmented data series; and augment a derivative of the first augmented data series with a second noise sequence to yield the read data.
摘要翻译：本发明的各种实施例提供用于验证存储设备的元件的系统和方法。作为示例，本发明的各种实施例提供包括写入路径电路，读取路径电路和验证电路的半导体器件。写入路径电路可操作用于接收数据输入并将数据输入转换成适合于存储的写数据到存储介质。读路径电路可操作以接收读数据并将读数据转换为数据输出。验证电路可操作以：接收写入数据，用第一噪声序列增加写入数据以产生第一增强数据序列; 并且用第二噪声序列来增加第一增强数据序列的导数以产生读取的数据。

10. 发明申请

US20100053793A1 Systems and Methods for Adaptive Write Pre-Compensation 有权
标题翻译：自适应写预补偿的系统和方法
公开(公告)号：US20100053793A1
公开(公告)日：2010-03-04
申请号：US12199325
申请日：2008-08-27
申请人： George Mathew , Yuan Xing Lee , Hongwei Song
发明人： George Mathew , Yuan Xing Lee , Hongwei Song
IPC分类号： G11B5/09
CPC分类号： G11B5/09 , G11B20/10194
摘要： Various embodiments of the present invention provide systems and methods for write pre-compensation. For example, various embodiments of the present invention provide methods for modifying magnetic information transfer. The methods include retrieving magnetically represented data from a storage medium, and converting the magnetically represented data to a series of data samples. A preceding pattern and a transition status is identified in the series of data samples, and an equalized channel response is computed based on an estimated NLTS value. An error value is computed that corresponds to a difference between the estimated NLTS value and an actual NLTS value, and a pre-compensation value is computed based at least in part on the error value.
摘要翻译：本发明的各种实施例提供了用于写入预补偿的系统和方法。例如，本发明的各种实施例提供了用于修改磁信息传输的方法。所述方法包括从存储介质检索磁性表示的数据，并将磁性表示的数据转换成一系列数据样本。在一系列数据样本中识别出先前的模式和转变状态，并且基于估计的NLTS值来计算均衡的信道响应。计算对应于估计的NLTS值和实际NLTS值之间的差异的误差值，并且至少部分地基于误差值计算预补偿值。

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