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1. 发明申请

US20130070530A1 HIGH ENDURANCE NON-VOLATILE STORAGE 有权
标题翻译：高耐久性非挥发性储存
公开(公告)号：US20130070530A1
公开(公告)日：2013-03-21
申请号：US13622045
申请日：2012-09-18
申请人： Jian Chen , Sergei Gorobets , Steven Sprouse , Tien-Chien Kuo , Yan Li , Seungpil Lee , Alex Mak , Deepanshu Dutta , Masaaki Higashitani
发明人： Jian Chen , Sergei Gorobets , Steven Sprouse , Tien-Chien Kuo , Yan Li , Seungpil Lee , Alex Mak , Deepanshu Dutta , Masaaki Higashitani
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C5/063 , G11C11/5628 , G11C2211/5641
摘要： A non-volatile storage system is disclosed that includes non-volatile memory cells designed for high endurance and lower retention than other non-volatile memory cells.
摘要翻译：公开了一种非易失性存储系统，其包括设计用于高耐久性和比其他非易失性存储器单元更低保持性的非易失性存储器单元。

2. 发明授权

US09176862B2 SLC-MLC wear balancing 有权
标题翻译： SLC-MLC磨损平衡
公开(公告)号：US09176862B2
公开(公告)日：2015-11-03
申请号：US13340446
申请日：2011-12-29
申请人： Jian Chen , Sergey Anatolievich Gorobets , Steven Sprouse
发明人： Jian Chen , Sergey Anatolievich Gorobets , Steven Sprouse
IPC分类号： G06F12/00 , G06F12/02 , G11C16/34
CPC分类号： G06F12/0246 , G06F2212/7202 , G06F2212/7211 , G11C16/349 , G11C2211/5641
摘要： A method and system for SLC-MLC Wear Balancing in a flash memory device is disclosed. The flash memory device includes a single level cell (SLC) portion and a multi-level cell (MLC) portion. The age of the SLC portion and the MLC portion may differ, leading potentially to one portion wearing out before the other. In order to avoid this, a controller is configured to receive an age indicator from one or both of the SLC portion and the MLC portion, determine, based on the age indicator, whether to modify operation of the SLC portion and/or the MLC portion, and in response to determining to modifying operation, modify the operation of the at least one of the SLC portion or the MLC portion. The modification of the operation may thus balance wear between the SLC and MLC portions, thereby potentially extending the life of the flash memory device.
摘要翻译：公开了一种用于闪存设备中的SLC-MLC磨损平衡的方法和系统。闪速存储器件包括单级单元（SLC）部分和多级单元（MLC）部分。 SLC部分和MLC部分的时代可能不同，潜在地导致在另一部分之前磨损的部分。为了避免这种情况，控制器被配置为从SLC部分和MLC部分中的一个或两个接收年龄指示符，基于年龄指示符确定是否修改SLC部分和/或MLC部分的操作并且响应于确定修改操作，修改SLC部分或MLC部分中的至少一个的操作。因此，操作的修改可以平衡SLC和MLC部分之间的磨损，从而潜在地延长闪存设备的寿命。

3. 发明申请

US20130173844A1 SLC-MLC Wear Balancing 有权
标题翻译： SLC-MLC穿着平衡
公开(公告)号：US20130173844A1
公开(公告)日：2013-07-04
申请号：US13340446
申请日：2011-12-29
申请人： Jian Chen , Sergey Anatolievich Gorobets , Steven Sprouse
发明人： Jian Chen , Sergey Anatolievich Gorobets , Steven Sprouse
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7202 , G06F2212/7211 , G11C16/349 , G11C2211/5641
摘要： A method and system for SLC-MLC Wear Balancing in a flash memory device is disclosed. The flash memory device includes a single level cell (SLC) portion and a multi-level cell (MLC) portion. The age of the SLC portion and the MLC portion may differ, leading potentially to one portion wearing out before the other. In order to avoid this, a controller is configured to receive an age indicator from one or both of the SLC portion and the MLC portion, determine, based on the age indicator, whether to modify operation of the SLC portion and/or the MLC portion, and in response to determining to modifying operation, modify the operation of the at least one of the SLC portion or the MLC portion. The modification of the operation may thus balance wear between the SLC and MLC portions, thereby potentially extending the life of the flash memory device.
摘要翻译：公开了一种用于闪存设备中的SLC-MLC磨损平衡的方法和系统。闪速存储器件包括单级单元（SLC）部分和多级单元（MLC）部分。 SLC部分和MLC部分的时代可能不同，潜在地导致在另一部分之前磨损的部分。为了避免这种情况，控制器被配置为从SLC部分和MLC部分中的一个或两个接收年龄指示符，基于年龄指示符确定是否修改SLC部分和/或MLC部分的操作并且响应于确定修改操作，修改SLC部分或MLC部分中的至少一个的操作。因此，操作的修改可以平衡SLC和MLC部分之间的磨损，从而潜在地延长闪存设备的寿命。

4. 发明授权

US09329989B2 System and method for pre-interleaving sequential data 有权
标题翻译：用于预交错顺序数据的系统和方法
公开(公告)号：US09329989B2
公开(公告)日：2016-05-03
申请号：US13341704
申请日：2011-12-30
申请人： Steven Sprouse , Yichao Huang
发明人： Steven Sprouse , Yichao Huang
IPC分类号： G06F12/00 , G06F12/02 , G06F12/06 , G11C7/10
CPC分类号： G06F12/0246 , G06F12/0607 , G06F2212/1004 , G06F2212/1016 , G06F2212/7208 , G11C7/1042
摘要： A method and system for operating a memory device in programming mode is disclosed. The memory device includes a programming mode and a normal mode. The memory device in programming mode increases the number of physical planes that can be programmed in parallel than can be programmed in normal mode. In this way, the memory device may be programmed more quickly at various times of operation of the memory device (such as during manufacturing). The host system may send rearranged data to the memory device in programming mode with the rearranged data accounting for the increased number of physical planes programmed in parallel.
摘要翻译：公开了一种在编程模式下操作存储器件的方法和系统。存储器件包括编程模式和正常模式。编程模式下的存储器件可以增加可编程并行编程的物理平面数量，而不是在正常模式下编程。以这种方式，可以在存储器件的各种操作时间（例如在制造期间），更快地编程存储器件。主机系统可以在编程模式下将重新排列的数据发送到存储器件，重新排列的数据表示并行编程的物理平面数量的增加。

5. 发明申请

US20120005406A1 Garbage Collection of Memory Blocks Using Volatile Memory 有权
标题翻译：使用易失性存储器的内存块的垃圾收集
公开(公告)号：US20120005406A1
公开(公告)日：2012-01-05
申请号：US12828244
申请日：2010-06-30
申请人： Neil David Hutchison , Steven Sprouse
发明人： Neil David Hutchison , Steven Sprouse
IPC分类号： G06F12/02 , G06F17/30
CPC分类号： G06F12/0246
摘要： A method and system for performing garbage collection operations on update blocks in a memory device using volatile memory is disclosed. When performing a garbage collection operation, a first part of the data related to the garbage collection operation is written to a volatile memory in the memory device, and a second part of the data related to the garbage collection operation is written to a non-volatile memory in the memory device. The first part of the data that is written to the volatile memory (such as a random access memory) may comprise control information (such as mapping information of the logical addressable unit to a physical metablock). The second part of the data related to the garbage collection that is written to the non-volatile memory (such as a flash memory) may comprise the consolidated data in the update block.
摘要翻译：公开了一种使用易失性存储器在存储器件中对更新块执行垃圾收集操作的方法和系统。当执行垃圾收集操作时，将与垃圾收集操作相关的数据的第一部分写入存储器件中的易失性存储器，并且将与垃圾回收操作相关的数据的第二部分写入非易失性存储器存储器中的内存。写入易失性存储器（例如随机存取存储器）的数据的第一部分可以包括控制信息（例如逻辑可寻址单元映射到物理元区块的信息）。写入非易失性存储器（例如闪速存储器）的与垃圾收集相关的数据的第二部分可以包括更新块中的合并数据。

6. 发明授权

US09092340B2 Method and system for achieving die parallelism through block interleaving 有权
标题翻译：通过块交错实现并行度的方法和系统
公开(公告)号：US09092340B2
公开(公告)日：2015-07-28
申请号：US12642181
申请日：2009-12-18
申请人： Steven Sprouse , Chris Avila , Jianmin Huang
发明人： Steven Sprouse , Chris Avila , Jianmin Huang
IPC分类号： G06F12/02 , G06F12/08 , G11C7/10 , G11C11/56
CPC分类号： G11C11/5628 , G06F12/0246 , G06F12/0851 , G06F12/0871 , G06F2212/2022 , G06F2212/214 , G06F2212/222 , G06F2212/284 , G06F2212/313 , G06F2212/7203 , G06F2212/7208 , G11C7/1042 , G11C16/0483 , G11C2207/2245 , G11C2211/5641 , G11C2211/5643
摘要： A method and system for achieving die parallelism through block interleaving includes non-volatile memory having a multiple non-volatile memory dies, where each die has a cache storage area and a main storage area. A controller is configured to receive data and write sequentially addressed data to the cache storage area of a first die. The controller, after writing sequentially addressed data to the cache storage area of the first die equal to a block of the main storage area of the first die, writes additional data to a cache storage area of a next die until sequentially addressed data is written into the cache area of the next die equal to a block of the main storage area. The cache storage area may be copied to the main storage area on the first die while the cache storage area is written to on the next die.
摘要翻译：通过块交错实现管芯并行的方法和系统包括具有多个非易失性存储器管芯的非易失性存储器，其中每个管芯具有缓存存储区域和主存储区域。控制器被配置为接收数据并将顺序寻址的数据写入到第一管芯的缓存存储区域。控制器在将顺序寻址的数据写入与第一管芯的主存储区域的块相等的第一管芯的高速缓存存储区域之后，将附加数据写入下一个管芯的高速缓存存储区域，直到顺序寻址的数据被写入下一个芯片的高速缓存区域等于主存储区域的块。高速缓存存储区域可以被复制到第一裸片上的主存储区域，而缓存存储区域被写入到下一个芯片上。

7. 发明授权

US08775722B2 Storing data in parallel in a flash storage device using on chip page shifting between planes 有权
标题翻译：在闪存存储设备中并行存储数据，使用片上页面在平面之间切换
公开(公告)号：US08775722B2
公开(公告)日：2014-07-08
申请号：US13341543
申请日：2011-12-30
申请人： Steven Sprouse , Sergey Anatolievich Gorobets
发明人： Steven Sprouse , Sergey Anatolievich Gorobets
IPC分类号： G06F12/00
CPC分类号： G11C7/1012 , G11C11/5621 , G11C16/10
摘要： Methods and systems are disclosed herein for storing data in a memory device. Data for multiple pages is written in parallel using plane interleaving. For example, in a four plane write, a first set of four pages are written in the following sequence: 0, 1, 2, 3. A second set of four pages, after plane interleaving, are written in the following sequent: 7, 4, 5, 6. After writing the data, the pages of written data are read, page swapped if necessary, and then written into another portion of memory (such as MLC).
摘要翻译：本文公开了用于将数据存储在存储器件中的方法和系统。使用平面交错并行写入多页数据。例如，在四平面写入中，按照以下顺序写入第一组四页：0,1,2,3。在平面交织之后的第二组四页被写入随后的后续步骤：7，写入数据后，读取写入数据的页面，如果需要，页面交换，然后写入存储器的另一部分（如MLC）。

8. 发明授权

US08626986B2 Pre-emptive garbage collection of memory blocks 有权
标题翻译：内存块的优先垃圾收集
公开(公告)号：US08626986B2
公开(公告)日：2014-01-07
申请号：US12828241
申请日：2010-06-30
申请人： William Wu , Shai Traister , Jianmin Huang , Neil David Hutchison , Steven Sprouse
发明人： William Wu , Shai Traister , Jianmin Huang , Neil David Hutchison , Steven Sprouse
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G06F12/0253
摘要： A method and system pre-emptively perform garbage collection operations of a forced amount on update blocks in a memory device. The amount of garbage collection needed by a certain data write is monitored and adjusted to match the forced amount if necessary. Update blocks may be selected on the basis of their recent usage or the amount of garbage collection required. Another method and system may store control information about update blocks in a temporary storage area so that a greater number of update blocks are utilized. The sequential write performance measured by the Speed Class test may be optimized by using this method and system.
摘要翻译：一种方法和系统在存储器设备中的更新块上优先地执行强制量的垃圾回收操作。监视和调整某些数据写入所需的垃圾回收量，以便在必要时与强制量匹配。可以基于它们最近的使用或所需的垃圾收集量来选择更新块。另一种方法和系统可以将关于更新块的控制信息存储在临时存储区域中，以便利用更多数量的更新块。通过速度等级测试测量的顺序写入性能可以通过使用此方法和系统进行优化。

9. 发明申请

US20130173874A1 System and Method for Pre-interleaving Sequential Data 有权
标题翻译：用于预交错顺序数据的系统和方法
公开(公告)号：US20130173874A1
公开(公告)日：2013-07-04
申请号：US13341704
申请日：2011-12-30
申请人： Steven Sprouse , Yichao Huang
发明人： Steven Sprouse , Yichao Huang
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F12/0607 , G06F2212/1004 , G06F2212/1016 , G06F2212/7208 , G11C7/1042
摘要： A method and system for operating a memory device in programming mode is disclosed. The memory device includes a programming mode and a normal mode. The memory device in programming mode increases the number of physical planes that can be programmed in parallel than can be programmed in normal mode. In this way, the memory device may be programmed more quickly at various times of operation of the memory device (such as during manufacturing). The host system may send rearranged data to the memory device in programming mode with the rearranged data accounting for the increased number of physical planes programmed in parallel.
摘要翻译：公开了一种在编程模式下操作存储器件的方法和系统。存储器件包括编程模式和正常模式。编程模式下的存储器件可以增加可编程并行编程的物理平面数量，而不是在正常模式下编程。以这种方式，可以在存储器件的各种操作时间（例如在制造期间），更快地编程存储器件。主机系统可以在编程模式下将重新排列的数据发送到存储器件，重新排列的数据表示并行编程的物理平面数量的增加。

10. 发明申请

US20110296122A1 METHOD AND SYSTEM FOR BINARY CACHE CLEANUP 有权
标题翻译：二进制缓存的方法和系统
公开(公告)号：US20110296122A1
公开(公告)日：2011-12-01
申请号：US12790960
申请日：2010-05-31
申请人： William WU , Steven Sprouse , Sergei Anatolievich Gorobets , Alan Bennett , Ameen Aslam
发明人： William WU , Steven Sprouse , Sergei Anatolievich Gorobets , Alan Bennett , Ameen Aslam
IPC分类号： G06F12/00
CPC分类号： G06F12/121 , G06F12/0804 , G06F12/0866
摘要： A system and method for clearing data from a cache in a storage device is disclosed. The method may include analyzing the cache for the least recently fragmented logical group, and evicting the entries from the least recently fragmented logical group. Or, the method may also include analyzing compaction history and selecting entries for eviction based on the analysis of the compaction history. The method may also include scheduling of different eviction mechanisms during various operations of the storage device. The system may include a cache storage, a main storage and a controller configured to evict entries associated with a least recently fragmented logical group, configured to evict entries based on analysis of compaction history, or configured to schedule different eviction mechanisms during various operations of the storage device.
摘要翻译：公开了一种用于从存储设备中的高速缓存清除数据的系统和方法。该方法可以包括分析用于最近分段的逻辑组的高速缓存，以及从最近最近分段的逻辑组中逐出的条目。或者，该方法还可以包括分析压实历史并且基于对压实历史的分析来选择用于驱逐的条目。该方法还可以包括在存储设备的各种操作期间调度不同的逐出机制。系统可以包括高速缓存存储器，主存储器和被配置为驱逐与最近最近分段的逻辑组相关联的条目的控制器，其被配置为基于压缩历史的分析来驱逐条目，或者被配置为在不同的操作期间调度不同的驱逐机制储存设备。

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