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1. 发明授权

US06919168B2 Masking methods and etching sequences for patterning electrodes of high density RAM capacitors 失效
标题翻译：用于高密度RAM电容器的图形化电极的掩模方法和蚀刻顺序
公开(公告)号：US06919168B2
公开(公告)日：2005-07-19
申请号：US10057674
申请日：2002-01-24
申请人： Jeng H. Hwang , Steve S. Y. Mak , True-Lon Lin , Chentsau Ying , John W. Schaller
发明人： Jeng H. Hwang , Steve S. Y. Mak , True-Lon Lin , Chentsau Ying , John W. Schaller
IPC分类号： C23F4/00 , H01L21/02 , H01L21/3213 , G03F7/00 , G03F7/36
CPC分类号： H01L28/60 , C23F4/00 , H01L21/32136 , H01L21/32139
摘要： A method of etching a noble metal electrode layer disposed on a substrate to produce a semiconductor device including a plurality of electrodes separated by a distance equal to or less than about 0.35 μm and having a noble metal profile equal to or greater than about 80°. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the noble metal electrode layer by employing a high density inductively coupled plasma of an etchant gas comprising a gas selected from the group consisting of nitrogen, oxygen, a halogen (e.g., chlorine), argon, and a gas selected from the group consisting of BCl3, HBr, and SiCl4 mixtures thereof. Masking methods and etching sequences for patterning high density RAM capacitors are also provided.
摘要翻译：一种蚀刻设置在基板上的贵金属电极层的方法，以制造半导体器件，该半导体器件包括间隔等于或小于约0.35μm并且具有等于或大于约80°的贵金属形状的多个电极。该方法包括将衬底加热到大于约150℃的温度，并且通过采用蚀刻剂气体的高密度电感耦合等离子体蚀刻贵金属电极层，所述等离子体包括选自氮，氧，卤素（例如氯），氩气和选自BCl 3，HBr和SiCl 4+混合物的气体。还提供了用于图案化高密度RAM电容器的掩模方法和蚀刻顺序。

2. 发明授权

US06749770B2 Method of etching an anisotropic profile in platinum 失效
标题翻译：在铂中蚀刻各向异性轮廓的方法
公开(公告)号：US06749770B2
公开(公告)日：2004-06-15
申请号：US09948028
申请日：2001-09-05
申请人： Jeng H. Hwang , Chentsau Ying , Kang-Lie Chiang , Steve S. Y. Mak
发明人： Jeng H. Hwang , Chentsau Ying , Kang-Lie Chiang , Steve S. Y. Mak
IPC分类号： C09K1300
CPC分类号： H01L28/60 , C23F4/00 , H01L21/32136 , H01L21/32139
摘要： A method of etching a platinum electrode layer disposed on a substrate to produce a semiconductor device including a plurality of platinum electrodes. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the platinum electrode layer by employing a plasma of an etchant gas comprising nitrogen and a halogen (e.g. chlorine), and a gas selected from the group consisting of a noble gas (e.g. argon), BCl3, HBr, SiCl4 and mixtures thereof. The substrate may be heated in a reactor chamber having a dielectric window including a deposit-receiving surface having a surface finish comprising a peak-to-valley roughness height with an average height value of greater than about 1000 Å.
摘要翻译：一种蚀刻设置在基板上的铂电极层的方法，以制造包括多个铂电极的半导体器件。该方法包括将衬底加热到大于约150℃的温度，并且通过使用包含氮和卤素（例如氯）的蚀刻剂气体的等离子体和选自以下的气体来蚀刻铂电极层：惰性气体（例如氩气），BCl 3，HBr，SiCl 4及其混合物。衬底可以在具有介电窗口的反应器室中加热，所述电介质窗口包括具有表面光洁度的沉积物接收表面，所述沉积物接收表面包括具有大于约的平均高度值的峰 - 谷粗糙度高度。

3. 发明授权

US06323132B1 Etching methods for anisotropic platinum profile 失效
标题翻译：各向异性铂型材蚀刻方法
公开(公告)号：US06323132B1
公开(公告)日：2001-11-27
申请号：US09251826
申请日：1999-02-17
申请人： Jeng H. Hwang , Chentsau Ying , Kang-Lie Chiang , Steve S. Y. Mak
发明人： Jeng H. Hwang , Chentsau Ying , Kang-Lie Chiang , Steve S. Y. Mak
IPC分类号： H01L21302
CPC分类号： H01L28/60 , C23F4/00 , H01L21/32136 , H01L21/32139
摘要： A method of etching a platinum electrode layer disposed on a substrate to produce a semiconductor device including a plurality of platinum electrodes. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the platinum electrode layer by employing a plasma of an etchant gas comprising nitrogen and a halogen (e.g. chlorine), and a gas selected from the group consisting of a noble gas (e.g. argon), BCl3, HBr, SiCl4 and mixtures thereof. The substrate may be heated in a reactor chamber having a dielectric window including a deposit-receiving surface having a surface finish comprising a peak-to-valley roughness height with an average height value of greater than about 1000 Å.
摘要翻译：一种蚀刻设置在基板上的铂电极层的方法，以制造包括多个铂电极的半导体器件。该方法包括将衬底加热到大于约150℃的温度，并且通过使用包含氮和卤素（例如氯）的蚀刻剂气体的等离子体和选自以下的气体来蚀刻铂电极层：惰性气体（例如氩气），BCl 3，HBr，SiCl 4及其混合物。衬底可以在具有介电窗口的反应器室中加热，所述电介质窗口包括具有表面光洁度的沉积物接收表面，所述沉积物接收表面包括具有大于约的平均高度值的峰 - 谷粗糙度高度。

4. 发明授权

US06265318B1 Iridium etchant methods for anisotropic profile 失效
标题翻译：各向异性铱刻蚀方法
公开(公告)号：US06265318B1
公开(公告)日：2001-07-24
申请号：US09251633
申请日：1999-02-17
申请人： Jeng H. Hwang , Chentsau Ying , Guang Xiang Jin , Steve S. Y. Mak
发明人： Jeng H. Hwang , Chentsau Ying , Guang Xiang Jin , Steve S. Y. Mak
IPC分类号： H01L2100
CPC分类号： H01L28/60 , C23F4/00 , H01L21/32136 , H01L21/32139
摘要： A method of etching an electrode layer (e.g., a platinum electrode layer or an iridium electrode layer) disposed on a substrate to produce a semiconductor device including a plurality of electrodes separated by a distance equal to or less than about 0.3 &mgr;m and having a profile equal to or greater than about 85°. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the electrode layer by employing a high density inductively coupled plasma of an etchant gas comprising oxygen and/or chlorine, argon and a gas selected from the group consisting of BCl3, HBr, HCl and mixtures thereof. A semiconductor device having a substrate and a plurality of electrodes supported by the substrate. The electrodes have a dimension (e.g., a width) which include a value equal to or less than about 0.3 &mgr;m and a profile equal to or greater than about 85°.
摘要翻译：一种蚀刻设置在基板上的电极层（例如，铂电极层或铱电极层）的方法，以制造半导体器件，该半导体器件包括间隔等于或小于约0.3μm的多个电极，并具有轮廓等于或大于约85°。该方法包括将衬底加热到大于约150℃的温度，并且通过采用包含氧和/或氯，氩和选自以下的气体的气体的高密度电感耦合等离子体来蚀刻电极层：的BCl 3，HBr，HCl及其混合物。一种半导体器件，具有基板和由基板支撑的多个电极。电极具有包括等于或小于约0.3μm的值和等于或大于约85°的轮廓的尺寸（例如，宽度）。

5. 发明授权

US06277251B1 Apparatus and method for shielding a dielectric member to allow for stable power transmission into a plasma processing chamber 失效
标题翻译：用于屏蔽电介质构件以允许稳定的电力传输到等离子体处理室中的装置和方法
公开(公告)号：US06277251B1
公开(公告)日：2001-08-21
申请号：US09515695
申请日：2000-02-29
申请人： Jeng H. Hwang , Steve S. Y. Mak , Yan Ye
发明人： Jeng H. Hwang , Steve S. Y. Mak , Yan Ye
IPC分类号： C23C1434
CPC分类号： H01J37/32504
摘要： An assembly for allowing stable power transmission into a plasma processing chamber comprising a dielectric member; and at least one material deposition support assembly secured to the dielectric member for receiving and supporting the deposition of materials during processing of a substrate and a chamber having a controlled environment and containing a plasma of a processing gas. A plasma reactor for processing substrates having a reactor chamber including a chamber sidewall and a dielectric window supported by the chamber sidewall. A plurality of deposition support members is coupled to an inside surface of the dielectric window for receiving and supporting a deposition of materials during processing of substrates. In an alternative embodiment of the invention, the plurality of deposition support members is connected to a liner assembly instead of to the dielectric window. The liner assembly is supported by the chamber sidewall. A pedestal is disposed in the reactor chamber for supporting substrates, such as semiconductor wafers, in the reacting chamber. The plasma reactor also includes a processing power source, a processing power gas-introducing assembly for introducing processing gas into the reactor chamber, and a processing power-transmitting member for transmitting power into the reactor interior to aid in sustaining a plasma from the processing gas within the reacting chamber. A method for adjusting the density of plasma contained in a chamber wherein substrates are to be processed. A method of processing (e.g. etching or depositing) a metal layer disposed on a substrate.
摘要翻译：一种用于允许稳定的电力传输到包括电介质构件的等离子体处理室中的组件; 以及固定到电介质构件的至少一个材料沉积支撑组件，用于在衬底和具有受控环境的腔室的处理过程中接收和支撑材料的沉积并且包含处理气体的等离子体。一种用于处理基板的等离子体反应器，其具有包括室侧壁和由室侧壁支撑的电介质窗的反应室。多个沉积支撑构件联接到电介质窗口的内表面，用于在衬底的处理期间接收和支撑材料的沉积。在本发明的替代实施例中，多个沉积支撑构件连接到衬垫组件而不是电介质窗口。衬套组件由腔室侧壁支撑。基座设置在反应室中，用于在反应室中支撑诸如半导体晶片的衬底。等离子体反应器还包括处理电源，用于将处理气体引入反应室的处理能力气体引入组件和用于将动力传送到反应器内部以帮助维持来自处理气体的等离子体的处理能力传递部件在反应室内。一种用于调节包含在其中将要处理衬底的腔室中的等离子体的密度的方法。处理（例如蚀刻或沉积）设置在基板上的金属层的方法。

6. 发明授权

US06579796B2 Method of etching platinum using a silicon carbide mask 失效
标题翻译：使用碳化硅掩模蚀刻铂的方法
公开(公告)号：US06579796B2
公开(公告)日：2003-06-17
申请号：US10013605
申请日：2001-12-10
申请人： Chentsau Ying , Jeng H. Hwang , Luc Van Autryve
发明人： Chentsau Ying , Jeng H. Hwang , Luc Van Autryve
IPC分类号： H01L21302
CPC分类号： H01J37/32862 , H01L21/32136 , H01L21/32139 , Y10S438/905
摘要： Disclosed herein is a method of etching platinum using a silicon carbide mask. The method comprises providing an etch stack including a patterned silicon carbide layer overlying a layer of platinum, then pattern etching the platinum layer using a plasma generated from a source gas comprising Cl2, BCl3, and a nonreactive, diluent gas. The silicon carbide mask can be deposited and patterned using standard industry techniques, and can be easily removed without damaging either the platinum or an underlying doped substrate material. The method provides a smooth platinum etch profile and an etch profile angle of about 75° to about 90°. Also disclosed herein are methods of forming semiconductor structures useful in the preparation of DRAM and FeRAM cells.
摘要翻译：本文公开了使用碳化硅掩模蚀刻铂的方法。该方法包括提供包括覆盖铂层的图案化碳化硅层的蚀刻堆叠，然后使用由包含Cl 2，BCl 3和非反应性稀释气体的源气体产生的等离子体来刻蚀铂层。可以使用标准工业技术沉积和图案化碳化硅掩模，并且可以容易地去除碳化硅掩模，而不会损坏铂或下掺杂的衬底材料。该方法提供平滑的铂蚀刻轮廓和约75°至约90°的蚀刻轮廓角。本文还公开了形成用于制备DRAM和FeRAM单元的半导体结构的方法。

7. 发明授权

US06541380B2 Plasma etching process for metals and metal oxides, including metals and metal oxides inert to oxidation 失效
标题翻译：金属和金属氧化物的等离子体蚀刻工艺，包括对氧化物惰性的金属和金属氧化物
公开(公告)号：US06541380B2
公开(公告)日：2003-04-01
申请号：US09912579
申请日：2001-07-24
申请人： Chentsau Ying , Jeng H. Hwang
发明人： Chentsau Ying , Jeng H. Hwang
IPC分类号： H01L21302
CPC分类号： H01L21/32139 , C23F4/00 , H01L21/32136 , H01L28/60
摘要： A method of etching a metal or metal oxide, including a platinum family metal or a platinum family metal oxide. A wafer is first provided which comprises: (a) a semiconductor substrate, (b) a metal or metal oxide layer over the semiconductor substrate, and (c) a titanium containing patterned mask layer having one or more apertures formed therein positioned over the metal or metal oxide layer. The metal or metal oxide is then etched through the apertures in the mask layer by a plasma etching step that uses plasma source gases comprising the following: (a) a gas that comprises one or more carbon-oxygen bonds (for example, CO gas or CO2 gas) and (b) a gas that comprises one or more chlorine atoms (for example, Cl2 gas, carbon tetrachloride gas, silicon tetrachloride gas or boron trichloride gas).
摘要翻译：一种蚀刻包括铂族金属或铂族金属氧化物的金属或金属氧化物的方法。首先提供晶片，其包括：（a）半导体衬底，（b）半导体衬底上的金属或金属氧化物层，以及（c）在其上形成有一个或多个孔的含钛图案化掩模层，位于金属或金属氧化物层。然后通过使用等离子体源气体的等离子体蚀刻步骤，通过掩模层中的孔蚀刻金属或金属氧化物，所述等离子体源气体包括：（a）包含一个或多个碳 - 氧键的气体（例如，CO气体或 CO 2气体）和（b）包含一个或多个氯原子的气体（例如，Cl 2气体，四氯化碳气体，四氯化硅气体或三氯化硼气体）。

8. 发明授权

US6037264A Method for removing redeposited veils from etched platinum 失效
公开(公告)号：US6037264A
公开(公告)日：2000-03-14
申请号：US371593
申请日：1999-08-10
申请人： Jeng H. Hwang
发明人： Jeng H. Hwang
IPC分类号： H01L21/302 , C23F4/00 , H01L21/02 , H01L21/3065 , H01L21/3213 , H01L21/00
CPC分类号： H01L21/02071 , C23F4/00 , H01L21/32136
摘要： A method of etching a platinum electrode layer disposed on a substrate. The method comprises providing a substrate supporting a platinum electrode layer, an insulation layer on the platinum electrode layer, and a resist layer on the insulation layer. A portion of the insulation layer is etched by employing a plasma of an etchant gas to break through and to remove the portion of the insulation layer from the platinum electrode layer to expose part of the platinum electrode layer. The exposed part of the platinum electrode layer is then etched by employing a plasma of an etchant gas comprising argon. The etched platinum electrode layer is subsequently overetched by employing a high density plasma of an etchant gas to remove redeposited veils from the etched platinum electrode layer. The etched platinum electrode layer is employed in a semiconductor device.

9. 发明授权

US06709609B2 Plasma heating of a substrate with subsequent high temperature etching 失效
标题翻译：随后进行高温蚀刻的衬底的等离子体加热
公开(公告)号：US06709609B2
公开(公告)日：2004-03-23
申请号：US09747667
申请日：2000-12-22
申请人： Jeng H. Hwang , Xiaoyi Chen
发明人： Jeng H. Hwang , Xiaoyi Chen
IPC分类号： C03C2568
CPC分类号： C23F4/00 , H01L21/32136
摘要： We have discovered a method of reducing the effect of material sputtered/etched during the preheating of a substrate. One embodiment of the method pertains to preheating a substrate which includes a metal-containing layer which is to be pattern etched subsequent to preheating. The method includes exposing the substrate to a preheating plasma which produces a deposit or residue during preheating which is more easily etched than said metal-containing layer during the subsequent plasma etching of said metal-containing layer.
摘要翻译：我们已经发现了减少在衬底预热期间溅射/蚀刻的材料的影响的方法。该方法的一个实施方案涉及预热衬底，其包括在预热之后被图案蚀刻的含金属层。该方法包括将衬底暴露于预热等离子体中，其在预热期间产生沉积物或残留物，其在所述含金属层的随后等离子体蚀刻期间比所述含金属层更容易蚀刻。

10. 发明授权

US06277762B1 Method for removing redeposited veils from etched platinum 失效
标题翻译：从蚀刻铂去除再沉积的面纱的方法
公开(公告)号：US06277762B1
公开(公告)日：2001-08-21
申请号：US09524771
申请日：2000-03-14
申请人： Jeng H. Hwang
发明人： Jeng H. Hwang
IPC分类号： H01L2100
CPC分类号： H01L21/02071 , C23F4/00 , H01L21/32136
摘要： A method of etching a platinum electrode layer disposed on a substrate. The method comprises providing a substrate supporting a platinum electrode layer, an insulation layer on the platinum electrode layer, and a resist layer on the insulation layer. A portion of the insulation layer is etched by employing a plasma of an etchant gas to break through and to remove the portion of the insulation layer from the platinum electrode layer to expose part of the platinum electrode layer. The exposed part of the platinum electrode layer is then etched by employing a plasma of an etchant gas comprising argon. The etched platinum electrode layer is subsequently overetched by employing a high density plasma of an etchant gas to remove redeposited veils from the etched platinum electrode layer. The etched platinum electrode layer is employed in a semiconductor device.
摘要翻译：蚀刻设置在基板上的铂电极层的方法。该方法包括提供支撑铂电极层的基板，铂电极层上的绝缘层和绝缘层上的抗蚀剂层。通过使用蚀刻剂气体的等离子体来破坏绝缘层的一部分，以从铂电极层中除去绝缘层的一部分以暴露部分铂电极层。然后通过使用包含氩的蚀刻剂气体的等离子体来蚀刻铂电极层的暴露部分。随后通过使用蚀刻剂气体的高密度等离子体去除蚀刻的铂电极层，以从蚀刻的铂电极层去除再沉积的面纱。蚀刻后的铂电极层用于半导体器件。

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