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1. 发明授权

US06184908B2 Method and apparatus for co-processing video graphics data 失效
标题翻译：用于协处理视频图形数据的方法和装置
公开(公告)号：US06184908B2
公开(公告)日：2001-02-06
申请号：US09067512
申请日：1998-04-27
申请人： Jason CK Chan , Milivoje Aleksic , Antonio Asaro , James Doyle , Indra Laksono
发明人： Jason CK Chan , Milivoje Aleksic , Antonio Asaro , James Doyle , Indra Laksono
IPC分类号： G06F1500
CPC分类号： G06T15/005
摘要： To minimize CPU processing requirements for preparing and transferring data to a graphics processor, a graphics command processor is provided that supports application-level commands and references to the data associated with these commands. The graphics command processor parses the application command and data reference parameters, and subsequently fetches the appropriate graphics data from memory directly, without requiring additional CPU resources. To optimize performance, the graphics command processor fetches the data in parallel with the parsing and processing of the application commands from the CPU. The graphics command processor also includes a processing unit that converts the data from the format used by the application program to the format used for rendering. The graphics command processor creates the commands and data sequences used by a graphics engine to render each object of the image. Because the graphics command processor is closely coupled with the graphics engine, a number of efficiency can be gained, particularly with regard to the transfer of related data items. The processing of the primitive graphic command and data sequences by the graphics engine is asynchronous with the receipt of subsequent commands from the CPU and the fetching of subsequent data associated with the commands from the memory. In this manner, the latency associated with the conventional sequential processing of graphics data is minimized.
摘要翻译：为了最大限度地减少CPU处理对图形处理器的准备和传输数据的需求，提供了一个图形命令处理器，支持应用级命令和对与这些命令相关联的数据的引用。图形命令处理器解析应用程序命令和数据参考参数，然后直接从存储器中获取适当的图形数据，而不需要额外的CPU资源。为了优化性能，图形命令处理器从CPU解析和处理应用程序命令并行获取数据。图形命令处理器还包括处理单元，其将来自应用程序使用的格式的数据转换为用于呈现的格式。图形命令处理器创建由图形引擎使用以渲染图像的每个对象的命令和数据序列。因为图形命令处理器与图形引擎紧密耦合，所以可以获得许多效率，特别是关于相关数据项的传送。图形引擎对原始图形命令和数据序列的处理与从CPU接收后续命令以及从与存储器的命令相关联的后续数据的获取是异步的。以这种方式，与图形数据的常规顺序处理相关联的延迟最小化。

2. 发明授权

US06728820B1 Method of configuring, controlling, and accessing a bridge and apparatus therefor 有权
标题翻译：配置，控制和访问其桥及其设备的方法
公开(公告)号：US06728820B1
公开(公告)日：2004-04-27
申请号：US09579006
申请日：2000-05-26
申请人： Lee Brian , Indra Laksono , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Milivoje Aleksic
发明人： Lee Brian , Indra Laksono , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Milivoje Aleksic
IPC分类号： G06F1336
CPC分类号： G06F3/14
摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.
摘要翻译：在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。系统总线连接到连接到第二和第三AGP总线的数据桥。每个AGP总线都连接到图形处理器。桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。本发明的另一方面允许在各种AGP协议部分之间进行转换。

3. 发明授权

US06633296B1 Apparatus for providing data to a plurality of graphics processors and method thereof 有权
标题翻译：用于向多个图形处理器提供数据的装置及其方法
公开(公告)号：US06633296B1
公开(公告)日：2003-10-14
申请号：US09579432
申请日：2000-05-26
申请人： Indra Laksono , Milivoje Aleksic , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Brian Lee
发明人： Indra Laksono , Milivoje Aleksic , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Brian Lee
IPC分类号： G06F1516
CPC分类号： G06F3/14 , G09G5/363 , G09G2352/00 , G09G2360/06
摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.
摘要翻译：在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。系统总线连接到连接到第二和第三AGP总线的数据桥。每个AGP总线都连接到图形处理器。桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。本发明的另一方面允许在各种AGP协议部分之间进行转换

4. 发明授权

US06789154B1 Apparatus and method for transmitting data 有权
标题翻译：用于传输数据的装置和方法
公开(公告)号：US06789154B1
公开(公告)日：2004-09-07
申请号：US09579203
申请日：2000-05-26
申请人： Brian Lee , Indra Laksono , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Milivoje Aleksic
发明人： Brian Lee , Indra Laksono , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Milivoje Aleksic
IPC分类号： G06F1314
CPC分类号： G06F13/404
摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.
摘要翻译：在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。系统总线连接到连接到第二和第三AGP总线的数据桥。每个AGP总线都连接到图形处理器。桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。本发明的另一方面允许在各种AGP协议部分之间进行转换。

5. 发明授权

US06670958B1 Method and apparatus for routing data to multiple graphics devices 有权
标题翻译：将数据路由到多个图形设备的方法和装置
公开(公告)号：US06670958B1
公开(公告)日：2003-12-30
申请号：US09579224
申请日：2000-05-26
申请人： Milivoje Aleksic , Indra Laksono , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Brian Lee
发明人： Milivoje Aleksic , Indra Laksono , Antonio Asaro , Andrew E. Gruber , Gordon Caruk , Brian Lee
IPC分类号： G06F1516
CPC分类号： G06F3/14 , G09G5/363 , G09G2352/00
摘要： In a specific embodiment, a system for providing video includes a system bus, which in one embodiment is an Advanced Graphics Port (AGP) busy. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.
摘要翻译：在具体实施例中，用于提供视频的系统包括系统总线，其在一个实施例中是高级图形端口（AGP）忙。系统总线连接到连接到第二和第三AGP总线的数据桥。每个AGP总线都连接到图形处理器。桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。本发明的另一方面允许在各种AGP协议部分之间进行转换。

6. 发明授权

US06662257B1 Multiple device bridge apparatus and method thereof 有权
标题翻译：多设备桥接装置及其方法
公开(公告)号：US06662257B1
公开(公告)日：2003-12-09
申请号：US09579202
申请日：2000-05-26
申请人： Gordon Caruk , Indra Laksono , Antonio Asaro , Andrew E. Gruber , Milivoje Aleksic , Brian Lee
发明人： Gordon Caruk , Indra Laksono , Antonio Asaro , Andrew E. Gruber , Milivoje Aleksic , Brian Lee
IPC分类号： G06F1314
CPC分类号： G06F13/404 , G06F3/14
摘要： In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.
摘要翻译：在具体实施例中，公开了一种用于提供视频的系统，该系统具有系统总线，其在一个实施例中是高级图形端口（AGP）总线。系统总线连接到连接到第二和第三AGP总线的数据桥。每个AGP总线都连接到图形处理器。桥接器基于存储在路由表或寄存器组中的存储器映射信息，将数据请求从一个图形处理器路由到第二图形处理器而不访问系统AGP总线。在本发明的另一方面，桥接器使用可以根据特定操作模式而变化的属性来响应初始化请求。本发明的另一方面允许在各种AGP协议部分之间进行转换。

7. 发明授权

US6100906A Method and apparatus for improved double buffering 失效
标题翻译：改进双缓冲的方法和装置
公开(公告)号：US6100906A
公开(公告)日：2000-08-08
申请号：US64569
申请日：1998-04-22
申请人： Antonio Asaro , Indra Laksono , James Doyle , Gordon F. Grigor
发明人： Antonio Asaro , Indra Laksono , James Doyle , Gordon F. Grigor
IPC分类号： G09G5/36 , G09G5/39 , G09G5/393 , G09G5/399 , G06F13/00
CPC分类号： G09G5/399 , G09G5/363
摘要： A method and apparatus for improved double buffering within a computing system begins when a series of data blocks are received from a central processing unit at a rate independent of a processing rate of a recipient engine. For example, a video graphics circuit receives a series of data blocks representing video frames from the central processing unit at a rate independent of the refresh rate of the display. As the data blocks are received, the video graphics circuit queues commands of the data blocks. Typically, the commands include processing commands and a processing rate synchronize command. To process the data blocks, the co-processor pulls commands from the queued list and processes them to produce recipient data. As the co-processor is producing the recipient data, it is utilizing a first buffer. The co-processor continues to process the commands and storing the results into the first buffer until the processing rate synchronize command is detected. At this point, the co-processor pauses processing of the commands. At the beginning of the next cycle of the processing rate, the recipient data is provided from the first buffer to the recipient engine and the co-processor resumes processing of commands, which relate to another data block. As the co-processor is processing the commands of the second data block, it is utilizing a second buffer to store the processed data, i.e., the second recipient data.
摘要翻译：一种用于在计算系统内改进双缓冲的方法和装置开始于以与接收机发动机的处理速率无关的速率从中央处理单元接收一系列数据块时开始。例如，视频图形电路以与显示器的刷新率无关的速率从中央处理单元接收表示视频帧的一系列数据块。当数据块被接收时，视频图形电路对数据块的命令进行排队。通常，命令包括处理命令和处理速率同步命令。为了处理数据块，协处理器从排队列表中提取命令并处理它们以产生接收方数据。当协处理器产生接收者数据时，它正在利用第一缓冲器。协处理器继续处理命令并将结果存储到第一缓冲器中，直到检测到处理速率同步命令。此时，协处理器暂停处理命令。在处理速率的下一周期的开始，从第一缓冲器向接收者引擎提供接收者数据，并且协处理器恢复与另一个数据块有关的命令的处理。当协处理器正在处理第二数据块的命令时，它利用第二缓冲器来存储经处理的数据，即第二接收者数据。

8. 发明授权

US06747654B1 Multiple device frame synchronization method and apparatus 有权
标题翻译：多设备帧同步方法和装置
公开(公告)号：US06747654B1
公开(公告)日：2004-06-08
申请号：US09553977
申请日：2000-04-20
申请人： Indra Laksono , Milivoje Aleksic
发明人： Indra Laksono , Milivoje Aleksic
IPC分类号： G06F1516
CPC分类号： G06T15/005 , G06T1/20 , G06T2210/52
摘要： A multiple device frame synchronization method and apparatus utilizes events completion signaling between multiple devices, such as multiple graphics processors. The signaling serves as a stall command for stalling graphics data rendering commands in a command FIFO of the rendering engine of a graphics processor in response to a rendering complete signal, or other event signal generated by the other graphics processor. Accordingly, the processor that, for example, completes a current frame relay is stalled until the other processor has completed its rendering function for a particular odd line, even line, entire frame or partial frame as desired.
摘要翻译：多设备帧同步方法和装置利用诸如多个图形处理器的多个设备之间的事件完成信令。信令用作响应于再现完成信号或由另一图形处理器生成的其他事件信号而停止图形处理器的渲染引擎的命令FIFO中的图形数据呈现命令的停止命令。因此，例如完成当前帧中继的处理器停止，直到另一个处理器根据需要完成其特定奇数行，偶数行，整个帧或部分帧的渲染功能。

9. 发明授权

US6141024A Generating color text 失效
标题翻译：生成彩色文本
公开(公告)号：US6141024A
公开(公告)日：2000-10-31
申请号：US792784
申请日：1997-02-03
申请人： Indra Laksono , Antonio Asaro , Carl K. Mizuyabu
发明人： Indra Laksono , Antonio Asaro , Carl K. Mizuyabu
IPC分类号： G09G5/393 , G09G5/36
CPC分类号： G09G5/393
摘要： A rasterizer is used with a processor capable of providing raster data indicative of a pattern of pixels to be formed on a display. Each pixel has an attribute represented by a data value. The rasterizer has a replicator connected to form at least two copies of the raster data. A graphics engine is connected to use the at least two copies to store the data values in a memory. An output circuit is connected to use the data values stored in the memory to form the pattern on the display.
摘要翻译：光栅化器与能够提供指示要在显示器上形成的像素的图案的光栅数据的处理器一起使用。每个像素具有由数据值表示的属性。光栅化器具有连接的复制器以形成光栅数据的至少两个副本。连接图形引擎以使用至少两个副本将数据值存储在存储器中。连接输出电路以使用存储在存储器中的数据值在显示器上形成图案。

10. 发明授权

US06339427B1 Graphics display list handler and method 有权
标题翻译：图形显示列表处理程序和方法
公开(公告)号：US06339427B1
公开(公告)日：2002-01-15
申请号：US09211637
申请日：1998-12-15
申请人： Indra Laksono , Antonio Asaro
发明人： Indra Laksono , Antonio Asaro
IPC分类号： G06T1500
CPC分类号： G06T15/005
摘要： A graphics display command list handler and method requests allocation of memory, such as system memory, in the form of a circular FIFO which stores the display command list as a memory display list (MDL), such as a host memory display list. A processor, such as a graphics processor, communicates a host memory display list read pointer to the host processor to facilitate display list signaling by the graphics processor. The host processor (or other processor) maintains a write pointer which points to a last host memory entry in the display list. The read pointer is maintained by the graphics processor and written back to the host processor.
摘要翻译：图形显示命令列表处理程序和方法请求以循环FIFO的形式分配诸如系统存储器的存储显示命令列表作为诸如主机存储器显示列表的存储器显示列表（MDL）的存储器。诸如图形处理器的处理器将主机存储器显示列表读取指针传送到主机处理器以便于图形处理器的显示列表信令。主机处理器（或其他处理器）维护写入指针，该指针指向显示列表中的最后一个主机存储器条目。读指针由图形处理器维护并写回到主处理器。

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