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    • 7. 发明授权
    • Storage system cache using flash memory with direct block access
    • 存储系统缓存使用直接块访问的闪存
    • US08583868B2
    • 2013-11-12
    • US13220256
    • 2011-08-29
    • Wendy A. BelluominiBinny S. GillJames L. HafnerSteven R. HetzlerVenu G. NayarDaniel F. SmithKrishnakumar Rao Surugucchi
    • Wendy A. BelluominiBinny S. GillJames L. HafnerSteven R. HetzlerVenu G. NayarDaniel F. SmithKrishnakumar Rao Surugucchi
    • G06F12/16
    • G06F12/0866G06F2212/222G06F2212/262
    • Embodiments of the invention enable a storage cache, comprising flash memory devices, to have direct block access to the flash such that the physical block addresses are presented to the storage system's cache layer, which thereby controls the storage cache data stream. An aspect of the invention includes a caching storage system. The caching storage system comprises a plurality of flash memory units organized in an array configuration. Each of the plurality of flash memory units includes at least one flash memory device and a flash unit controller. Each flash unit controller provides the caching storage system with direct physical block access to its corresponding at least one flash memory device. The caching storage system further comprises a storage cache controller. The storage cache controller selects physical block address locations (within a flash memory device) to be erased where data are to be written, issues erase commands to a flash unit controller corresponding to the selected physical block address locations, and issues page write operations to a set of erase blocks.
    • 本发明的实施例使得包括闪速存储器设备的存储高速缓存具有对闪存的直接块访问,使得物理块地址被呈现给存储系统的高速缓存层,从而控制存储高速缓存数据流。 本发明的一个方面包括缓存存储系统。 缓存存储系统包括以阵列配置组织的多个闪存单元。 多个闪存单元中的每一个包括至少一个闪存设备和闪存单元控制器。 每个闪存单元控制器为缓存存储系统提供对其至少一个闪存设备的直接物理块访问。 高速缓存存储系统还包括存储高速缓存控制器。 存储高速缓存控制器选择要写入数据的要擦除的物理块地址位置,向与所选择的物理块地址位置对应的闪存单元控制器发出擦除命令,并将页写入操作发布到 一组擦除块。
    • 8. 发明授权
    • System, method, and computer program for explicitly tunable I/O device controller
    • 用于显式可调I / O设备控制器的系统,方法和计算机程序
    • US06687765B2
    • 2004-02-03
    • US09764614
    • 2001-01-16
    • Krishnakumar Rao SurugucchiBruce M. Cassidy
    • Krishnakumar Rao SurugucchiBruce M. Cassidy
    • G06F1314
    • G06F3/0605G06F3/0632G06F3/0653G06F3/0689
    • Structure, method, and computer program for an explicitly tunable device controller. Method supports high-performance I/O without imposing additional overhead during normal input/output operations. Tuning is performed during explicit pre-I/O operation phase. In one embodiment, invention provides a method for tuning device controller operating characteristics to suit attributes of a data stream in which the method comprises: monitoring a data stream and collecting attributes of the monitored data stream; generating performance metrics of the data stream based on the collected attributes and a plurality of different assumed device controller configurations; comparing expected performance of the plurality of different device controller configurations for effectiveness with a future data stream having similar data stream type attributes to the monitored data stream; and selecting device controller characteristics to provide an effective match between the data stream type and the device controller configuration. In one embodiment, the controller configuration is adjusted automatically and dynamically during normal I/O operations to suit the particular input/output operation encountered. Configuration information may be selected for example, from such parameters as data redundancy level, RAID level, number of drives in a RAID array, memory module size, cache line size, direct I/O or cached I/O mode, read-ahead cache enable or read-ahead cache disable, cache line aging, cache size, or combinations thereof. A storage device controller, such as a RAID controller, implementing the inventive method in computer program software or firmware is also provided as are computer system having a host computer coupled to a storage system through the inventive controller.
    • 用于显式可调谐设备控制器的结构,方法和计算机程序。 方法支持高性能I / O,而不会在正常输入/输出操作期间产生额外的开销。 在显式的I / O操作阶段执行调试。 在一个实施例中,本发明提供了一种用于调整设备控制器操作特性以适应数据流的属性的方法,其中所述方法包括:监视数据流并收集所监视的数据流的属性; 基于收集的属性和多个不同的假定的设备控制器配置来生成数据流的性能度量; 将具有类似数据流类型属性的未来数据流的有效性的多个不同设备控制器配置的预期性能与监视的数据流进行比较; 并选择设备控制器特性来提供数据流类型和设备控制器配置之间的有效匹配。 在一个实施例中,在正常I / O操作期间自动和动态地调整控制器配置以适合遇到的特定输入/输出操作。 配置信息可以例如从数据冗余级别,RAID级别,RAID阵列中的驱动器数量,存储器模块大小,高速缓存行大小,直接I / O或高速缓存I / O模式,预读缓存 启用或预读高速缓存禁用,高速缓存行老化,高速缓存大小或其组合。 还提供了在计算机程序软件或固件中实现本发明方法的存储设备控制器,例如RAID控制器,其计算机系统具有通过本发明的控制器耦合到存储系统的主计算机。
    • 9. 发明申请
    • STORAGE SYSTEM CACHE USING FLASH MEMORY WITH DIRECT BLOCK ACCESS
    • 使用具有直接块访问的闪存存储系统缓存
    • US20130054873A1
    • 2013-02-28
    • US13220256
    • 2011-08-29
    • Wendy A. BelluominiBinny S. GillJames L. HafnerSteven R. HetzlerVenu G. NayarDaniel F. SmithKrishnakumar Rao Surugucchi
    • Wendy A. BelluominiBinny S. GillJames L. HafnerSteven R. HetzlerVenu G. NayarDaniel F. SmithKrishnakumar Rao Surugucchi
    • G06F12/02
    • G06F12/0866G06F2212/222G06F2212/262
    • Embodiments of the invention enable a storage cache, comprising flash memory devices, to have direct block access to the flash such that the physical block addresses are presented to the storage system's cache layer, which thereby controls the storage cache data stream. An aspect of the invention includes a caching storage system. The caching storage system comprises a plurality of flash memory units organized in an array configuration. Each of the plurality of flash memory units includes at least one flash memory device and a flash unit controller. Each flash unit controller provides the caching storage system with direct physical block access to its corresponding at least one flash memory device. The caching storage system further comprises a storage cache controller. The storage cache controller selects physical block address locations (within a flash memory device) to be erased where data are to be written, issues erase commands to a flash unit controller corresponding to the selected physical block address locations, and issues page write operations to a set of erase blocks.
    • 本发明的实施例使得包括闪速存储器设备的存储高速缓存具有对闪存的直接块访问,使得物理块地址被呈现给存储系统的高速缓存层,从而控制存储高速缓存数据流。 本发明的一个方面包括缓存存储系统。 缓存存储系统包括以阵列配置组织的多个闪存单元。 多个闪存单元中的每一个包括至少一个闪存设备和闪存单元控制器。 每个闪存单元控制器为缓存存储系统提供对其至少一个闪存设备的直接物理块访问。 高速缓存存储系统还包括存储高速缓存控制器。 存储高速缓存控制器选择要写入数据的要擦除的物理块地址位置,向与所选择的物理块地址位置对应的闪存单元控制器发出擦除命令,并将页写入操作发布到 一组擦除块。