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1. 发明申请

US20070013071A1 PROBING PADS IN KERF AREA FOR WAFER TESTING 失效
标题翻译：在KERF区域进行水分测试的探针垫
公开(公告)号：US20070013071A1
公开(公告)日：2007-01-18
申请号：US11160461
申请日：2005-06-24
申请人： James Adkisson , Timothy Daubenspeck , Jeffrey Gambino , Christopher Muzzy , Wolfgang Sauter
发明人： James Adkisson , Timothy Daubenspeck , Jeffrey Gambino , Christopher Muzzy , Wolfgang Sauter
IPC分类号： H01L23/52
CPC分类号： H01L24/05 , H01L22/32 , H01L22/34 , H01L24/06 , H01L2224/05624 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/14 , H01L2924/00014
摘要： A structure and a method for forming the same. The structure includes (a) a substrate having a top substrate surface; (b) an integrated circuit on the top substrate surface, wherein the integrated circuit includes a bond pad electrically connected to a transistor of the integrated circuit; (c) a protection ring on the top substrate surface and on a perimeter of the integrated circuit; (c) a kerf region on the top substrate surface, wherein the protection ring is sandwiched between and physically isolates the integrated circuit and the kerf region, wherein the kerf region includes a probe pad electrically connected to the bond pad, and wherein the kerf region is adapted to be destroyed by chip dicing without damaging the integrated circuit and the protection ring.
摘要翻译：一种结构及其形成方法。该结构包括（a）具有顶部衬底表面的衬底; （b）在顶部衬底表面上的集成电路，其中所述集成电路包括电连接到所述集成电路的晶体管的接合焊盘; （c）在顶部基板表面上和集成电路的周边上的保护环; （c）顶部衬底表面上的切口区域，其中所述保护环夹在所述集成电路和所述切口区域之间并物理隔离所述集成电路和所述切口区域，其中所述切口区域包括电连接到所述接合焊盘的探针焊盘，并且其中所述切口区域适用于通过芯片切割而损坏，而不会损坏集成电路和保护环。

2. 发明申请

US20070145438A1 PIXEL SENSOR CELL HAVING REDUCED PINNING LAYER BARRIER POTENTIAL AND METHOD THEREOF 有权
标题翻译：具有减少的钉扎层障碍物的像素传感器电池及其方法
公开(公告)号：US20070145438A1
公开(公告)日：2007-06-28
申请号：US11681454
申请日：2007-03-02
申请人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
发明人： James Adkisson , Andres Bryant , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Jerome Lasky , Richard Phelps
IPC分类号： H01L31/113
CPC分类号： H01L27/14689 , H01L27/14603 , H01L27/14609 , H01L31/0352
摘要： A pixel sensor cell structure and method of manufacture. The pixel cell comprises a doped layer formed adjacent to a first side of a transfer gate structure for coupling a collection well region and a channel region. Potential barrier interference to charge transfer caused by a pinning layer is reduced.
摘要翻译：像素传感器单元结构及其制造方法。像素单元包括与传输栅极结构的第一侧相邻形成的用于耦合收集阱区和沟道区的掺杂层。减少了由钉扎层引起的对电荷转移的电势障碍干扰。

3. 发明申请

US20070138380A1 FUNNELED LIGHT PIPE FOR PIXEL SENSORS 有权
标题翻译：用于像素传感器的FUNNELED LIGHT PIPE
公开(公告)号：US20070138380A1
公开(公告)日：2007-06-21
申请号：US11275171
申请日：2005-12-16
申请人： James Adkisson , Jeffrey Gambino , Robert Leidy , Richard Rassel
发明人： James Adkisson , Jeffrey Gambino , Robert Leidy , Richard Rassel
IPC分类号： G01J1/04
CPC分类号： G01J1/04 , G01J1/0407 , G01J1/0422 , G01J1/0488
摘要： A photo sensing structure and methods for forming the same. The structure includes (a) a semiconductor substrate and (b) a photo collection region on the semiconductor substrate. The structure also includes a funneled light pipe on top of the photo collection region. The funneled light pipe includes (i) a bottom cylindrical portion on top of the photo collection region of the photo collection region, and (ii) a funneled portion which has a tapered shape and is on top and in direct physical contact with the bottom cylindrical portion. The structure further includes a color filter region on top of the funneled light pipe.
摘要翻译：感光结构及其形成方法。该结构包括（a）半导体衬底和（b）半导体衬底上的光收集区域。该结构还包括在照片收集区域顶部的漏斗光管。漏斗式光管包括（i）照片收集区域的照片收集区域顶部的底部圆柱形部分，和（ii）具有锥形形状并且在顶部并与底部圆柱体直接物理接触的漏斗部分一部分。该结构还包括在漏斗的光管的顶部上的滤色器区域。

4. 发明申请

US20070102738A1 LIGHT SHIELD FOR CMOS IMAGER 有权
标题翻译： CMOS成像器的光栅
公开(公告)号：US20070102738A1
公开(公告)日：2007-05-10
申请号：US11164072
申请日：2005-11-09
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe
IPC分类号： H01L31/113 , H01L31/062
CPC分类号： H01L27/14623 , H01L27/14685
摘要： The present invention provides a light shield for shielding the floating diffusion of a complementary metal-oxide semiconductor (CMOS) imager. In accordance with an embodiment of the present invention, there is provided a pixel sensor cell including: a device region formed on a substrate; and a first layer of material forming a sidewall adjacent to a side of the device region for blocking electromagnetic radiation from the device region.
摘要翻译：本发明提供一种用于屏蔽互补金属氧化物半导体（CMOS）成像器的浮动扩散的遮光罩。根据本发明的实施例，提供了一种像素传感器单元，包括：形成在基板上的器件区域; 以及形成与所述器件区域的一侧相邻的侧壁的第一材料层，用于阻挡来自所述器件区域的电磁辐射。

5. 发明申请

US20060113622A1 A DAMASCENE COPPER WIRING IMAGE SENSOR 有权
标题翻译： DAMASCENE铜接线图像传感器
公开(公告)号：US20060113622A1
公开(公告)日：2006-06-01
申请号：US10904807
申请日：2004-11-30
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Robert Leidy , Anthony Stamper
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Robert Leidy , Anthony Stamper
IPC分类号： H01L31/00
CPC分类号： H01L27/14685 , H01L21/76819 , H01L21/76834 , H01L21/76838 , H01L27/14621 , H01L27/14627 , H01L27/14636 , H01L27/14687
摘要： An image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material. Prior to depositing the refill dielectric, a layer of either reflective or absorptive material is formed along the sidewalls of the etched opening to improve sensitivity of the pixels by either reflecting light to the underlying photodiode or by eliminating light reflections.
摘要翻译：一种图像传感器阵列和制造方法，其中传感器包括铜（Cu）金属化水平，允许结合更薄的层间电介质叠层，改进的厚度均匀性，以产生呈现增加的光敏度的像素阵列。在传感器阵列中，每个Cu金属化层包括在每个阵列像素之间的位置处形成的Cu金属线结构，并且阻挡材料层形成在穿过像素光路的每个Cu金属线结构上。通过实现单掩模或自对准掩模方法，进行单次蚀刻以完全去除穿过光路的层间电介质层和阻挡层。然后将蚀刻的开口用电介质材料重新填充。在沉积再充填电介质之前，沿蚀刻开口的侧壁形成反射或吸收材料层，以通过将光反射到下面的光电二极管或通过消除光反射来提高像素的灵敏度。

6. 发明申请

US20070194397A1 PHOTO-SENSOR AND PIXEL ARRAY WITH BACKSIDE ILLUMINATION AND METHOD OF FORMING THE PHOTO-SENSOR 有权
标题翻译：具有背光照明的照相传感器和像素阵列以及形成照相传感器的方法
公开(公告)号：US20070194397A1
公开(公告)日：2007-08-23
申请号：US11276218
申请日：2006-02-17
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Alan Loiseau , Richard Rassel
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Alan Loiseau , Richard Rassel
IPC分类号： H01L31/0232 , H01L31/00
CPC分类号： H01L27/14643 , H01L27/14621 , H01L27/1463 , H01L27/1464 , H01L27/14689
摘要： An imaging sensor with an array of FET pixels and method of forming the imaging sensor. Each pixel is a semiconductor island, e.g., N-type silicon on a Silicon on insulator (SOI) wafer. FETs are formed in one photodiode electrode, e.g., a P-well cathode. A color filter may be attached to an opposite surface of island. A protective layer (e.g., glass or quartz) or window is fixed to the pixel array at the color filters. The image sensor may be illuminated from the backside with cell wiring above the cell. So, an optical signal passes through the protective layer is filtered by the color filters and selectively sensed by a corresponding photo-sensor.
摘要翻译：具有FET像素阵列的成像传感器和形成成像传感器的方法。每个像素是半导体岛，例如绝缘体上硅（SOI）晶片上的N型硅。 FET形成在一个光电二极管电极中，例如P阱阴极。滤色器可以附接到岛的相对表面。保护层（例如，玻璃或石英）或窗口在滤色器处固定到像素阵列。图像传感器可以从背面照亮，电池布线在电池单元上方。因此，通过保护层的光学信号被滤色器过滤并被相应的光电传感器选择性地感测。

7. 发明申请

US20070187787A1 PIXEL SENSOR STRUCTURE INCLUDING LIGHT PIPE AND METHOD FOR FABRICATION THEREOF 审中-公开
标题翻译：像素传感器结构包括光管及其制造方法
公开(公告)号：US20070187787A1
公开(公告)日：2007-08-16
申请号：US11276160
申请日：2006-02-16
申请人： Kristin Ackerson , James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Timothy Hoague , Mark Jaffe , Robert Leidy , Matthew Moon , Richard Passel
发明人： Kristin Ackerson , James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Timothy Hoague , Mark Jaffe , Robert Leidy , Matthew Moon , Richard Passel
IPC分类号： H01L27/14
CPC分类号： H01L27/14643 , H01L27/14625 , H01L27/14632 , H01L27/14636 , H01L27/14685 , H01L27/14687 , H01L27/14689
摘要： A pixel for an image sensor includes a photosensor located within a substrate. A patterned dielectric layer having an aperture registered with the photosensor is located over the substrate. A lens structure is located over the dielectric layer and also registered with the photosensor. A liner layer is located contiguously upon a top surface of the dielectric layer, and the sidewalls and bottom of the aperture. The liner layer provides for enhanced reflection for off-axis incoming light and enhanced capture thereof by the photosensor. When the aperture does not provide a dielectric layer border for a metallization layer embedded within the dielectric layer, an exposed edge of the metallization layer may be chamfered.
摘要翻译：用于图像传感器的像素包括位于衬底内的光电传感器。具有与光电传感器对准的孔径的图案化电介质层位于衬底上。透镜结构位于电介质层上方并且还与光电传感器配准。衬垫层连续地定位在电介质层的顶表面上，孔的侧壁和底部。衬垫层为离轴入射光提供增强的反射，并且通过光电传感器增强其捕获。当孔径不为嵌入在电介质层内的金属化层提供介电层边界时，金属化层的暴露边缘可以被倒角。

8. 发明申请

US20060273397A1 PROTECT DIODES FOR HYBRID-ORIENTATION SUBSTRATE STRUCTURES 失效
标题翻译：用于混合基底结构的保护二极管
公开(公告)号：US20060273397A1
公开(公告)日：2006-12-07
申请号：US10908926
申请日：2005-06-01
申请人： James Adkisson , Jeffrey Gambino , Alain Loiseau , Kirk Peterson
发明人： James Adkisson , Jeffrey Gambino , Alain Loiseau , Kirk Peterson
IPC分类号： H01L23/62
CPC分类号： H01L27/1203 , H01L21/823807 , H01L21/823878 , H01L21/84 , H01L27/0255 , H01L27/0922 , H01L27/1207 , H01L29/045
摘要： A semiconductor structure and method for forming the same. The structure includes a hybrid orientation block having first and second silicon regions having different lattice orientations. The first silicon region is directly on the block, while the second silicon region is physically isolated from the block by a dielectric region. First and second transistors are formed on the first and second regions, respectively. Also, first and second doped discharge prevention structures are formed on the block wherein the first doped discharge prevention structure prevents discharge damage to the first transistor, whereas the second doped discharge prevention structure prevents discharge damage to the second transistor during a plasma process. During the normal operation of the first and second transistors, the first and second discharge prevention structures behave like dielectric regions.
摘要翻译：一种半导体结构及其形成方法。该结构包括具有不同晶格取向的第一和第二硅区的混合取向嵌段。第一硅区域直接在块上，而第二硅区域通过电介质区域与块物理隔离。第一和第二晶体管分别形成在第一和第二区域上。此外，在第一掺杂放电预防结构防止对第一晶体管的放电损坏的块上形成第一和第二掺杂放电预防结构，而第二掺杂放电预防结构在等离子体处理期间防止对第二晶体管的放电损坏。在第一和第二晶体管的正常操作期间，第一和第二放电预防结构表现得像电介质区域。

9. 发明申请

US20060186505A1 IMAGE SENSOR CELLS 有权
标题翻译：图像传感器细胞
公开(公告)号：US20060186505A1
公开(公告)日：2006-08-24
申请号：US10906510
申请日：2005-02-23
申请人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
发明人： James Adkisson , John Ellis-Monaghan , Jeffrey Gambino , Mark Jaffe , Richard Rassel
IPC分类号： H01L31/06
CPC分类号： H01L27/14609 , H01L27/1463 , H01L27/14641 , H01L27/14643 , H01L31/035281
摘要： A structure (and method for forming the same) for an image sensor cell. The structure includes (a) a semiconductor substrate; (b) a charge collection well on the substrate, the charge collection well comprising a semiconductor material doped with a first doping polarity; (c) a surface pinning layer on and in direct physical contact with the charge collection well, the surface pinning layer comprising a semiconductor material doped with a second doping polarity opposite to the first doping polarity; and (d) an electrically conducting push electrode being in direct physical contact with the surface pinning layer but not being in direct physical contact with the charge collection well.
摘要翻译：用于图像传感器单元的结构（及其形成方法）。该结构包括（a）半导体衬底; （b）在所述衬底上的电荷收集阱，所述电荷收集阱包括掺杂有第一掺杂极性的半导体材料; （c）与电荷收集阱直接物理接触的表面钉扎层，所述表面钉扎层包括掺杂有与第一掺杂极性相反的第二掺杂极性的半导体材料; 和（d）与表面钉扎层直接物理接触但不与电荷收集阱直接物理接触的导电推动电极。

10. 发明申请

US20060138480A1 A CMOS IMAGER WITH CU WIRING AND METHOD OF ELIMINATING HIGH REFLECTIVITY INTERFACES THEREFROM 有权
标题翻译：具有CU接线的CMOS成像器和消除其高反射性接口的方法
公开(公告)号：US20060138480A1
公开(公告)日：2006-06-29
申请号：US10905277
申请日：2004-12-23
申请人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Robert Leidy , Richard Rassel , Anthony Stamper
发明人： James Adkisson , Jeffrey Gambino , Mark Jaffe , Robert Leidy , Richard Rassel , Anthony Stamper
IPC分类号： H01L31/113 , H01L31/0232 , H01L31/00
CPC分类号： H01L27/14636 , H01L21/76819 , H01L21/76834 , H01L27/14621 , H01L27/14625 , H01L27/14627 , H01L27/14629 , H01L27/14645 , H01L27/14683
摘要： An image sensor and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack to result in a pixel array exhibiting increased light sensitivity. The image sensor includes structures having a minimum thickness of barrier layer metal that traverses the optical path of each pixel in the sensor array or, that have portions of barrier layer metal selectively removed from the optical paths of each pixel, thereby minimizing reflectance. That is, by implementing various block or single mask methodologies, portions of the barrier layer metal are completely removed at locations of the optical path for each pixel in the array. In a further embodiment, the barrier metal layer may be formed atop the Cu metallization by a self-aligned deposition.
摘要翻译：一种图像传感器和制造方法，其中传感器包括铜（Cu）金属化水平，允许结合较薄的层间电介质堆叠以产生呈现增加的光敏度的像素阵列。图像传感器包括具有穿过传感器阵列中的每个像素的光路的阻挡层金属的最小厚度的结构，或者具有从每个像素的光路中选择性地去除的阻挡层金属的部分，从而使反射率最小化。也就是说，通过实现各种块或单掩模方法，在阵列中的每个像素的光路的位置处完全去除了阻挡层金属的部分。在另一个实施例中，阻挡金属层可以通过自对准沉积形成在Cu金属化之上。

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