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    • 4. 发明申请
    • PIXEL SENSOR HAVING DOPED ISOLATION STRUCTURE SIDEWALL
    • 具有分离隔离结构的PIXEL传感器
    • US20070087463A1
    • 2007-04-19
    • US11563531
    • 2006-11-27
    • James AdkissonMark JaffeRobert Leidy
    • James AdkissonMark JaffeRobert Leidy
    • H01L21/00
    • H01L27/14603H01L27/1463H01L27/14643H01L27/14683
    • A novel pixel sensor structure formed on a substrate of a first conductivity type includes a photosensitive device of a second conductivity type and a surface pinning layer of the first conductivity type. A trench isolation structure is formed adjacent to the photosensitive device pinning layer. The trench isolation structure includes a dopant region comprising material of the first conductivity type selectively formed along a sidewall of the isolation structure that is adapted to electrically couple the surface pinning layer to the underlying substrate. The corresponding method for forming the dopant region selectively formed along the sidewall of the isolation structure comprises an out-diffiusion process whereby dopant materials present in a doped material layer formed along selected portions in the trench are driven into the underlying substrate during an anneal. Alternately, or in conjunction, an angled ion implantation of dopant material in the isolation structure sidewall may be performed by first fabricating a photoresist layer and reducing its size by removing a comer, or a comer portion thereof, which may block the angled implant material.
    • 形成在第一导电类型的衬底上的新型像素传感器结构包括第二导电类型的光敏器件和第一导电类型的表面钉扎层。 在光敏器件钉扎层附近形成沟槽隔离结构。 沟槽隔离结构包括掺杂区域,该掺杂剂区域包括沿着隔离结构的侧壁选择性地形成的第一导电类型的材料,其适于将表面钉扎层电耦合到下面的衬底。 用于形成沿着隔离结构的侧壁选择性地形成的掺杂剂区域的相应方法包括外扩散过程,由此在退火期间,存在于沿着沟槽中的选定部分形成的掺杂材料层中的掺杂剂材料被驱动到下面的衬底中。 可替代地或结合地,隔离结构侧壁中的掺杂剂材料的成角度的离子注入可以通过首先制造光致抗蚀剂层并通过去除可能阻挡成角度的植入材料的角部或其拐角部分来减小其尺寸来执行。
    • 5. 发明申请
    • Touching microlens structure for a pixel sensor and method of fabrication
    • 用于像素传感器的触摸微透镜结构和制造方法
    • US20060261427A1
    • 2006-11-23
    • US11378020
    • 2006-03-17
    • John DillonTimothy HoagueRobert Leidy
    • John DillonTimothy HoagueRobert Leidy
    • H01L31/0232
    • H01L27/14685H01L27/14627H01L31/02327
    • A structure and method for increasing the sensitivity of pixel sensors by eliminating a gap space formed between adjacent microlens structures in a pixel sensor array. Advantageously, exposure and flowing conditions are such that adjacent microlens structures touch (are webbed) at a horizontal cross-section, yet have a round lens shape in all directions. Particularly, exposure and flowing conditions are such that each touching microlens structure is formed to have a matched uniform radius of curvature at a horizontal cross-section and at a 45 degree cross-sections. To improve quality of mircrolens structure uniformity exhibited at all pixel locations including those near a pixel array edge or corner, a top anti-reflective coating layer is applied on top of a photoresist layer prior to the exposure and flowing steps.
    • 通过消除在像素传感器阵列中相邻的微透镜结构之间形成的间隙空间来增加像素传感器的灵敏度的结构和方法。 有利地,曝光和流动条件使得相邻的微透镜结构以水平横截面接触(被蹼状),但在所有方向上具有圆形透镜形状。 特别地,曝光和流动条件使得每个触摸的微透镜结构形成为在水平横截面和45度横截面处具有匹配的均匀的曲率半径。 为了提高在包括像素阵列边缘或角落附近的像素位置的所有像素位置处显示的微电极结构均匀性的质量,在曝光和流动步骤之前,将顶部抗反射涂层施加在光致抗蚀剂层的顶部。
    • 8. 发明申请
    • AN EXTRA DOSE TRIM MASK, METHOD OF MANUFACTURE, AND LITHOGRAPHIC PROCESS USING THE SAME
    • 一种额外的剂量仿真面膜,制造方法和使用其的平版印刷方法
    • US20060204859A1
    • 2006-09-14
    • US10906846
    • 2005-03-09
    • Robert LeidyCharles ParrishJed RankinDavid ShanksCharles Whiting
    • Robert LeidyCharles ParrishJed RankinDavid ShanksCharles Whiting
    • G03C5/00G03F1/00
    • G03F7/70466G03F1/70
    • A mask structure and photolithographic method using the same for obtaining shorter and thinner line or feature lengths for optimizing power consumption and performance in semiconductor devices. According to a first aspect, a method for enabling trimming of semiconductor linewidth dimensions implements an extra dose trim mask. The lithographic method using the extra dose trim mask to make small adjustments to patterned linewidth exposures for enhanced CD control may be used to trim or adjust whole or a plurality of regions of a lithographic exposure. There is additionally provided a structure and method of creating a lithographic dual exposure mask having one or more regions comprising one or more partial energy absorptive layers such that, when subject to a blanket dose, enable smaller image size adjustments in those regions. The method using a dual exposure trim mask having multiple attenuator regions facilitates product/process tuning as multiple trim doses may be delivered to different regions of an exposure field resulting in different image size adjustments.
    • 一种掩模结构和光刻方法,用于获得更短和更薄的线或特征长度,以优化半导体器件的功耗和性能。 根据第一方面,一种能够修剪半导体线宽尺寸的方法实现了额外的剂量修剪掩模。 可以使用使用额外剂量调整掩模对图案化线宽曝光进行小调整以增强CD控制的光刻方法来修整或调整光刻曝光的整个或多个区域。 还提供了一种创建具有包括一个或多个部分能量吸收层的一个或多个区域的光刻双曝光掩模的结构和方法,使得当经受覆盖剂量时,能够实现在那些区域中更小的图像尺寸调整。 使用具有多个衰减器区域的双曝光修剪掩模的方法有助于产品/过程调谐,因为多个修整剂量可以被传递到曝光场的不同区域,导致不同的图像尺寸调整。
    • 9. 发明申请
    • MASKED SIDEWALL IMPLANT FOR IMAGE SENSOR
    • 用于图像传感器的嵌入式平板植入体
    • US20060128126A1
    • 2006-06-15
    • US10905043
    • 2004-12-13
    • James AdkissonMark JaffeArthur JohnsonRobert LeidyJeffrey Maling
    • James AdkissonMark JaffeArthur JohnsonRobert LeidyJeffrey Maling
    • H01L21/425
    • H01L27/14643H01L27/1463H01L27/14687H01L27/14689
    • A novel image sensor structure formed on a substrate of a first conductivity type includes a photosensitive device of a second conductivity type and a surface pinning layer of the first conductivity type. A trench isolation region is formed adjacent to the photosensitive device pinning layer. The structure includes a dopant region comprising material of the first conductivity type formed along a sidewall of the isolation region that is adapted to electrically couple the pinning layer to the substrate. The corresponding method facilitates an angled ion implantation of dopant material in the isolation region sidewall by first fabricating the photoresist layer and reducing its size by removing a corner, or a corner portion thereof, which may block the angled implant material. To facilitate the angled implant to the sidewall edge past resist block masks, two methods are proposed: 1) a spacer type etch of the imaged photoresist; or, 2) a corner sputter process of the imaged photoresist.
    • 形成在第一导电类型的衬底上的新型图像传感器结构包括第二导电类型的光敏器件和第一导电类型的表面钉扎层。 在光敏器件钉扎层附近形成沟槽隔离区域。 该结构包括掺杂区域,该掺杂剂区域包括沿着隔离区域的侧壁形成的第一导电类型的材料,其适于将钉扎层电耦合到衬底。 相应的方法通过首先制造光致抗蚀剂层并且通过去除可能阻挡成角度的植入材料的角部或其角部来减小其尺寸来促进掺杂剂材料在隔离区域侧壁中的成角度的离子注入。 为了促进通过抗蚀剂阻挡掩模的侧壁边缘的成角度注入,提出了两种方法:1)成像光致抗蚀剂的间隔物型蚀刻; 或2)成像光致抗蚀剂的角溅射工艺。
    • 10. 发明申请
    • A DAMASCENE COPPER WIRING IMAGE SENSOR
    • DAMASCENE铜接线图像传感器
    • US20060113622A1
    • 2006-06-01
    • US10904807
    • 2004-11-30
    • James AdkissonJeffrey GambinoMark JaffeRobert LeidyAnthony Stamper
    • James AdkissonJeffrey GambinoMark JaffeRobert LeidyAnthony Stamper
    • H01L31/00
    • H01L27/14685H01L21/76819H01L21/76834H01L21/76838H01L27/14621H01L27/14627H01L27/14636H01L27/14687
    • An image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material. Prior to depositing the refill dielectric, a layer of either reflective or absorptive material is formed along the sidewalls of the etched opening to improve sensitivity of the pixels by either reflecting light to the underlying photodiode or by eliminating light reflections.
    • 一种图像传感器阵列和制造方法,其中传感器包括铜(Cu)金属化水平,允许结合更薄的层间电介质叠层,改进的厚度均匀性,以产生呈现增加的光敏度的像素阵列。 在传感器阵列中,每个Cu金属化层包括在每个阵列像素之间的位置处形成的Cu金属线结构,并且阻挡材料层形成在穿过像素光路的每个Cu金属线结构上。 通过实现单掩模或自对准掩模方法,进行单次蚀刻以完全去除穿过光路的层间电介质层和阻挡层。 然后将蚀刻的开口用电介质材料重新填充。 在沉积再充填电介质之前,沿蚀刻开口的侧壁形成反射或吸收材料层,以通过将光反射到下面的光电二极管或通过消除光反射来提高像素的灵敏度。