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1. 发明申请

US20050263801A1 Phase-change memory device having a barrier layer and manufacturing method 审中-公开
标题翻译：具有阻挡层的相变存储器件和制造方法
公开(公告)号：US20050263801A1
公开(公告)日：2005-12-01
申请号：US11086246
申请日：2005-03-21
申请人： Jae-Hyun Park , Sung-Min Kim , Yoon-Jong Song , Su-Youn Lee , Young-Nam Hwang
发明人： Jae-Hyun Park , Sung-Min Kim , Yoon-Jong Song , Su-Youn Lee , Young-Nam Hwang
IPC分类号： H01L21/8234 , H01L27/24 , H01L29/772
CPC分类号： H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/144
摘要： A semiconductor device comprises a semiconductor substrate having an isolation region that defines an active region. The active region has a planar surface and a non-planar surface that extends from the planar surface. The device further includes a gate dielectric layer covering the non-planar surface and a first gate electrode extending across the non-planar surface with the gate dielectric layer therebetween. In addition, a source and drain region are formed on opposite sides of the gate electrode. According to an aspect of the present invention, the resulting device has a non-planar channel region extending between the source region and the drain region. The non-planar channel region is formed along the non-planar surface described above. Further, programmable resistance element is electrically coupled to the drain region to form a phase-change memory device.
摘要翻译：半导体器件包括具有限定有源区的隔离区的半导体衬底。有源区具有从平面表面延伸的平坦表面和非平面表面。该器件还包括覆盖非平面表面的栅极电介质层和跨过非平面表面延伸的第一栅电极，其间具有栅介电层。此外，源极和漏极区域形成在栅电极的相对侧上。根据本发明的一个方面，所得到的器件具有在源极区域和漏极区域之间延伸的非平面沟道区域。非平面通道区沿着上述非平面形成。此外，可编程电阻元件电耦合到漏极区以形成相变存储器件。

2. 发明申请

US20160005852A1 SEMICONDUCTOR DEVICES HAVING LOWER AND UPPER FINS AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：具有下层和上层FINS的半导体器件及其制造方法
公开(公告)号：US20160005852A1
公开(公告)日：2016-01-07
申请号：US14690575
申请日：2015-04-20
申请人： Sung-Min Kim , Kyung-Seok Oh , Cheol Kim , Heon-Jong Shin , Jong-Ryeol Yoo , Hyun-Jung Lee , Seong-Hoon Jeong
发明人： Sung-Min Kim , Kyung-Seok Oh , Cheol Kim , Heon-Jong Shin , Jong-Ryeol Yoo , Hyun-Jung Lee , Seong-Hoon Jeong
IPC分类号： H01L29/78 , H01L29/40 , H01L29/06
CPC分类号： H01L29/785 , H01L21/845 , H01L27/1211 , H01L29/42392 , H01L29/66795
摘要： Provided are a semiconductor device and a method for fabricating the same. The semiconductor device includes a lower fin that protrudes from a substrate and extends in a first direction, an oxide film the lower fin, an upper fin that protrudes from the oxide film and that is spaced apart from the lower fin at a position corresponding to the lower fin, and a gate structure the upper fin that extends in a second direction to intersect the upper fin, wherein germanium (Ge) is included in a portion of the oxide film located between the lower fin and the upper fin.
摘要翻译：提供一种半导体器件及其制造方法。半导体器件包括从基板突出并沿第一方向延伸的下翅片，下鳍片上的氧化膜，从氧化膜突出并与下翅片间隔开的上翅片，下翅片和栅极结构，上翅片沿第二方向延伸以与上翅片相交，其中锗（Ge）包括在位于下翅片和上翅片之间的氧化膜的一部分中。

3. 发明授权

US09142875B2 Antenna having linear array antenna unit 有权
标题翻译：天线具有线性阵列天线单元
公开(公告)号：US09142875B2
公开(公告)日：2015-09-22
申请号：US13325110
申请日：2011-12-14
申请人： Sung-Min Kim
发明人： Sung-Min Kim
IPC分类号： H01Q3/00 , H01Q1/24 , H01Q3/24 , H01Q9/22
CPC分类号： H01Q1/241 , H01Q3/24 , H01Q9/22
摘要： An antenna may include a linear array antenna unit, a first switch, and a second switch. The linear array antenna unit may be configured to include a plurality of cable elements linearly arranged and coupled to each other. The first switch may include one end coupled to a ground and another end coupled to at least one of the plurality of cable elements of the linear array antenna unit. The second switch may include one end coupled to a power feed point and another end coupled to at least one of the plurality of cable elements. The plurality of cable elements of the linear array antenna unit may form one of a first antenna structure and a second antenna structure according to the switching operations of the first and second switches.
摘要翻译：天线可以包括线性阵列天线单元，第一开关和第二开关。线性阵列天线单元可以被配置为包括线性排列并彼此耦合的多个电缆元件。第一开关可以包括耦合到地的一端和耦合到线性阵列天线单元的多个电缆元件中的至少一个的另一端。第二开关可以包括耦合到馈电点的一端和耦合到多个电缆元件中的至少一个的另一端。根据第一和第二开关的切换操作，线性阵列天线单元的多个电缆元件可以形成第一天线结构和第二天线结构中的一个。

4. 发明授权

US08963459B2 Method and apparatus for driving alternating-current motor 有权
标题翻译：用于驱动交流电动机的方法和装置
公开(公告)号：US08963459B2
公开(公告)日：2015-02-24
申请号：US13483372
申请日：2012-05-30
申请人： Sang-Min Kim , Sung-Min Kim , Seung-Ki Sul , Seung-Eun Park , Yong-Cheul Kwon , Joon-Ho Park
发明人： Sang-Min Kim , Sung-Min Kim , Seung-Ki Sul , Seung-Eun Park , Yong-Cheul Kwon , Joon-Ho Park
IPC分类号： H02P21/00 , H02P1/16 , H02P6/18 , H02P21/14
CPC分类号： H02P6/183 , H02P21/18 , H02P21/24
摘要： A method of driving an alternating-current (AC) motor while periodically obtaining a rotator angle of the AC motor. The method includes: (a) driving the AC motor by a dS-axis voltage, which is a voltage for an exciting current in a stationary reference frame, and a qS-axis voltage, which is a voltage for generating a rotational force in the stationary reference frame, while sequentially applying different dS-axis voltages and different qS-axis voltages to the AC motor in a control injection period; and (b) obtaining a rotator angle by a dS-axis voltage value, a qS-axis voltage value, a dS-axis current value, and a qS-axis current value in the control injection period.
摘要翻译：一种在周期性地获得交流电动机的转子角度的同时驱动交流（AC）电动机的方法。该方法包括：（a）通过dS轴电压驱动AC电动机，dS轴电压是静止参考系中的励磁电流的电压，qS轴电压是产生旋转力的电压在控制喷射期间顺序地将不同的dS轴电压和不同的qS轴电压施加到AC电动机; 和（b）在控制喷射期间通过dS轴电压值，qS轴电压值，dS轴电流值和qS轴电流值获得转子角度。

5. 发明授权

US08891559B2 Apparatus and method for notifying packet information using start frame delimiter 有权
标题翻译：使用起始帧分隔符通知分组信息的装置和方法
公开(公告)号：US08891559B2
公开(公告)日：2014-11-18
申请号：US13635165
申请日：2010-05-07
申请人： Hyun-Kuk Choi , Seok-Yong Lee , Sae-Rome Kim , Chang-Ryong Heo , Sung-Min Kim , Ki-Uk Kim
发明人： Hyun-Kuk Choi , Seok-Yong Lee , Sae-Rome Kim , Chang-Ryong Heo , Sung-Min Kim , Ki-Uk Kim
IPC分类号： H04J3/12 , H04L12/54 , H04W4/18 , H04L27/34 , H04L25/02 , H04L7/04
CPC分类号： H04L12/56 , H04L7/041 , H04L25/0262 , H04L27/345 , H04W4/185
摘要： An apparatus for notifying packet information using a start frame delimiter (SFD) comprises: a SFD transmission unit which generates an SFD code and transmits a packet by positioning the generated SFD code in a position corresponding to specific additional information to notify the specific additional information; and a SFD reception unit which receives the packet from the SFD transmission unit, detects the position of the SFD code positioned within the packet, and detects the additional information corresponding to the detected position.
摘要翻译：一种用于使用起始帧定界符（SFD）通知分组信息的装置包括：SFD传输单元，其通过将生成的SFD代码定位在与特定附加信息相对应的位置来生成SFD代码并发送分组，以通知特定的附加信息; 以及从SFD发送单元接收分组的SFD接收单元检测位于分组内的SFD码的位置，并且检测与检测到的位置对应的附加信息。

6. 发明申请

US20140264572A1 METHODS OF FORMING SEMICONDUCTOR DEVICES USING HARD MASK LAYERS 有权
标题翻译：使用硬掩模层形成半导体器件的方法
公开(公告)号：US20140264572A1
公开(公告)日：2014-09-18
申请号：US14165970
申请日：2014-01-28
申请人： Sung-Min Kim , Ji-Su Kang , Dong-Kyu Lee , Dong-Ho Cha
发明人： Sung-Min Kim , Ji-Su Kang , Dong-Kyu Lee , Dong-Ho Cha
IPC分类号： H01L21/308 , H01L29/78 , H01L29/66
CPC分类号： H01L21/3083 , H01L21/31144 , H01L29/66545 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A method of forming a semiconductor structure can include forming a photolithography mask on a silicon fin having a hard mask layer thereon extending in a first direction. A trench can be formed through the hard mask layer into the silicon fin using the photolithography mask, where the trench extends in a second direction to separate the silicon fin into first and second fin structures extending end-to-end in the first direction. A portion of the trench formed by the hard mask layer can be widened relative to a lower portion of the trench defined by the first and second fin structures.
摘要翻译：形成半导体结构的方法可以包括在其上具有在第一方向上延伸的硬掩模层的硅片上形成光刻掩模。可以使用光刻掩模通过硬掩模层将沟槽形成为硅片，其中沟槽沿第二方向延伸，以将硅片分离成在第一方向上端对端延伸的第一和第二鳍结构。由硬掩模层形成的沟槽的一部分可以相对于由第一和第二鳍结构限定的沟槽的下部加宽。

7. 发明授权

US08667313B2 Apparatus and method for reducing power consumption in system on chip 有权
标题翻译：降低系统芯片功耗的装置和方法
公开(公告)号：US08667313B2
公开(公告)日：2014-03-04
申请号：US12733599
申请日：2008-09-10
申请人： Sung-Min Kim
发明人： Sung-Min Kim
IPC分类号： G06F1/32
CPC分类号： G06F1/3203
摘要： An apparatus and method for reducing power consumption in a System on Chip (SoC) are provided. The SoC includes a clock unit for providing clocks to all elements included in the SoC, a Central Processing Unit (CPU) for controlling the SoC to perform designated functions, a main regulator for supplying power provided from an external battery to remaining elements included in the SoC other than a PMU, and a restoration processor for storing, in the PMU, registration information on the CPU and all peripherals included in the SoC when a transition from an active state to a sleep state is made. The PMU stops provision of a clock from the CPU by controlling the clock unit for stopping provision of all clocks by controlling the clock unit and for controlling the main regulator to be powered off when the restoration processor, wherein the PMU requests the restoration processor to store the registration information, completes the register information storing, when the transition from the sleep state to the active state is made.
摘要翻译：提供了一种用于降低片上系统（SoC）功耗的设备和方法。 SoC包括一个时钟单元，用于向包括在SoC中的所有元件提供时钟，一个用于控制SoC执行指定功能的中央处理单元（CPU），一个用于从外部电池提供的电力供给包含在其中的剩余元件的主调节器除了PMU之外的SoC以及恢复处理器，用于在进行从活动状态到休眠状态的转换时，在PMU中存储关于CPU和包括在SoC中的所有外围设备的注册信息。 PMU通过控制时钟单元来停止从CPU提供时钟，通过控制时钟单元并且当恢复处理器控制主调节器断电时，其中PMU请求恢复处理器存储当从休眠状态转换到活动状态时，注册信息完成寄存器信息存储。

8. 发明授权

US08198704B2 Semiconductor device including a crystal semiconductor layer 有权
标题翻译：包括晶体半导体层的半导体器件
公开(公告)号：US08198704B2
公开(公告)日：2012-06-12
申请号：US12710378
申请日：2010-02-23
申请人： Sung-Min Kim , Eun-Jung Yun
发明人： Sung-Min Kim , Eun-Jung Yun
IPC分类号： H01L29/06 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/02667 , H01L21/02639 , H01L21/2026 , H01L27/108 , H01L27/10802 , H01L27/10826 , H01L27/10879 , H01L29/66795 , H01L29/785
摘要： In one embodiment, a method of fabricating a semiconductor device having a crystalline semiconductor layer includes preparing a semiconductor substrate and forming a preliminary active pattern on the semiconductor substrate. The preliminary active pattern includes a barrier pattern and a non-single crystal semiconductor pattern. A sacrificial non-single crystal semiconductor layer covers the preliminary active pattern and the semiconductor substrate. By crystallizing the sacrificial non-single crystal semiconductor layer and the non-single crystal semiconductor pattern, using the semiconductor substrate as a seed layer, the sacrificial non-single crystal semiconductor layer and the non-single crystal semiconductor pattern are changed to a sacrificial crystalline semiconductor layer and a crystalline semiconductor pattern, respectively. The crystalline semiconductor pattern and the barrier pattern constitute an active pattern. The sacrificial crystalline semiconductor layer is removed.
摘要翻译：在一个实施例中，制造具有晶体半导体层的半导体器件的方法包括制备半导体衬底并在半导体衬底上形成预活性图案。预活性图案包括阻挡图案和非单晶半导体图案。牺牲非单晶半导体层覆盖预活性图案和半导体衬底。通过使牺牲非单晶半导体层和非单晶半导体图案结晶，使用半导体衬底作为晶种层，将牺牲非单晶半导体层和非单晶半导体图案改变为牺牲晶体半导体层和晶体半导体图案。晶体半导体图案和势垒图案构成活性图案。去除牺牲晶体半导体层。

9. 发明授权

US08131093B2 Transferring system for huge and high quality images on network and method thereof 有权
标题翻译：传输网络中巨大和高质量图像的系统及其方法
公开(公告)号：US08131093B2
公开(公告)日：2012-03-06
申请号：US12715564
申请日：2010-03-02
申请人： Sung-Min Kim
发明人： Sung-Min Kim
IPC分类号： G06K9/36 , G06F15/16
CPC分类号： H04N19/119 , H04N19/12 , H04N19/136 , H04N19/162 , H04N19/164 , H04N19/17 , H04N19/46 , H04N19/60
摘要： A transferring system for huge and high quality images on network and a method thereof are disclosed, wherein various individual image data are converted into high quality image data to be converted into layered image data, and classified into a plurality of sub cells, then stored in database as a compressed form. A client system connected to a server requires information, immediately downloads the required information, releases the compression, and then displays on a screen real time. In the present invention, a user can fast see only his wanted part since images of a newspaper and a magazine are converted as they were. Also, various additional information is provided with image, thereby providing multimedia digital publication services on wire or wireless network.
摘要翻译：公开了一种用于网络上巨大且高质量图像的传送系统及其方法，其中各种单独的图像数据被转换为高质量图像数据以被转换成分层图像数据，并被分类为多个子单元，然后存储在数据库作为压缩格式。连接到服务器的客户端系统需要信息，立即下载所需的信息，释放压缩，然后实时显示在屏幕上。在本发明中，由于报纸和杂志的图像原样转换，用户可以快速地看到他想要的部分。此外，还提供了各种附加信息的图像，从而在有线或无线网络上提供多媒体数字出版服务。

10. 发明授权

US07939436B2 Method of fabricating a semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07939436B2
公开(公告)日：2011-05-10
申请号：US12353398
申请日：2009-01-14
申请人： Sung-Min Kim , Min-Sang Kim , Keun-Hwi Cho , Ji-Myoung Lee
发明人： Sung-Min Kim , Min-Sang Kim , Keun-Hwi Cho , Ji-Myoung Lee
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L21/823425 , H01L21/28123 , H01L21/823437 , H01L21/823468 , H01L29/42376 , H01L29/66659 , H01L29/7835
摘要： A method of fabricating a semiconductor device forms a micro-sized gate, and mitigates short channel effects. The method includes a pull-back process to form the gate on a substrate. The method also includes forming inner and outer spacers on the gate that are asymmetric to one another with respect to the gate, and using the spacers in forming junction regions in the substrate on opposite sides of the gate. In particular, the inner and outer spacers are formed on opposite sides of the gate so as to have different thicknesses at the bottom of the gate. The inner and outer junction regions are formed by doping the substrate before and after the spacers are formed. Thus, the inner and outer junction regions have extension regions under the inner and outer spacers, respectively, and the extension regions have different lengths.
摘要翻译：制造半导体器件的方法形成微尺寸栅极，并减轻短沟道效应。该方法包括在衬底上形成栅极的回拉工艺。该方法还包括在栅极上形成相对于栅极彼此不对称的内部和外部间隔物，以及在栅极的相对侧上在衬底中形成接合区域的间隔物。特别地，内部和外部间隔件形成在栅极的相对侧上，以便在栅极的底部具有不同的厚度。通过在形成间隔物之前和之后掺杂衬底来形成内部和外部结区域。因此，内部和外部连接区域分别在内部和外部间隔件下方具有延伸区域，并且延伸区域具有不同的长度。

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