专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07776445B2 Graphene-diamond hybrid material and method for preparing same using chemical vapor deposition 有权
标题翻译：石墨烯 - 金刚石杂化材料及其使用化学气相沉积的方法
公开(公告)号：US07776445B2
公开(公告)日：2010-08-17
申请号：US12191801
申请日：2008-08-14
申请人： Jae Kap Lee , Seung Cheol Lee , Phillip John , Wook Seong Lee , Jeon Kook Lee
发明人： Jae Kap Lee , Seung Cheol Lee , Phillip John , Wook Seong Lee , Jeon Kook Lee
IPC分类号： B32B9/00 , C23C16/26
CPC分类号： C30B29/02 , B82Y15/00 , B82Y30/00 , B82Y40/00 , C01B32/188 , C23C16/01 , C23C16/26 , C30B25/02 , C30B29/04 , Y10S977/742 , Y10T428/30
摘要： Disclosed herein are a graphene hybrid material and a method for preparing the graphene hybrid material, the graphene hybrid material comprising: a matrix having lattice planes disconnected on a surface thereof; and layers of graphene which are epitaxially grown along the lattice planes disconnected on the surface of the matrix such that the layers of graphene are oriented perpendicularly to the matrix, and which are spaced apart from each other and layered on the matrix in the same shape. The graphene hybrid material can be usefully used in the fields of next-generation semiconductor devices, biosensors, electrochemical electrodes and the like.
摘要翻译：本发明公开了石墨烯混合材料和石墨烯混合材料的制备方法，所述石墨烯混合材料包括：具有在其表面上断开晶格面的矩阵; 以及沿着在基体表面上断开的晶格面外延生长的石墨烯层，使得石墨烯层垂直于矩阵定向，并且彼此间隔开并以相同形状层叠在基体上。石墨烯混合材料可用于下一代半导体器件，生物传感器，电化学电极等领域。

2. 发明授权

US06642109B2 Method of manufacturing a flash memory cell 失效
公开(公告)号：US06642109B2
公开(公告)日：2003-11-04
申请号：US10283073
申请日：2002-10-30
申请人： Seung Cheol Lee , Sang Wook Park
发明人： Seung Cheol Lee , Sang Wook Park
IPC分类号： H01L218247
CPC分类号： H01L27/115 , H01L27/11521
摘要： A method of manufacturing a flash memory cell in which an ion implantation process is performed before a cleaning process for etching a protrusion of a trench insulating film to a nipple shape. As a result, the etch rate at a portion except for portions in which a moat will occur along the trench insulating film is increased. Therefore, generation of the moat in the trench insulating film can be prevented and spacing of the floating gate can be optimized.

3. 发明授权

US07948838B2 Disc discrimination method and apparatus 失效
标题翻译：光盘辨别方法和装置
公开(公告)号：US07948838B2
公开(公告)日：2011-05-24
申请号：US12021144
申请日：2008-01-28
申请人： Seung Cheol Lee
发明人： Seung Cheol Lee
IPC分类号： G11B7/00
CPC分类号： G11B19/127 , G11B2007/0006 , G11B2220/232 , G11B2220/2545 , G11B2220/2562 , G11B2220/2579
摘要： A method for discriminating a type of disc. The method includes receiving a signal having at least first and second peak points generated by an optical beam reflected from a record layer of the disc, comparing amplitudes of the first and second peak points, and determining the type of the disc based on a result of the comparing step.
摘要翻译：一种用于区分盘的类型的方法。所述方法包括接收具有由从盘的记录层反射的光束产生的至少第一和第二峰值点的信号，比较第一和第二峰值点的振幅，以及基于第一和第二峰值的结果确定盘的类型比较步骤。

4. 发明授权

US07259078B2 Method for forming isolation layer in semiconductor memory device 失效
标题翻译：在半导体存储器件中形成隔离层的方法
公开(公告)号：US07259078B2
公开(公告)日：2007-08-21
申请号：US11016437
申请日：2004-12-17
申请人： Seung Cheol Lee , Sang Wook Park , Pil Geun Song
发明人： Seung Cheol Lee , Sang Wook Park , Pil Geun Song
IPC分类号： H01L21/76
CPC分类号： H01L27/11526 , H01L21/76224 , H01L21/823462 , H01L21/823481 , H01L27/105 , H01L27/1052 , H01L27/11546
摘要： Disclosed herein is a method for forming an isolation film of a semiconductor memory device. According to the disclosure, in a pre-treatment cleaning process performed before a tunnel oxide film is formed, a SC-1 cleaning process is performed at a temperature ranging from 60° C. to 70° C. Therefore, oxide films in a cell region and a peripheral region are recessed even in the SC-1 cleaning process as well as a DHF cleaning process. A DHF cleaning time can be thus reduced. Accordingly, the method can minimize loss of a silicon substrate by DHF and can thus control the depth of a moat.
摘要翻译：本文公开了一种用于形成半导体存储器件的隔离膜的方法。根据公开内容，在形成隧道氧化膜之前进行的预处理清洗处理中，在60℃〜70℃的温度范围内进行SC-1清洗工序。因此，电池中的氧化膜区域和外围区域即使在SC-1清洁处理以及DHF清洁过程中也是凹陷的。因此可以减少DHF清洗时间。因此，该方法可以通过DHF使硅衬底的损耗最小化，从而可以控制护城河的深度。

5. 发明授权

US07211484B2 Method of manufacturing flash memory device 有权
标题翻译：制造闪存设备的方法
公开(公告)号：US07211484B2
公开(公告)日：2007-05-01
申请号：US10745008
申请日：2003-12-23
申请人： Seung Cheol Lee , Sang Wook Park
发明人： Seung Cheol Lee , Sang Wook Park
IPC分类号： H01L21/336 , H01L21/8242 , C09K13/00
CPC分类号： H01L27/11526 , H01L27/105 , H01L27/11546
摘要： Disclosed is a method of manufacturing a flash memory device. In a flash memory device using a SA-STI scheme, a trench for isolation is buried with oxide. A field oxide film is then formed by means of a polishing process. Next, field oxide films of a cell region and a low-voltage transistor region are selectively etched by a given thickness. As EFH values of the cell region, the low-voltage transistor region and the high-voltage transistor region become same or similar, it is possible to secure stability of a subsequent process.
摘要翻译：公开了一种制造闪速存储器件的方法。在使用SA-STI方案的闪存器件中，用氧化物掩埋用于隔离的沟槽。然后通过抛光工艺形成场氧化膜。接下来，选择性地蚀刻单元区域和低电压晶体管区域的场氧化膜一定厚度。作为单元区域的EFH值，低电压晶体管区域和高压晶体管区域变得相同或相似，可以确保后续处理的稳定性。

6. 发明授权

US08765587B2 Method of manufacturing non-volatile memory devices 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US08765587B2
公开(公告)日：2014-07-01
申请号：US13398235
申请日：2012-02-16
申请人： Su Hyun Lim , Seung Cheol Lee
发明人： Su Hyun Lim , Seung Cheol Lee
IPC分类号： H01L21/3205 , H01L21/302
CPC分类号： H01L27/11521 , H01L21/02057 , H01L21/3065 , H01L21/3086 , H01L21/76224
摘要： A method of manufacturing non-volatile memory devices includes forming a gate insulating layer and a first conductive layer over a semiconductor substrate, etching the first conductive layer and the gate insulating layer to expose part of the semiconductor substrate, forming trenches at a target depth of the semiconductor substrate by repeatedly performing a dry etch process for etching the exposed semiconductor substrate and a cleaning process for removing residues generated in the dry etch process, forming isolation layers within the trenches, forming a dielectric layer on a surface of the entire structure in which the isolation layers are formed, and forming a second conductive layer on the dielectric layer.
摘要翻译：一种制造非易失性存储器件的方法包括在半导体衬底上形成栅极绝缘层和第一导电层，蚀刻第一导电层和栅极绝缘层以暴露部分半导体衬底，在目标深度处形成沟槽通过重复执行用于蚀刻暴露的半导体衬底的干蚀刻工艺的半导体衬底和用于去除在干蚀刻工艺中产生的残留物的清洁工艺，在沟槽内形成隔离层，在整个结构的表面上形成介电层，其中形成隔离层，并在电介质层上形成第二导电层。

7. 发明授权

US07279394B2 Method for forming wall oxide layer and isolation layer in flash memory device 失效
标题翻译：在闪速存储器件中形成壁氧化物层和隔离层的方法
公开(公告)号：US07279394B2
公开(公告)日：2007-10-09
申请号：US11016436
申请日：2004-12-17
申请人： Seung Cheol Lee
发明人： Seung Cheol Lee
IPC分类号： H01L21/76
CPC分类号： H01L27/11568 , H01L21/823462 , H01L27/105 , H01L27/115 , H01L27/11526 , H01L27/11546
摘要： Disclosed herein are methods for forming wall oxide films in flash memory devices and methods for forming isolation films. After trenches are formed in the substrate, an ISSG (In-Situ Steam Generation) oxidization process is performed to form wall oxide films on sidewalls of the trenches. This process prohibits formation of facets at the top and bottom edge portions of the trenches. Thus, the top edges of the trenches are rounded. Furthermore, the ISSG oxidization process is performed at a low temperature for a relatively short time. Therefore, thermal stress due to carrying out an oxidization process for a long time is reduced and a dislocation phenomenon is thus prevented from occurring.
摘要翻译：本文公开了在快闪存储器件中形成壁氧化膜的方法和用于形成隔离膜的方法。在衬底中形成沟槽之后，进行ISSG（原位蒸汽生成）氧化处理以在沟槽的侧壁上形成壁氧化膜。该过程禁止在沟槽的顶部和底部边缘部分形成小面。因此，沟槽的顶部边缘是圆形的。此外，ISSG氧化过程在较短的时间内在低温下进行。因此，长时间进行氧化处理引起的热应力降低，从而防止发生位错现象。

8. 发明授权

US06913976B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06913976B2
公开(公告)日：2005-07-05
申请号：US10659814
申请日：2003-09-11
申请人： Seung Cheol Lee , Sang Wook Park
发明人： Seung Cheol Lee , Sang Wook Park
IPC分类号： H01L21/8247 , H01L21/28 , H01L27/115 , H01L29/788 , H01L29/792 , H10L21/336
CPC分类号： H01L29/7881 , H01L21/28247 , H01L21/28273
摘要： Disclosed is a method of manufacturing the semiconductor devices. The method comprising the steps of forming a gate electrode on a semiconductor substrate, depositing an oxide film for a spacer on the gate electrode, implementing an anisotropic dry etch process for the oxide film for the spacer to form spacers at the sidewalls of the gate electrode, and implementing a rapid thermal annealing process for the spacers under an oxygen atmosphere in order to segregate hydrogen contained within the spacers toward the surface. Therefore, hydrogen contained within the spacer oxide film is not diffused into the tunnel oxide film and the film quality of the tunnel oxide film is thus improved. As a result, program or erase operation characteristics of the flash memory device and a retention characteristic of the flash memory device could be improved.
摘要翻译：公开了半导体器件的制造方法。该方法包括以下步骤：在半导体衬底上形成栅电极，在栅电极上沉积用于间隔物的氧化物膜，实现用于间隔物的氧化膜的各向异性干蚀刻工艺，以在栅电极的侧壁处形成间隔物并且在氧气氛下实施用于间隔物的快速热退火工艺，以便将包含在间隔物内的氢气朝向表面分离。因此，间隔氧化膜中所含的氢不会扩散到隧道氧化膜中，因此隧道氧化膜的膜质量得到改善。结果，可以提高闪速存储器件的编程或擦除操作特性以及闪速存储器件的保持特性。

9. 发明授权

US06893981B2 Method of manufacturing a semiconductor device by RTA process in nitrogen atmosphere 失效
标题翻译：在氮气氛下通过RTA工艺制造半导体器件的方法
公开(公告)号：US06893981B2
公开(公告)日：2005-05-17
申请号：US10610628
申请日：2003-07-02
申请人： Sang Wook Park , Seung Cheol Lee
发明人： Sang Wook Park , Seung Cheol Lee
IPC分类号： H01L21/8247 , H01L21/336 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792 , H01L21/31 , H01L21/469
CPC分类号： H01L29/66825 , H01L29/42324
摘要： Disclosed is a method of manufacturing a semiconductor device. A gate is formed on a given region of a semiconductor substrate. Spacers are then formed using DCS-HTO or TEOS. Hydrogen remaining within the spacers is removed by a RTA process under nitrogen atmosphere and nitride films are formed on the spacers at the same time. In case of a flash memory device, a retention characteristic can be improved. A process of forming the nitride film additionally required in a subsequent contact hole formation process may be omitted. The sheet resistance of the gate could be improved by promoting growth of a crystal grain of a tungsten silicide film constituting a control gate.
摘要翻译：公开了半导体器件的制造方法。栅极形成在半导体衬底的给定区域上。然后使用DCS-HTO或TEOS形成间隔物。通过RTA工艺在氮气氛下除去留在间隔物内的氢，同时在间隔物上形成氮化物膜。在闪速存储器件的情况下，可以提高保持特性。可以省略在随后的接触孔形成处理中另外需要的形成氮化物膜的工艺。通过促进构成控制栅极的硅化钨膜的晶粒的生长，可以提高栅极的薄层电阻。

10. 发明授权

US07067389B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07067389B2
公开(公告)日：2006-06-27
申请号：US10887258
申请日：2004-07-08
申请人： Seung Cheol Lee , Sang Wook Park
发明人： Seung Cheol Lee , Sang Wook Park
IPC分类号： H01L21/76
CPC分类号： H01L27/11543 , H01L21/823462 , H01L27/105 , H01L27/11526
摘要： The present invention discloses a method for forming an element isolation film of a semiconductor device, comprising the steps of: sequentially forming a pad oxide film, a pad nitride film and a mask oxide film on a semiconductor substrate on which a first region for forming a high voltage device and a second region for forming a low voltage device or a flash memory cell are defined; etching the mask oxide film, the pad nitride film and the pad oxide film in the first region and the mask oxide film in the second region, and forming an oxide film for the high voltage device in the first region; removing the residual pad nitride film in the second region; removing the nitride film and partially removing the oxide film for the high voltage device in the first region, wherein the oxide film for the high voltage device has a third thickness; removing the residual pad oxide film in the second region; partially removing the oxide film for the high voltage device in the first region according to a cleaning process, wherein the oxide film for the high voltage device has a third thickness; and forming a tunnel oxide film over the resulting structure, wherein a gate oxide film for a high voltage device including the oxide film for the high voltage device and the tunnel oxide film is formed in the first region, and the tunnel oxide film for the low voltage device and cell is formed in the second region.
摘要翻译：本发明公开了一种形成半导体器件的元件隔离膜的方法，包括以下步骤：在半导体衬底上依次形成衬垫氧化膜，衬垫氮化物膜和掩模氧化物膜，在半导体衬底上形成第一区域定义高压装置和用于形成低电压装置或闪存单元的第二区域; 在所述第一区域中蚀刻所述掩模氧化膜，所述衬垫氮化物膜和所述衬垫氧化物膜，并且在所述第二区域中蚀刻所述掩模氧化物膜，并且在所述第一区域中形成用于所述高电压器件的氧化物膜; 去除所述第二区域中的所述残留的衬垫氮化物膜; 去除所述氮化物膜并部分地去除所述第一区域中的所述高电压器件的氧化物膜，其中所述高压器件的氧化物膜具有第三厚度; 去除所述第二区域中的残余衬垫氧化物膜; 根据清洁过程，部分去除第一区域中的高电压器件的氧化膜，其中用于高压器件的氧化物膜具有第三厚度; 并在所得到的结构上形成隧道氧化膜，其中在第一区域中形成用于包括用于高压器件的氧化物膜和隧道氧化物膜的高电压器件的栅极氧化膜，并且用于低电压的隧道氧化物膜电压装置和电池形成在第二区域中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式