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1. 发明授权

US07015097B2 Method of manufacturing flash memory device 失效
标题翻译：制造闪存设备的方法
公开(公告)号：US07015097B2
公开(公告)日：2006-03-21
申请号：US10887260
申请日：2004-07-08
申请人： Seung Cheol Lee , Sang Wook Park , Pil Geun Song
发明人： Seung Cheol Lee , Sang Wook Park , Pil Geun Song
IPC分类号： H01L21/336
CPC分类号： H01L27/11539 , H01L27/11526 , H01L27/11536 , H01L27/11541 , H01L27/11543
摘要： Provided relates to a method of a flash memory device, which performs a first rapid thermal oxidation process at a H2 rich atmosphere for recovering an etched damage during a gate forming process, and performs a second rapid thermal oxidation process at the H2 rich atmosphere for ion-activating after performing an ion implantation process for forming a cell transistor junction and a peripheral circuit transistor junction. As a result of those processes, a Si-dangling bond cut off during a gate etching process has a Si—H combination structure and the whole processing time is reduced, and thus an abnormal oxidation caused at an edge of an ONO layer and a tunnel oxide film, which can make it possible to prevent a smiling phenomena of the ONO layer and a bird's beak phenomena of the tunnel oxide film.
摘要翻译：本发明涉及一种闪存器件的方法，其在H 2富含气氛下进行第一快速热氧化处理，以在栅极形成工艺期间回收蚀刻损伤，并执行第二快速热氧化在进行用于形成单元晶体管结的离子注入工艺和外围电路晶体管结的离子激活之后，在富H 2气氛下进行离子激活。作为这些工艺的结果，在栅极蚀刻工艺期间切断的Si-悬挂键具有Si-H组合结构，并且整个处理时间减少，因此在ONO层和隧道的边缘处引起异常氧化氧化膜，能够防止ONO层的微笑现象和隧道状氧化膜的鸟喙现象。

2. 发明授权

US07259078B2 Method for forming isolation layer in semiconductor memory device 失效
标题翻译：在半导体存储器件中形成隔离层的方法
公开(公告)号：US07259078B2
公开(公告)日：2007-08-21
申请号：US11016437
申请日：2004-12-17
申请人： Seung Cheol Lee , Sang Wook Park , Pil Geun Song
发明人： Seung Cheol Lee , Sang Wook Park , Pil Geun Song
IPC分类号： H01L21/76
CPC分类号： H01L27/11526 , H01L21/76224 , H01L21/823462 , H01L21/823481 , H01L27/105 , H01L27/1052 , H01L27/11546
摘要： Disclosed herein is a method for forming an isolation film of a semiconductor memory device. According to the disclosure, in a pre-treatment cleaning process performed before a tunnel oxide film is formed, a SC-1 cleaning process is performed at a temperature ranging from 60° C. to 70° C. Therefore, oxide films in a cell region and a peripheral region are recessed even in the SC-1 cleaning process as well as a DHF cleaning process. A DHF cleaning time can be thus reduced. Accordingly, the method can minimize loss of a silicon substrate by DHF and can thus control the depth of a moat.
摘要翻译：本文公开了一种用于形成半导体存储器件的隔离膜的方法。根据公开内容，在形成隧道氧化膜之前进行的预处理清洗处理中，在60℃〜70℃的温度范围内进行SC-1清洗工序。因此，电池中的氧化膜区域和外围区域即使在SC-1清洁处理以及DHF清洁过程中也是凹陷的。因此可以减少DHF清洗时间。因此，该方法可以通过DHF使硅衬底的损耗最小化，从而可以控制护城河的深度。

3. 发明授权

US07429520B2 Methods for forming trench isolation 有权
标题翻译：形成沟槽隔离的方法
公开(公告)号：US07429520B2
公开(公告)日：2008-09-30
申请号：US11156998
申请日：2005-06-20
申请人： Pil Geun Song , Young Jun Kim , Sang Wook Park
发明人： Pil Geun Song , Young Jun Kim , Sang Wook Park
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： A method of forming an isolation film in a semiconductor device is disclosed. The disclosed method includes performing a patterning process on a predetermined region of a semiconductor substrate in which a patterned pad film is formed, forming a trench defining an inactive region and an active region, forming a liner film on the entire surface including the trench, forming an insulating film for trench burial only within the trench, stripping the remaining liner film formed except for the inside of the trench and the patterned pad film formed below the liner film, forming a sacrificial film on the entire surface, and performing a polishing process on the entire surface in which the sacrificial film is formed until the semiconductor substrate of the active region is exposed, thereby forming the isolation film having no topology difference with the semiconductor substrate of the active region.
摘要翻译：公开了一种在半导体器件中形成隔离膜的方法。所公开的方法包括在其上形成图案化焊盘膜的半导体衬底的预定区域上执行图案化工艺，形成限定非活性区域和有源区域的沟槽，在包括沟槽的整个表面上形成衬垫膜，形成用于仅在沟槽内进行沟槽埋置的绝缘膜，剥离除了沟槽内部形成的剩余衬垫膜和形成在衬垫膜下方的图案化衬垫膜，在整个表面上形成牺牲膜，并对其中形成牺牲膜的整个表面直到有源区的半导体衬底被暴露，从而形成与有源区的半导体衬底没有拓扑结构差异的隔离膜。

4. 发明申请

US20060051930A1 Method for forming isolation layer in semiconductor memory device 失效
标题翻译：在半导体存储器件中形成隔离层的方法
公开(公告)号：US20060051930A1
公开(公告)日：2006-03-09
申请号：US11016437
申请日：2004-12-17
申请人： Seung Lee , Sang Wook Park , Pil Geun Song
发明人： Seung Lee , Sang Wook Park , Pil Geun Song
IPC分类号： H01L21/76
CPC分类号： H01L27/11526 , H01L21/76224 , H01L21/823462 , H01L21/823481 , H01L27/105 , H01L27/1052 , H01L27/11546
摘要： Disclosed herein is a method for forming an isolation film of a semiconductor memory device. According to the disclosure, in a pre-treatment cleaning process performed before a tunnel oxide film is formed, a SC-1 cleaning process is performed at a temperature ranging from 60° C. to 70° C. Therefore, oxide films in a cell region and a peripheral region are recessed even in the SC-1 cleaning process as well as a DHF cleaning process. A DHF cleaning time can be thus reduced. Accordingly, the method can minimize loss of a silicon substrate by DHF and can thus control the depth of a moat.
摘要翻译：本文公开了一种用于形成半导体存储器件的隔离膜的方法。根据公开内容，在形成隧道氧化膜之前进行的预处理清洗处理中，在60℃〜70℃的温度范围内进行SC-1清洗工序。因此，电池中的氧化膜区域和外围区域即使在SC-1清洁处理以及DHF清洁过程中也是凹陷的。因此可以减少DHF清洗时间。因此，该方法可以通过DHF使硅衬底的损耗最小化，从而可以控制护城河的深度。

5. 发明授权

US07138314B2 Method of manufacturing flash memory device 失效
标题翻译：制造闪存设备的方法
公开(公告)号：US07138314B2
公开(公告)日：2006-11-21
申请号：US11014570
申请日：2004-12-16
申请人： Pil Geun Song , Sang Wook Park
发明人： Pil Geun Song , Sang Wook Park
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , H01L27/105 , H01L27/1052 , H01L27/115 , H01L27/11526 , H01L27/11546
摘要： Disclosed is a method of manufacturing a flash memory device using a STI process. Isolation films of a projection structure becomes isolation films of a nipple structure by means of a slant ion implant process and a wet etching process. A polysilicon layer is removed until the tops of the isolation films through two step processes of a CMP process and an etch-back process, thus forming floating gates and gates of high voltage and low voltage transistors of a cell. As such, as the isolation films of the nipple structure and the floating gates are formed at the same time, it is possible secure the overlay margin between an active region and the floating gates regardless of the shrinkage of the flash memory device. Also, moats can be prevented from being generated at the boundary between the active regions when the isolation films of the nipple structure are formed. Further, when the floating gates and the gates of the high voltage and low voltage transistors are formed, a dishing phenomenon and an erosion phenomenon can be prevented.
摘要翻译：公开了使用STI工艺制造闪速存储器件的方法。突起结构的隔离膜通过倾斜离子注入工艺和湿蚀刻工艺成为乳头结构的隔离膜。通过CMP工艺和回蚀工艺的两个步骤，去除多晶硅层直到隔离膜的顶部，从而形成电池的高压和低压晶体管的浮动栅极和栅极。因此，由于乳头结构和浮动栅极的隔离膜同时形成，所以可以确保有源区域和浮动栅极之间的覆盖边界，而与闪存器件的收缩无关。此外，当形成乳头结构的隔离膜时，可以防止在有源区域之间的边界处产生护壁。此外，当形成高压和低压晶体管的浮置栅极和栅极时，可以防止凹陷现象和侵蚀现象。

6. 发明授权

US06967151B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06967151B2
公开(公告)日：2005-11-22
申请号：US10872883
申请日：2004-06-21
申请人： Pil Geun Song , Sang Wook Park
发明人： Pil Geun Song , Sang Wook Park
IPC分类号： H01L21/768 , H01L21/336 , H01L21/8234 , H01L23/522 , H01L21/3205 , H01L21/4763
CPC分类号： H01L21/823468
摘要： Provided is a method of manufacturing a semiconductor device. In the method, an insulation spacer is formed thicker than a target thickness on sidewalls of a gate line formed on a semiconductor substrate. The thickness of the insulation spacer is adjusted by means of a wet etching process, so that aspect ratios of spaces between gate lines become smaller to control opening widths of junction areas. The method enhances fill-up characteristics of insulation layers between the gate lines, and improves the reliability of process and an electrical characteristic of device by controlling the opening widths of junction areas.
摘要翻译：提供一种制造半导体器件的方法。在该方法中，在形成在半导体衬底上的栅极线的侧壁上形成比目标厚度更厚的绝缘间隔物。通过湿式蚀刻工艺来调节绝缘间隔物的厚度，使得栅极线之间的空间的纵横比变得更小以控制接合区域的开口宽度。该方法提高了栅极线之间绝缘层的填充特性，并通过控制接合面积的开口宽度提高了工艺的可靠性和器件的电气特性。

7. 发明申请

US20080242046A1 Method on Forming an Isolation Film or a Semiconductor Device 审中-公开
标题翻译：形成绝缘膜或半导体器件的方法
公开(公告)号：US20080242046A1
公开(公告)日：2008-10-02
申请号：US12112679
申请日：2008-04-30
申请人： Pil Geun Song , Young Jun Kim , Sang Wook Park
发明人： Pil Geun Song , Young Jun Kim , Sang Wook Park
IPC分类号： H01L21/762
CPC分类号： H01L21/76224
摘要： A method of forming an isolation film in a semiconductor device is disclosed. The disclosed method includes performing a patterning process on a predetermined region of a semiconductor substrate in which a patterned pad film is formed, forming a trench defining an inactive region and an active region, forming a liner film on the entire surface including the trench, forming an insulating film for trench burial only within the trench, stripping the remaining liner film formed except for the inside of the trench and the patterned pad film formed below the liner film, forming a sacrificial film on the entire surface, and performing a polishing process on the entire surface in which the sacrificial film is formed until the semiconductor substrate of the active region is exposed, thereby forming the isolation film having no topology difference with the semiconductor substrate of the active region.
摘要翻译：公开了一种在半导体器件中形成隔离膜的方法。所公开的方法包括在其上形成图案化焊盘膜的半导体衬底的预定区域上执行图案化工艺，形成限定非活性区域和有源区域的沟槽，在包括沟槽的整个表面上形成衬垫膜，形成用于仅在沟槽内进行沟槽埋置的绝缘膜，剥离除了沟槽内部形成的剩余衬垫膜和形成在衬垫膜下方的图案化衬垫膜，在整个表面上形成牺牲膜，并对其中形成牺牲膜的整个表面直到有源区的半导体衬底被暴露，从而形成与有源区的半导体衬底没有拓扑结构差异的隔离膜。

8. 发明申请

US20080206955A1 Method of Forming an Isolation Film in a Semiconductor Device 审中-公开
标题翻译：在半导体器件中形成绝缘膜的方法
公开(公告)号：US20080206955A1
公开(公告)日：2008-08-28
申请号：US12112725
申请日：2008-04-30
申请人： Pil Geun Song , Young Jun Kim , Sang Wook Park
发明人： Pil Geun Song , Young Jun Kim , Sang Wook Park
IPC分类号： H01L21/762 , H01L21/306
CPC分类号： H01L21/76224
摘要： A method of forming an isolation film in a semiconductor device is disclosed. The disclosed method includes performing a patterning process on a predetermined region of a semiconductor substrate in which a patterned pad film is formed, forming a trench defining an inactive region and an active region, forming a liner film on the entire surface including the trench, forming an insulating film for trench burial only within the trench, stripping the remaining liner film formed except for the inside of the trench and the patterned pad film formed below the liner film, forming a sacrificial film on the entire surface, and performing a polishing process on the entire surface in which the sacrificial film is formed until the semiconductor substrate of the active region is exposed, thereby forming the isolation film having no topology difference with the semiconductor substrate of the active region.
摘要翻译：公开了一种在半导体器件中形成隔离膜的方法。所公开的方法包括在其上形成图案化焊盘膜的半导体衬底的预定区域上执行图案化工艺，形成限定非活性区域和有源区域的沟槽，在包括沟槽的整个表面上形成衬垫膜，形成用于仅在沟槽内进行沟槽埋置的绝缘膜，剥离除了沟槽内部形成的剩余衬垫膜和形成在衬垫膜下方的图案化衬垫膜，在整个表面上形成牺牲膜，并对其中形成牺牲膜的整个表面直到有源区的半导体衬底被暴露，从而形成与有源区的半导体衬底没有拓扑结构差异的隔离膜。

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