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1. 发明授权

US09276800B2 Single frequency synthesizer based FDD transceiver 有权
标题翻译：基于单频合成器的FDD收发器
公开(公告)号：US09276800B2
公开(公告)日：2016-03-01
申请号：US13608677
申请日：2012-09-10
申请人： Hyun Ho Boo , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
发明人： Hyun Ho Boo , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
IPC分类号： H04J1/02 , H04L27/38 , H04L27/20 , H04L27/233 , H04L27/36 , H04B1/00
CPC分类号： H04L27/3836 , H04B1/0007 , H04L27/206 , H04L27/2092 , H04L27/2332 , H04L27/362 , H04L27/3854
摘要： The present invention relates to a single frequency synthesizer based FDD transceiver. A single frequency synthesizer generates and provides a carrier frequency so that frequency up-conversion and frequency down-conversion can be performed at the time of transmission and reception. Accordingly, the area, power consumption, and design complexity of the entire system can be reduced, and the performance of the system can be improved.
摘要翻译：本发明涉及一种基于单频合成器的FDD收发器。单个频率合成器产生并提供载波频率，使得可以在发送和接收时执行上变频和下变频。因此，可以降低整个系统的面积，功耗和设计复杂性，并且可以提高系统的性能。

2. 发明申请

US20130064148A1 SINGLE FREQUENCY SYNTHESIZER BASED FDD TRANSCEIVER 有权
标题翻译：单频合成器FDD收发器
公开(公告)号：US20130064148A1
公开(公告)日：2013-03-14
申请号：US13608677
申请日：2012-09-10
申请人： Hyun Ho BOO , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
发明人： Hyun Ho BOO , Seon-Ho Han , Jang Hong Choi , Ik Soo Eo , Hyun Kyu Yu
IPC分类号： H04J1/02
CPC分类号： H04L27/3836 , H04B1/0007 , H04L27/206 , H04L27/2092 , H04L27/2332 , H04L27/362 , H04L27/3854
摘要： The present invention relates to a single frequency synthesizer based FDD transceiver. A single frequency synthesizer generates and provides a carrier frequency so that frequency up-conversion and frequency down-conversion can be performed at the time of transmission and reception. Accordingly, the area, power consumption, and design complexity of the entire system can be reduced, and the performance of the system can be improved.
摘要翻译：本发明涉及一种基于单频合成器的FDD收发器。单个频率合成器产生并提供载波频率，使得可以在发送和接收时执行上变频和下变频。因此，可以降低整个系统的面积，功耗和设计复杂性，并且可以提高系统的性能。

3. 发明申请

US20130156141A1 DIGITAL RADIO FREQUENCY (RF) RECEIVER 有权
标题翻译：数字无线电频率（RF）接收机
公开(公告)号：US20130156141A1
公开(公告)日：2013-06-20
申请号：US13609638
申请日：2012-09-11
申请人： Ik Soo Eo , Sang-Kyun Kim , Mun Yang Park , Seon-Ho Han , Hyun Kyu Yu
发明人： Ik Soo Eo , Sang-Kyun Kim , Mun Yang Park , Seon-Ho Han , Hyun Kyu Yu
IPC分类号： H04B1/10
CPC分类号： H04B1/0021
摘要： A digital RF receiver does not use a separate receiver according to a mode and a band for multi-mode reception, MIMO reception, and bandwidth extension reception, and changes only setting variables in a single receiver structure so as to implement multi-mode reception, MIMO reception, bandwidth extension reception, and/or simultaneous multi-mode operation, such that complexity of the receiver, development cost, and power consumption can be reduced.
摘要翻译：数字RF接收机根据用于多模式接收，MIMO接收和带宽扩展接收的模式和频带不使用单独的接收机，并且仅改变单个接收机结构中的设置变量以便实现多模式接收， MIMO接收，带宽扩展接收和/或同时多模式操作，从而可以减少接收机的复杂性，开发成本和功耗。

4. 发明授权

US09294135B2 Digital radio frequency (RF) receiver 有权
标题翻译：数字射频（RF）接收机
公开(公告)号：US09294135B2
公开(公告)日：2016-03-22
申请号：US13609638
申请日：2012-09-11
申请人： Ik Soo Eo , Sang-Kyun Kim , Mun Yang Park , Seon-Ho Han , Hyun Kyu Yu
发明人： Ik Soo Eo , Sang-Kyun Kim , Mun Yang Park , Seon-Ho Han , Hyun Kyu Yu
IPC分类号： H04B1/00
CPC分类号： H04B1/0021
摘要： A digital RF receiver does not use a separate receiver according to a mode and a band for multi-mode reception, MIMO reception, and bandwidth extension reception, and changes only setting variables in a single receiver structure so as to implement multi-mode reception, MIMO reception, bandwidth extension reception, and/or simultaneous multi-mode operation, such that complexity of the receiver, development cost, and power consumption can be reduced.
摘要翻译：数字RF接收机根据用于多模式接收，MIMO接收和带宽扩展接收的模式和频带不使用单独的接收机，并且仅改变单个接收机结构中的设置变量以便实现多模式接收， MIMO接收，带宽扩展接收和/或同时多模式操作，从而可以减少接收机的复杂性，开发成本和功耗。

5. 再颁专利

USRE40424E1 Structure of delta-sigma fractional type divider 失效
$Structure of delta-sigma fractional type divider$
标题翻译： delta-sigma分数分频器的结构
公开(公告)号：USRE40424E1
公开(公告)日：2008-07-08
申请号：US11318392
申请日：2005-12-22
申请人： Seon-Ho Han , Jang-Hong Choi , Jae-Hong Jang , Hyun-Kyu Yu
发明人： Seon-Ho Han , Jang-Hong Choi , Jae-Hong Jang , Hyun-Kyu Yu
IPC分类号： H03K21/00
CPC分类号： H03M7/3022 , H03L7/1978
摘要： The present invention relates to a structure of a delta-sigma fractional type divider. The divider structure adds an external input value and an output value of a delta-sigma modulator to modulate a value of a swallow counter. Therefore, the present invention can provide a delta-sigma fractional type divider the structure is simple and that can obtain an effect of a structure of a delta sigma mode while having a wide-band frequency mixing capability.
摘要翻译：本发明涉及一种delta-sigma分数型分频器的结构。分频器结构增加了Δ-Σ调制器的外部输入值和输出值，以调制吞咽计数器的值。因此，本发明可以提供一种Δ-Σ分数分频器，其结构简单，并且可以获得具有宽带频率混合能力的Δ-Σ模式的结构的效果。

6. 发明申请

US20060132242A1 Low noise amplifier for wideband tunable matching 有权
标题翻译：低噪声放大器，用于宽带可调谐匹配
公开(公告)号：US20060132242A1
公开(公告)日：2006-06-22
申请号：US11241128
申请日：2005-09-29
申请人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu
发明人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu
IPC分类号： H03F3/04
CPC分类号： H03F3/193 , H03F1/223 , H03F1/26 , H03F1/42 , H03F1/56 , H03F2200/168 , H03F2200/36 , H03F2200/372 , H03F2200/489
摘要： Provided is a low noise amplifier with a common source and a source degeneration, which has linearity, power gain, noise factor, and lossless input matching. The low noise amplifier includes: a first inductor having one terminal connected to an input terminal receiving a signal; a second inductor having one terminal connected to a ground; a MOS transistor having a gate connected to the first inductor, a source connected to the other terminal of the second inductor, and a drain transmitting a signal; and a variable capacitor connected between the source and gate of the MOS transistor and varying an input matching frequency at the input terminal.
摘要翻译：提供了具有共同源极和源极退化的低噪声放大器，其具有线性度，功率增益，噪声因数和无损输入匹配。低噪声放大器包括：第一电感器，其一端连接到接收信号的输入端; 第二电感器，其一端连接到地; MOS晶体管，具有连接到第一电感器的栅极，连接到第二电感器的另一个端子的源极和发射信号的漏极; 以及可变电容器，其连接在MOS晶体管的源极和栅极之间并改变输入端子处的输入匹配频率。

7. 发明授权

US07773953B2 Wireless transceiving apparatus for variability of signal processing band 有权
标题翻译：用于信号处理频带变化的无线收发装置
公开(公告)号：US07773953B2
公开(公告)日：2010-08-10
申请号：US11224811
申请日：2005-09-12
申请人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu , Cheon-Soo Kim
发明人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu , Cheon-Soo Kim
IPC分类号： H04B1/40
CPC分类号： H04B1/405
摘要： Provided is a wireless transceiving apparatus for variability of signal processing band, in which at least one resonator of an analog processor and a VCO are simultaneously controlled using a frequency synthesizer, and a frequency of the VCO and a resonance frequency of the analog processor are controlled to have a rational number ratio, thereby capable of varying the signal processing band. The wireless transceiving apparatus includes: an analog processor having a plurality of resonators on a path of transmission/reception signals, for performing analog signal processing; a digital processor for performing digital signal processing on an output signal of the analog processor or data to be transmitted to the analog processor; and a frequency synthesizer for providing a local oscillation (LO) frequency and a controlling signal to the resonators of the analog processor so as to vary a signal processing band of the analog processor.
摘要翻译：提供了一种用于信号处理频带的可变性的无线收发装置，其中使用频率合成器同时控制模拟处理器和VCO的至少一个谐振器，并且控制VCO的频率和模拟处理器的谐振频率具有有理数比，由此能够改变信号处理频带。无线收发装置包括：模拟处理器，在发送/接收信号的路径上具有多个谐振器，用于执行模拟信号处理; 用于对模拟处理器的输出信号执行数字信号处理的数字处理器或将被发送到模拟处理器的数据; 以及用于向模拟处理器的谐振器提供本地振荡（LO）频率和控制信号以便改变模拟处理器的信号处理频带的频率合成器。

8. 发明授权

US08509353B2 Digital receiver 有权
标题翻译：数字接收机
公开(公告)号：US08509353B2
公开(公告)日：2013-08-13
申请号：US12818510
申请日：2010-06-18
申请人： Seon-Ho Han , Hyun Kyu Yu
发明人： Seon-Ho Han , Hyun Kyu Yu
IPC分类号： H03K9/00
CPC分类号： H04B1/0025 , H04B1/001
摘要： In a digital receiver, a noise attenuation and signal magnitude mapping variable amplifying unit includes a filter and an amplifier, amplifies and band-bass filters an analog signal and attenuating white noise and an interference signal other than a band signal. An ADC performs subsampling on a carrier frequency of a desired signal and performs oversampling on the band of the desired signal by using a sampling frequency to convert the analog signal which has passed through the noise attenuation and signal magnitude mapping variable amplifying unit into a digital signal of a direct conversion frequency band or an intermediate frequency band. The ADC has a dynamic range for processing both the desired signal and an undesired signal adjacent to the desired signal. A digital signal processing unit converts a signal frequency of the digital signal or digital-filters an undesired signal within the digital signal and processes the digital signal by digitally adjusting a gain.
摘要翻译：在数字接收机中，噪声衰减和信号幅度映射可变放大单元包括滤波器和放大器，对模拟信号进行放大和频带滤波，并衰减白噪声和除频带信号之外的干扰信号。 ADC在期望信号的载波频率上执行子采样，并通过使用采样频率对已经通过噪声衰减和信号幅度映射可变放大单元的模拟信号进行数字信号的期望信号的频带上的过采样，的直接转换频带或中频带。 ADC具有用于处理期望信号和与期望信号相邻的不期望信号的动态范围。数字信号处理单元转换数字信号的信号频率或数字滤波数字信号内的不需要的信号，并通过数字调节增益来处理数字信号。

9. 发明授权

US07323939B2 Low noise amplifier for wideband tunable matching 有权
标题翻译：低噪声放大器，用于宽带可调谐匹配
公开(公告)号：US07323939B2
公开(公告)日：2008-01-29
申请号：US11241128
申请日：2005-09-29
申请人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu
发明人： Seon-Ho Han , Mun-Yang Park , Hyun-Kyu Yu
IPC分类号： H03F3/04
CPC分类号： H03F3/193 , H03F1/223 , H03F1/26 , H03F1/42 , H03F1/56 , H03F2200/168 , H03F2200/36 , H03F2200/372 , H03F2200/489
摘要： Provided is a low noise amplifier with a common source and a source degeneration, which has linearity, power gain, noise factor, and lossless input matching. The low noise amplifier includes: a first inductor having one terminal connected to an input terminal receiving a signal; a second inductor having one terminal connected to a ground; a MOS transistor having a gate connected to the first inductor, a source connected to the other terminal of the second inductor, and a drain transmitting a signal; and a variable capacitor connected between the source and gate of the MOS transistor and varying an input matching frequency at the input terminal.
摘要翻译：提供了具有共同源极和源极退化的低噪声放大器，其具有线性度，功率增益，噪声因数和无损输入匹配。低噪声放大器包括：第一电感器，其一端连接到接收信号的输入端; 第二电感器，其一端连接到地; MOS晶体管，具有连接到第一电感器的栅极，连接到第二电感器的另一个端子的源极和发射信号的漏极; 以及可变电容器，其连接在MOS晶体管的源极和栅极之间并改变输入端子处的输入匹配频率。

10. 发明授权

US06615398B2 Method for dividing ROM and DDFS using the same method 有权
公开(公告)号：US06615398B2
公开(公告)日：2003-09-02
申请号：US10017315
申请日：2001-12-18
申请人： Hyun Kyu Yu , Seon-Ho Han , Mun Yang Park , Seong-Do Kim , Yong-Sik Youn , Lee-Sup Kim , Ki-Hyuk Sung , Byung-Do Yang , Young-Jun Kim
发明人： Hyun Kyu Yu , Seon-Ho Han , Mun Yang Park , Seong-Do Kim , Yong-Sik Youn , Lee-Sup Kim , Ki-Hyuk Sung , Byung-Do Yang , Young-Jun Kim
IPC分类号： G06F1750
CPC分类号： G06F1/0356 , G06F1/0328 , G06F2101/04 , G11C17/00
摘要： The present invention relates to a ROM division method for reducing the size of a ROM in a direct digital frequency synthesizer (DDFS), which is used to synthesize a frequency in a communication system requiring fast frequency conversion. A ROM consuming most energy in the system, a modified Nicholas architecture is brought forth to reduce the size of ROM. In this modified Nicholas architecture, a ROM is divided into coarse ROM and fine ROM to convert phase to sine value. The present invention divides the coarse ROM and the fine ROM into quantized ROM and error ROM respectively. Then, value stored in each ROM is segmented in certain intervals and the minimum quantized value in each of the section is stored in the quantized ROM, while the difference between the original ROM value and the quantized ROM value is stored in the error ROM. This way, the size of a ROM can be reduced. Phase value inputted in a DDFS, a sine value is calculated by adding the four ROM values, i.e., coarse-quantized ROM, coarse-error ROM, fine-quantized ROM and fine-error ROM.

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