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1. 发明申请

US20080224221A1 CASCODE CURRENT MIRROR AND METHOD 有权
公开(公告)号：US20080224221A1
公开(公告)日：2008-09-18
申请号：US11686439
申请日：2007-03-15
申请人： Hongning Yang , Geoffrey W. Perkins , Jiang-Kai Zuo
发明人： Hongning Yang , Geoffrey W. Perkins , Jiang-Kai Zuo
IPC分类号： H01L29/76
CPC分类号： H01L29/7833 , H01L21/823425 , H01L21/823456 , H01L21/823462 , H01L27/088 , H01L29/6659 , Y10S438/981
摘要： A cascode amplifier (CA) (60) is described having a bottom transistor (T1new) with a relatively thin gate dielectric (67) and higher ratio (RB) of channel length (Lch1new) to width (W1new) and a series coupled top transistor (T2new) with a relatively thick gate dielectric (68) and a lower ratio (RT) of channel length (Lch2new) to width (W2new). An improved cascode current mirror (CCM) (74) is formed using a coupled pair of CAs (60, 60′), one (60) forming the reference current (RC) side (601) and the other (60′) forming the mirror current side (602) of the CCM (74). The gates (65, 65′) of the bottom transistors (T1new, T3new) are tied together and to the common node (21) between the series coupled bottom (T1new) and top (T2new) transistors of the RC side (601), and the gates (66′, 66′) of the top transistors (T2new, T4new) are coupled together and to the top drain node (64) of the RC side (601). The area of the CCM (74) can be substantially shrunk without adverse affect on the matching, noise performance and maximum allowable operating voltage.
摘要翻译：描述了具有相对薄的栅极电介质（67）和沟道长度（Lch 1

2. 发明申请

US20100156388A1 CASCODE CURRENT MIRROR AND METHOD 有权
公开(公告)号：US20100156388A1
公开(公告)日：2010-06-24
申请号：US12715941
申请日：2010-03-02
申请人： Hongning Yang , Geoffrey W. Perkins , Jiang-Kai Zuo
发明人： Hongning Yang , Geoffrey W. Perkins , Jiang-Kai Zuo
IPC分类号： G05F3/16
CPC分类号： H01L29/7833 , H01L21/823425 , H01L21/823456 , H01L21/823462 , H01L27/088 , H01L29/6659 , Y10S438/981
摘要： Embodiments of a cascode amplifier (CA) include a bottom transistor with a relatively thin gate dielectric and higher ratio of channel length to width and a series coupled top transistor with a relatively thick gate dielectric and a lower ratio of channel length to width. A cascode current mirror (CCM) is formed using a coupled pair of CAs, one forming the reference current (RC) side and the other forming the mirror current side of the CCM. The gates of the bottom transistors are tied together and to the common node between the series coupled bottom and top transistors of the RC side, and the gates of the top transistors are coupled together and to the top drain node of the RC side. The area of the CCM can be substantially shrunk without adverse affect on the matching, noise performance and maximum allowable operating voltage.
摘要翻译：共源共栅放大器（CA）的实施例包括具有相对薄的栅极介质和沟道长度与宽度的较高比的底部晶体管和具有相对较厚的栅极电介质和沟道长度与宽度的较小比的串联耦合顶部晶体管。使用耦合的一对CA形成共源共栅电流镜（CCM），一对形成基准电流（RC）侧，另一个形成CCM的反射镜电流侧。底部晶体管的栅极连接在RC侧的串联耦合的底部和顶部晶体管之间的公共节点，并且顶部晶体管的栅极耦合在一起并连接到RC侧的顶部漏极节点。 CCM的面积可以大幅收缩，对匹配，噪声性能和最大允许工作电压没有不利影响。

3. 发明授权

US07700417B2 Methods for forming cascode current mirrors 有权
标题翻译：形成共源共栅电流镜的方法
公开(公告)号：US07700417B2
公开(公告)日：2010-04-20
申请号：US11686439
申请日：2007-03-15
申请人： Hongning Yang , Geoffrey W. Perkins , Jiang-Kai Zuo
发明人： Hongning Yang , Geoffrey W. Perkins , Jiang-Kai Zuo
IPC分类号： H01L21/00
CPC分类号： H01L29/7833 , H01L21/823425 , H01L21/823456 , H01L21/823462 , H01L27/088 , H01L29/6659 , Y10S438/981
摘要： A cascode amplifier (CA) (60) is described having a bottom transistor (T1new) with a relatively thin gate dielectric (67) and higher ratio (RB) of channel length (Lch1new) to width (W1new) and a series coupled top transistor (T2new) with a relatively thick gate dielectric (68) and a lower ratio (RT) of channel length (Lch2new) to width (W2new). An improved cascode current mirror (CCM) (74) is formed using a coupled pair of CAs (60, 60′), one (60) forming the reference current (RC) side (601) and the other (60′) forming the mirror current side (602) of the CCM (74). The gates (65, 65′) of the bottom transistors (T1new, T3new) are tied together and to the common node (21) between the series coupled bottom (T1new) and top (T2new) transistors of the RC side (601), and the gates (66′, 66′) of the top transistors (T2new, T4new) are coupled together and to the top drain node (64) of the RC side (601). The area of the CCM (74) can be substantially shrunk without adverse affect on the matching, noise performance and maximum allowable operating voltage.
摘要翻译：描述了一种级联放大器（CA）（60），其具有具有相对薄的栅极电介质（67）和沟道长度（Lch1new）至宽度（W1new）的更高比率（RB））的底部晶体管（T1new）和串联耦合顶部晶体管（T2new），具有相对较厚的栅极电介质（68）和沟道长度（Lch2new）与宽度（W2new）的较低比率（RT）。使用耦合的一对CA（60,60'），形成基准电流（RC）侧（601）的一个（60）和形成基准电流（RC））的另一个（60'）形成改进的共源共栅电流镜（CC） CCM（74）的镜电流侧（602）。底部晶体管（T1new，T3new）的栅极（65,65'）被连接到RC侧（601）的串联耦合的底部（T1new）和顶部（T2new）晶体管之间的公共节点（21）并且顶部晶体管（T2new，T4new）的栅极（66'，66'）耦合在一起并连接到RC侧（601）的顶部漏极节点（64）。 CCM（74）的面积可以基本上缩小，而不会对匹配，噪声性能和最大允许工作电压产生不利影响。

4. 发明授权

US07851834B2 Cascode current mirror and method 有权
标题翻译： Cascode电流镜和方法
公开(公告)号：US07851834B2
公开(公告)日：2010-12-14
申请号：US12715941
申请日：2010-03-02
申请人： Hongning Yang , Geoffrey W. Perkins , Jiang-Kai Zuo
发明人： Hongning Yang , Geoffrey W. Perkins , Jiang-Kai Zuo
IPC分类号： H01L29/94
CPC分类号： H01L29/7833 , H01L21/823425 , H01L21/823456 , H01L21/823462 , H01L27/088 , H01L29/6659 , Y10S438/981
摘要： Embodiments of a cascode amplifier (CA) include a bottom transistor with a relatively thin gate dielectric and higher ratio of channel length to width and a series coupled top transistor with a relatively thick gate dielectric and a lower ratio of channel length to width. A cascode current mirror (CCM) is formed using a coupled pair of CAs, one forming the reference current (RC) side and the other forming the mirror current side of the CCM. The gates of the bottom transistors are tied together and to the common node between the series coupled bottom and top transistors of the RC side, and the gates of the top transistors are coupled together and to the top drain node of the RC side. The area of the CCM can be substantially shrunk without adverse affect on the matching, noise performance and maximum allowable operating voltage.
摘要翻译：共源共栅放大器（CA）的实施例包括具有相对薄的栅极介质和沟道长度与宽度的较高比的底部晶体管和具有相对较厚的栅极电介质和沟道长度与宽度的较小比的串联耦合顶部晶体管。使用耦合的一对CA形成共源共栅电流镜（CCM），一对形成基准电流（RC）侧，另一个形成CCM的反射镜电流侧。底部晶体管的栅极连接在RC侧的串联耦合的底部和顶部晶体管之间的公共节点，并且顶部晶体管的栅极耦合在一起并连接到RC侧的顶部漏极节点。 CCM的面积可以大幅收缩，对匹配，噪声性能和最大允许工作电压没有不利影响。

5. 发明授权

US08329514B2 Methods for forming antifuses with curved breakdown regions 有权
标题翻译：用弯曲击穿区形成反熔丝的方法
公开(公告)号：US08329514B2
公开(公告)日：2012-12-11
申请号：US13221695
申请日：2011-08-30
申请人： Won Gi Min , Geoffrey W. Perkins , Kyle D. Zukowski , Jiang-Kai Zuo
发明人： Won Gi Min , Geoffrey W. Perkins , Kyle D. Zukowski , Jiang-Kai Zuo
IPC分类号： H01L21/82
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： Methods are disclosed for forming an antifuse that includes first and second conductive regions having spaced-apart curved portions, with a first dielectric region therebetween, forming in combination with the curved portions a curved breakdown region adapted to switch from a substantially non-conductive initial state to a substantially conductive final state in response to a predetermined programming voltage. A sense voltage less than the programming voltage is used to determine the state of the antifuse as either OFF (high impedance) or ON (low impedance). A shallow trench isolation (STI) region is desirably provided adjacent the breakdown region to inhibit heat loss from the breakdown region during programming. Lower programming voltages and currents are observed compared to antifuses using substantially planar dielectric regions. In a further embodiment, a resistive region is inserted in one lead of the antifuse with either planar or curved breakdown regions to improve post-programming sense reliability.
摘要翻译：公开了用于形成反熔丝的方法，其包括具有间隔开的弯曲部分的第一和第二导电区域，其间具有第一介电区域，与弯曲部分组合形成适于从基本不导电的初始状态切换的弯曲击穿区域响应于预定的编程电压而达到基本上导通的最终状态。使用小于编程电压的感测电压来确定反熔丝的状态为OFF（高阻抗）或ON（低阻抗）。希望在击穿区域附近设置浅沟槽隔离（STI）区域，以在编程期间抑制击穿区域的热损失。与使用基本平坦的电介质区域的反熔丝相比，观察到较低的编程电压和电流。在另一个实施例中，电阻区域被插入到具有平面或弯曲击穿区域的反熔丝的一个引线中，以改善后编程感测可靠性。

6. 发明申请

US20110312175A1 METHODS FOR FORMING ANTIFUSES WITH CURVED BREAKDOWN REGIONS 有权
标题翻译：用弯曲断裂区形成抗体的方法
公开(公告)号：US20110312175A1
公开(公告)日：2011-12-22
申请号：US13221695
申请日：2011-08-30
申请人： Won Gi Min , Geoffrey W. Perkins , Kyle D. Zukowski , Jiang-Kai Zuo
发明人： Won Gi Min , Geoffrey W. Perkins , Kyle D. Zukowski , Jiang-Kai Zuo
IPC分类号： H01L21/768
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： Methods are disclosed for forming an antifuse that includes first and second conductive regions having spaced-apart curved portions, with a first dielectric region therebetween, forming in combination with the curved portions a curved breakdown region adapted to switch from a substantially non-conductive initial state to a substantially conductive final state in response to a predetermined programming voltage. A sense voltage less than the programming voltage is used to determine the state of the antifuse as either OFF (high impedance) or ON (low impedance). A shallow trench isolation (STI) region is desirably provided adjacent the breakdown region to inhibit heat loss from the breakdown region during programming. Lower programming voltages and currents are observed compared to antifuses using substantially planar dielectric regions. In a further embodiment, a resistive region is inserted in one lead of the antifuse with either planar or curved breakdown regions to improve post-programming sense reliability.
摘要翻译：公开了用于形成反熔丝的方法，其包括具有间隔开的弯曲部分的第一和第二导电区域，其间具有第一介电区域，与弯曲部分组合形成适于从基本不导电的初始状态切换的弯曲击穿区域响应于预定的编程电压而达到基本上导通的最终状态。使用小于编程电压的感测电压来确定反熔丝的状态为OFF（高阻抗）或ON（低阻抗）。希望在击穿区域附近设置浅沟槽隔离（STI）区域，以在编程期间抑制击穿区域的热损失。与使用基本平坦的电介质区域的反熔丝相比，观察到较低的编程电压和电流。在另一个实施例中，电阻区域被插入到具有平面或弯曲击穿区域的反熔丝的一个引线中，以改善后编程感测可靠性。

7. 发明申请

US20100213570A1 ANTIFUSE 有权
标题翻译：抗生素
公开(公告)号：US20100213570A1
公开(公告)日：2010-08-26
申请号：US12392641
申请日：2009-02-25
申请人： Won Gi Min , Geoffrey W. Perkins , Kyle D. Zukowski , Jiang-Kai Zuo
发明人： Won Gi Min , Geoffrey W. Perkins , Kyle D. Zukowski , Jiang-Kai Zuo
IPC分类号： H01L23/525 , H01L21/768
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： An antifuse (40, 80, 90′) comprises, first (22′, 24′) and second (26′) conductive regions having spaced-apart curved portions (55, 56), with a first dielectric region (44) therebetween, forming in combination with the curved portions (55, 56) a curved breakdown region (47) adapted to switch from a substantially non-conductive initial state to a substantially conductive final state in response to a predetermined programming voltage. A sense voltage less than the programming voltage is used to determine the state of the antifuse as either OFF (high impedance) or ON (low impedance). A shallow trench isolation (STI) region (42) is desirably provided adjacent the breakdown region (47) to inhibit heat loss from the breakdown region (47) during programming. Lower programming voltages and currents are observed compared to antifuses (30) using substantially planar dielectric regions (32). In a further embodiment, a resistive region (922) is inserted in one lead (92, 92′) of the antifuses (90, 90′) with either planar (37) or curved (47) breakdown regions to improve post-programming sense reliability.
摘要翻译：反熔丝（40,80,90'）包括具有间隔开的弯曲部分（55,56）的第一（22'，24'）和第二（26'）导电区域，其间具有第一介电区域（44）与所述弯曲部分（55,56）组合形成弯曲击穿区域（47），所述弯曲击穿区域（47）响应于预定编程电压而适于从基本上不导电的初始状态切换到基本上导通的最终状态。使用小于编程电压的感测电压来确定反熔丝的状态为OFF（高阻抗）或ON（低阻抗）。希望在击穿区域（47）附近提供浅沟槽隔离（STI）区域（42），以在编程期间抑制来自击穿区域（47）的热损失。与使用基本平坦的电介质区域（32）的反熔丝（30）相比，观察到较低的编程电压和电流。在另一个实施例中，电阻区域（922）被插入到具有平面（37）或弯曲（47）击穿区域的反熔丝（90,90'）的一个引线（92,92'）中，以改善后编程感可靠性。

8. 发明授权

US08049299B2 Antifuses with curved breakdown regions 有权
标题翻译：具有弯曲破裂区域的防潮
公开(公告)号：US08049299B2
公开(公告)日：2011-11-01
申请号：US12392641
申请日：2009-02-25
申请人： Won Gi Min , Geoffrey W. Perkins , Kyle D. Zukowski , Jiang-Kai Zuo
发明人： Won Gi Min , Geoffrey W. Perkins , Kyle D. Zukowski , Jiang-Kai Zuo
IPC分类号： H01L29/04 , H01L29/10 , H01L31/036 , H01L31/0376 , H01L31/20 , H01L29/00
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： An antifuse (40, 80, 90′) comprises, first (22′, 24′) and second (26′) conductive regions having spaced-apart curved portions (55, 56), with a first dielectric region (44) therebetween, forming in combination with the curved portions (55, 56) a curved breakdown region (47) adapted to switch from a substantially non-conductive initial state to a substantially conductive final state in response to a predetermined programming voltage. A sense voltage less than the programming voltage is used to determine the state of the antifuse as either OFF (high impedance) or ON (low impedance). A shallow trench isolation (STI) region (42) is desirably provided adjacent the breakdown region (47) to inhibit heat loss from the breakdown region (47) during programming. Lower programming voltages and currents are observed compared to antifuses (30) using substantially planar dielectric regions (32). In a further embodiment, a resistive region (922) is inserted in one lead (92, 92′) of the antifuses (90, 90′) with either planar (37) or curved (47) breakdown regions to improve post-programming sense reliability.
摘要翻译：反熔丝（40,80,90'）包括具有间隔开的弯曲部分（55,56）的第一（22'，24'）和第二（26'）导电区域，其间具有第一介电区域（44）与所述弯曲部分（55,56）组合形成弯曲击穿区域（47），所述弯曲击穿区域（47）响应于预定编程电压而适于从基本上不导电的初始状态切换到基本上导通的最终状态。使用小于编程电压的感测电压来确定反熔丝的状态为OFF（高阻抗）或ON（低阻抗）。希望在击穿区域（47）附近提供浅沟槽隔离（STI）区域（42），以在编程期间抑制来自击穿区域（47）的热损失。与使用基本平坦的电介质区域（32）的反熔丝（30）相比，观察到较低的编程电压和电流。在另一个实施例中，电阻区域（922）被插入到具有平面（37）或弯曲（47）击穿区域的反熔丝（90,90'）的一个引线（92,92'）中，以改善后编程感可靠性。

9. 发明授权

US09666671B2 Semiconductor device with composite drift region and related fabrication method 有权
公开(公告)号：US09666671B2
公开(公告)日：2017-05-30
申请号：US14279991
申请日：2014-05-16
申请人： Zhihong Zhang , Hongning Yang , Jiang-Kai Zuo
发明人： Zhihong Zhang , Hongning Yang , Jiang-Kai Zuo
IPC分类号： H01L29/10 , H01L29/78 , H01L29/66 , H01L29/36 , H01L29/06 , H01L29/08 , H01L21/265
CPC分类号： H01L29/1045 , H01L21/26513 , H01L21/2652 , H01L29/0653 , H01L29/0847 , H01L29/36 , H01L29/66659 , H01L29/66681 , H01L29/7816 , H01L29/7835
摘要： A device includes a semiconductor substrate, a body region in the semiconductor substrate having a first conductivity type and in which a channel is formed during operation, source and drain regions in the semiconductor substrate and having a second conductivity type, the source region being disposed on the body region, and a composite drift region in the semiconductor substrate, having the second conductivity type, and through which charge carriers from the source region drift to reach the drain region after passing through the channel. The composite drift region includes a first section adjacent the channel, a second section adjacent the drain region, and a third section disposed between the first and second sections. The first and second sections have a lower effective dopant concentration level than the third section.

10. 发明授权

US09496333B2 Resurf high voltage diode 有权
公开(公告)号：US09496333B2
公开(公告)日：2016-11-15
申请号：US14622068
申请日：2015-02-13
申请人： Xin Lin , Daniel J. Blomberg , Hongning Yang , Jiang-Kai Zuo
发明人： Xin Lin , Daniel J. Blomberg , Hongning Yang , Jiang-Kai Zuo
IPC分类号： H01L29/66 , H01L29/06 , H01L29/739 , H01L29/861
CPC分类号： H01L29/063 , H01L29/0649 , H01L29/0692 , H01L29/66356 , H01L29/7391 , H01L29/861
摘要： A trench-isolated RESURF diode structure (100) is provided which includes a substrate (150) in which is formed anode (130, 132) and cathode (131) contact regions separated from one another by a shallow trench isolation region (114, 115), along with a buried cathode extension region (104) formed under a RESURF anode extension region (106, 107) such that the cathode extension region (104) extends beyond the cathode contact (131) to be sandwiched between upper and lower regions (103, 106, 107) of opposite conductivity type.

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