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1. 发明申请

US20050146230A1 Power supply voltage switch circuit 有权
标题翻译：电源电压开关电路
公开(公告)号：US20050146230A1
公开(公告)日：2005-07-07
申请号：US10707647
申请日：2003-12-30
申请人： Hong-Ping Tsai , Yu-Ming Hsu
发明人： Hong-Ping Tsai , Yu-Ming Hsu
IPC分类号： H02B1/24 , H02J1/08
CPC分类号： H02J1/08 , H02J2001/008 , Y10T307/858
摘要： A power supply voltage switch circuit for selecting a power supply voltage of an integrated circuit according to a first control signal. The power supply voltage switch circuit contains a high voltage selecting module for generating an output voltage according to the higher of a first and a second voltages; a level shifting module electrically connected to the high voltage selecting module to receive the output voltage as power supply, for performing level shifting to a first control signal according to the output voltage; and a selecting switch module electrically connected to the level shifting module for selectively outputting the first or the second voltage as the power supply voltage of the integrated circuit according to the level-shifted first control signal.
摘要翻译：一种用于根据第一控制信号选择集成电路的电源电压的电源电压开关电路。电源电压开关电路包括用于根据第一和第二电压中较高者产生输出电压的高电压选择模块; 电平移动模块，电连接到所述高电压选择模块以接收所述输出电压作为电源，用于根据所述输出电压进行到第一控制信号的电平转换; 以及选择开关模块，电连接到电平移位模块，用于根据电平移位的第一控制信号选择性地输出第一或第二电压作为集成电路的电源电压。

2. 发明授权

US07215043B2 Power supply voltage switch circuit 有权
标题翻译：电源电压开关电路
公开(公告)号：US07215043B2
公开(公告)日：2007-05-08
申请号：US10707647
申请日：2003-12-30
申请人： Hong-Ping Tsai , Yu-Ming Hsu
发明人： Hong-Ping Tsai , Yu-Ming Hsu
IPC分类号： H03K17/00 , H02J1/00 , H01H67/00 , H01H63/00
CPC分类号： H02J1/08 , H02J2001/008 , Y10T307/858
摘要： A power supply voltage switch circuit for selecting a power supply voltage of an integrated circuit according to a first control signal. The power supply voltage switch circuit contains a high voltage selecting module for generating an output voltage according to the higher of a first and a second voltages; a level shifting module electrically connected to the high voltage selecting module to receive the output voltage as power supply, for performing level shifting to a first control signal according to the output voltage; and a selecting switch module electrically connected to the level shifting module for selectively outputting the first or the second voltage as the power supply voltage of the integrated circuit according to the level-shifted first control signal.
摘要翻译：一种用于根据第一控制信号选择集成电路的电源电压的电源电压开关电路。电源电压开关电路包括用于根据第一和第二电压中较高者产生输出电压的高电压选择模块; 电平移动模块，电连接到所述高电压选择模块以接收所述输出电压作为电源，用于根据所述输出电压进行到第一控制信号的电平转换; 以及选择开关模块，电连接到电平移位模块，用于根据电平移位的第一控制信号选择性地输出第一或第二电压作为集成电路的电源电压。

3. 发明授权

US06850442B2 Flash memory with sensing amplifier using load transistors driven by coupled gate voltages 有权
标题翻译：带有感应放大器的闪存，使用由耦合栅极电压驱动的负载晶体管
公开(公告)号：US06850442B2
公开(公告)日：2005-02-01
申请号：US10248112
申请日：2002-12-19
申请人： Hong-Ping Tsai , Yu-Ming Hsu
发明人： Hong-Ping Tsai , Yu-Ming Hsu
IPC分类号： G11C16/06 , G11C16/04 , G11C16/28
CPC分类号： G11C16/28
摘要： A memory including a plurality of memory cells, a sensing load, a reference load, a control circuit and a comparator. Each of the memory cells can store a bit data and provide a driving current according to the bit data. The sensing load is driven by the driving current and a driving voltage to generate a sensing voltage, and the reference load is driven by the driving voltage to generate a reference voltage. The control circuit can control the driving voltage to drive the sensing load or the reference load such that the sensing voltage or the reference voltage is kept constant while the driving current changes. The comparator is for comparing the sensing voltage with the reference voltage and therefore determining the bit data stored in the memory cell that provides the driving current.
摘要翻译：包括多个存储单元，感测负载，参考负载，控制电路和比较器的存储器。每个存储器单元可以存储位数据并根据位数据提供驱动电流。感测负载由驱动电流和驱动电压驱动以产生感测电压，并且参考负载由驱动电压驱动以产生参考电压。控制电路可以控制驱动电压以驱动感测负载或参考负载，使得感测电压或参考电压在驱动电流变化时保持恒定。比较器用于将感测电压与参考电压进行比较，因此确定存储在提供驱动电流的存储单元中的位数据。

4. 发明申请

US20090072796A1 USB Charger Circuit 有权
标题翻译： USB充电器电路
公开(公告)号：US20090072796A1
公开(公告)日：2009-03-19
申请号：US12058728
申请日：2008-03-30
申请人： Shih-Yuan WANG , Yung-Hsin Chiang , Yu-Ming Hsu
发明人： Shih-Yuan WANG , Yung-Hsin Chiang , Yu-Ming Hsu
IPC分类号： H02J7/06
CPC分类号： H02M3/155 , H02J7/0052 , H02J2007/0059
摘要： A USB charger circuit includes at least a converter, a control circuitry, a first resistor, a second resistor, an error amplifier, a sense resistor and a diode. The converter has a transistor. The control circuitry is coupled to the transistor. The control circuitry is used for producing a drive signal to the transistor. The first resistor is connected between the output node of the converter and a first node. The second resistor is connected between the first node and a second node. The error amplifier is coupled to receive a voltage divided by the first resistor and the second resistor to compare to a reference voltage. The sense resistor is connected between the second node and ground. The diode is connected between the output node of the converter and a first node.
摘要翻译： USB充电器电路至少包括转换器，控制电路，第一电阻器，第二电阻器，误差放大器，检测电阻器和二极管。该转换器有一个晶体管。控制电路耦合到晶体管。控制电路用于产生到晶体管的驱动信号。第一个电阻连接在转换器的输出节点和第一个节点之间。第二电阻器连接在第一节点和第二节点之间。误差放大器被耦合以接收由第一电阻器和第二电阻器分压的电压以与参考电压进行比较。感测电阻连接在第二节点和地之间。二极管连接在转换器的输出节点和第一个节点之间。

5. 外观设计

USD541278S1 Display device capable of receiving an electronic device 有权
标题翻译：能够接收电子装置的显示装置
公开(公告)号：USD541278S1
公开(公告)日：2007-04-24
申请号：US29246075
申请日：2006-01-23
申请人： Yu-Ming Hsu , Chien-Jui Wang , Chia-Chuan Lin
设计人： Yu-Ming Hsu , Chien-Jui Wang , Chia-Chuan Lin

6. 发明授权

US06580658B1 Method using a word line driver for driving a word line 失效
标题翻译：使用字线驱动程序来驱动字线的方法
公开(公告)号：US06580658B1
公开(公告)日：2003-06-17
申请号：US10065661
申请日：2002-11-07
申请人： Yu-Ming Hsu , Yen-Tai Lin , Chien-Hung Ho
发明人： Yu-Ming Hsu , Yen-Tai Lin , Chien-Hung Ho
IPC分类号： G11C800
CPC分类号： G11C8/08 , G11C16/08
摘要： A word line driver includes an address decoder having a first circuit and a second circuit for selecting the word line, and a control end disposed between the first circuit and the second circuit. In addition, the word line driver has a level shift circuit for shifting a voltage level of the word line, and the level shift circuit has an input end connected to the second circuit of the address decoder. A method of driving a word line includes shifting a voltage level of the control end while turning on the second circuit so as to shift a voltage level of the input end of the level shift circuit, and shifting a voltage level of at least one of the first and second power supplies and using the second circuit to isolate the voltage level of the control end from the voltage level of the word line.
摘要翻译：字线驱动器包括具有第一电路的地址解码器和用于选择字线的第二电路，以及设置在第一电路和第二电路之间的控制端。此外，字线驱动器具有用于移位字线的电压电平的电平移位电路，并且电平移位电路具有连接到地址解码器的第二电路的输入端。一种驱动字线的方法包括：在接通第二电路的同时移动控制端的电压电平，以便移位电平移位电路的输入端的电压电平，并移位至少一个第一和第二电源，并使用第二电路将控制端的电压电平与字线的电压电平隔离开。

7. 发明授权

US6147910A Parallel read and verify for floating gate memory device 有权
标题翻译：并行读取和验证浮动栅极存储器件
公开(公告)号：US6147910A
公开(公告)日：2000-11-14
申请号：US386766
申请日：1999-08-31
申请人： Yu-Ming Hsu , Yin-Shang Liu , Chun-Hsiung Hung , Ray-Lin Wan , Y. T. Lin
发明人： Yu-Ming Hsu , Yin-Shang Liu , Chun-Hsiung Hung , Ray-Lin Wan , Y. T. Lin
IPC分类号： G11C11/56 , G11C16/10 , G11C16/34 , G11C16/06
CPC分类号： G11C16/3459 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/10 , G11C16/3454 , G11C2211/5621 , G11C2211/5624 , G11C2211/5642 , G11C7/1048
摘要： A page mode flash memory or floating gate memory device, including a page buffer based upon low current bit latches, and additional capabilities for parallel read and parallel program verify operations. The present device includes bit latch circuitry and/or method steps that facilitate such parallel operations and avoid data conflicts. Circuitry for separate read signals can serve to isolate the operations. Additionally, circuitry tied to the data verification signal can also be used. A diode type device can be used to isolate signal conditions that might indicate the cell does not need to be programmed. Bit-by-bit precharging of the bit lines can also be employed in order to save precharging power. Additionally, the large capacitance of the dataline might be used to delay discharging a particular dataline, and thereby allow a latch enabling signal to go high, thus eliminating the need for further isolation circuitry, or the like.
摘要翻译：页面模式闪速存储器或浮动栅极存储器件，包括基于低电流位锁存器的页面缓冲器，以及用于并行读取和并行程序验证操作的附加功能。本装置包括有利于这种并行操作并避免数据冲突的位锁存电路和/或方法步骤。用于单独读取信号的电路可用于隔离操作。此外，还可以使用与数据验证信号相关的电路。可以使用二极管类型的器件来隔离可能指示电池不需要编程的信号条件。为了节省预充电功率，也可以采用位线的逐位预充电。此外，数据线的大电容可能用于延迟放电特定数据线，从而允许锁存使能信号变高，从而不需要进一步的隔离电路等。

8. 发明授权

US08716499B2 Benzenoid compounds of antrodia cinnamomea, preparation and analysis method thereof 有权
标题翻译：桂皮酚的苯并噻吩类化合物，其制备及分析方法
公开(公告)号：US08716499B2
公开(公告)日：2014-05-06
申请号：US13346300
申请日：2012-01-09
申请人： Yang-Chang Wu , Fang-Rong Chang , Mei-Chin Lu , Ying-Chi Du , Tung-Ying Wu , Yu-Ming Hsu
发明人： Yang-Chang Wu , Fang-Rong Chang , Mei-Chin Lu , Ying-Chi Du , Tung-Ying Wu , Yu-Ming Hsu
IPC分类号： C07D317/48
CPC分类号： C07D317/64 , C07C41/38 , G01N2030/8813 , C07C43/215
摘要： Disclosed are a method for preparing an n-hexane extract of the fruiting body of Antrodia cinnamomea (AC), wherein the fruiting body of AC is sequentially extracted with the ethanol solution and the n-hexane solution to obtain the n-hexane extract containing at least one benzenoid compound. The amounts of 4,7-dimethoxy-5-(3-methylbut-3-en-1-ynyl)-6-methyl-1,3-benzodioxole, 4,7-dimethoxy-5-methyl-1,3-benzodioxole, antrocamphine A and the combination thereof in the at least one benzenoid compound are determined using chromatography, NMR and HPLC. In addition, the present invention is applicable on detecting the amounts of benzenoid compounds in the AC healthcare food/drug or the fruiting body of AC, and thus owns the industrial values.
摘要翻译：本发明提供了一种用于制备仙人掌（AC）子实体的正己烷提取物的方法，其中AC的子实体依次用乙醇溶液和正己烷溶液萃取，得到含有至少一种苯类化合物。 4,7-二甲氧基-5-（3-甲基丁-3-烯-1-炔基）-6-甲基-1,3-苯并间二氧杂环戊烯，4,7-二甲氧基-5-甲基-1,3-苯并间二氧杂环戊烯，抗阿奇霉素A及其在至少一种苯类化合物中的组合使用色谱法，NMR和HPLC测定。此外，本发明可应用于检测AC保健食品/药物或AC的子实体中的苯类化合物的量，因此具有工业价值。

9. 发明授权

US08072186B2 USB charger circuit 有权
标题翻译： USB充电器电路
公开(公告)号：US08072186B2
公开(公告)日：2011-12-06
申请号：US12058728
申请日：2008-03-30
申请人： Shih-Yuan Wang , Yung-Hsin Chiang , Yu-Ming Hsu
发明人： Shih-Yuan Wang , Yung-Hsin Chiang , Yu-Ming Hsu
IPC分类号： H02J7/04
CPC分类号： H02M3/155 , H02J7/0052 , H02J2007/0059
摘要： A USB charger circuit includes at least a converter, a control circuitry, a first resistor, a second resistor, an error amplifier, a sense resistor and a diode. The converter has a transistor. The control circuitry is coupled to the transistor. The control circuitry is used for producing a drive signal to the transistor. The first resistor is connected between the output node of the converter and a first node. The second resistor is connected between the first node and a second node. The error amplifier is coupled to receive a voltage divided by the first resistor and the second resistor to compare to a reference voltage. The sense resistor is connected between the second node and ground. The diode is connected between the output node of the converter and a first node.
摘要翻译： USB充电器电路至少包括转换器，控制电路，第一电阻器，第二电阻器，误差放大器，检测电阻器和二极管。该转换器有一个晶体管。控制电路耦合到晶体管。控制电路用于产生到晶体管的驱动信号。第一个电阻连接在转换器的输出节点和第一个节点之间。第二电阻器连接在第一节点和第二节点之间。误差放大器被耦合以接收由第一电阻器和第二电阻器分压的电压以与参考电压进行比较。感测电阻连接在第二节点和地之间。二极管连接在转换器的输出节点和第一个节点之间。

10. 发明授权

US07091623B2 Multi-chip semiconductor package and fabrication method thereof 有权
标题翻译：多芯片半导体封装及其制造方法
公开(公告)号：US07091623B2
公开(公告)日：2006-08-15
申请号：US10980671
申请日：2004-11-02
申请人： Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
发明人： Shiann-Tsong Tsai , Yu-Ming Hsu , Wen-Lung Wu , Kuen-Huang Chen , Wen-Sheng Su , Chin-Hsing Lin
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H01L25/50 , H01L24/97 , H01L25/0657 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2225/0651 , H01L2225/06555 , H01L2225/06562 , H01L2225/06575 , H01L2225/06582 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/351 , H01L2924/00014 , H01L2224/83 , H01L2224/85 , H01L2924/00
摘要： A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated package products.
摘要翻译：提供一种多芯片半导体封装及其制造方法。制备具有上表面和下表面的基材。至少第一芯片安装在基板的上表面上。在第一芯片和基板的上表面上的预定区域上施加非导电材料。至少第二芯片安装在非导电材料上，并形成有至少一个与第一芯片无干涉位置的悬挂部分，其中非导电材料的尺寸设计在至少对应于第二芯片的表面积以使悬挂部分能够支撑在非导电材料上。通过将第二芯片完全支撑在非导电材料上，而不会导致常规的芯片裂纹问题，可以有效地确保制造的封装产品的结构完整性和可靠性。

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