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1. 发明申请

US20090091995A1 SENSE AMPLIFIER CIRCUIT HAVING CURRENT MIRROR ARCHITECTURE 有权
标题翻译：具有电流镜面结构的感应放大器电路
公开(公告)号：US20090091995A1
公开(公告)日：2009-04-09
申请号：US11868965
申请日：2007-10-09
申请人： Hong-Ping Tsai , Ching-Yuan Lin
发明人： Hong-Ping Tsai , Ching-Yuan Lin
IPC分类号： G11C7/06
CPC分类号： G11C7/065
摘要： A sense amplifier circuit for use in a semiconductor memory device has complemented logic states at opposite sides of the latch circuit in the sense amplifier circuit determinate all the time in operation. The sense amplifier circuit takes advantage of a current mirror circuit for ascending or descending a voltage level at the gate of a transistor by charge accumulation or charge dissipation, which turns on or off the transistor so as to control the logic states at opposite sides of the latch circuit in the sense amplifier circuit.
摘要翻译：在半导体存储器件中使用的读出放大器电路在读出放大器电路中的锁存电路的相对侧具有互补的逻辑状态，以确定操作中的所有时间。读出放大器电路利用电流镜电路来通过电荷累积或电荷耗散来升高或降低晶体管栅极处的电压电平，其导通或关断晶体管，以便控制晶体管的相对侧的逻辑状态读出放大器电路中的锁存电路。

2. 发明申请

US20070035181A1 Voltage selective circuit of power source 有权
标题翻译：电源电压选择电路
公开(公告)号：US20070035181A1
公开(公告)日：2007-02-15
申请号：US11202894
申请日：2005-08-12
申请人： Wei-Ming Ku , Hong-Ping Tsai
发明人： Wei-Ming Ku , Hong-Ping Tsai
IPC分类号： H01H47/00
CPC分类号： G11C16/30 , Y10T307/747
摘要： A voltage selective circuit of a power source having a first voltage and a second voltage of the present invention includes a selective switch module, a high voltage bias module, a level shift module and a high voltage selective module. The selective switch module includes two first transistors. A power supply is selected from either the first voltage or the second voltage to output to integrated circuits. The high voltage bias module selects a higher voltage from the power supply and the power source of the first/second voltage to output to wells of the two first transistors. The level shift module includes two level shifters. The high voltage selective module selects a higher voltage from the first voltage and the second voltage as internal power to supply to the level shift module.
摘要翻译：具有本发明的第一电压和第二电压的电源的电压选择电路包括选择开关模块，高压偏置模块，电平移位模块和高电压选择模块。选择开关模块包括两个第一晶体管。从第一电压或第二电压中选择电源以输出到集成电路。高压偏置模块从电源和第一/第二电压的电源选择较高的电压以输出到两个第一晶体管的阱。电平移位模块包括两个电平移位器。高电压选择模块从第一电压和第二电压中选择较高的电压作为内部电源供给电平移位模块。

3. 发明申请

US20060018161A1 SINGLE POLY NON-VOLATILE MEMORY 有权
标题翻译：单波非易失性存储器
公开(公告)号：US20060018161A1
公开(公告)日：2006-01-26
申请号：US10905736
申请日：2005-01-19
申请人： Hsin-Ming Chen , Shih-Chen Wang , Hong-Ping Tsai
发明人： Hsin-Ming Chen , Shih-Chen Wang , Hong-Ping Tsai
IPC分类号： G11C16/04
CPC分类号： G11C16/0441 , H01L27/115
摘要： An erasable programmable non-volatile memory cell encompasses an ion well; a first select transistor including a select gate, source/drain formed in the ion well, and a channel region formed between its source and drain; a first floating gate transistor having a drain, a source coupled to the drain of the first select transistor, a first floating gate channel region formed between its drain and source, and a common floating gate overlying the floating gate channel region; a second select transistor including a select gate, source/drain formed in the ion well, and a channel region formed between its source and drain; and a second floating gate transistor having a drain, a source coupled to the drain of the second select transistor, a second floating gate channel region formed between its drain and source, and the common floating gate overlying the second floating gate channel region.
摘要翻译：可擦除可编程非易失性存储单元包含离子阱; 包括选择栅极的第一选择晶体管，形成在所述离子阱中的源极/漏极以及在其源极和漏极之间形成的沟道区域; 具有漏极的第一浮栅晶体管，耦合到所述第一选择晶体管的漏极的源极，形成在其漏源和源极之间的第一浮置栅极沟道区和覆盖所述浮置栅极沟道区的公共浮动栅; 包括选择栅极的第二选择晶体管，形成在离子阱中的源极/漏极，以及在其源极和漏极之间形成的沟道区域; 以及第二浮栅晶体管，其具有漏极，耦合到所述第二选择晶体管的漏极的源极，形成在其漏极和源极之间的第二浮置栅极沟道区域以及覆盖所述第二浮置栅极沟道区域的所述公共浮动栅极。

4. 发明授权

US07663928B2 Sense amplifier circuit having current mirror architecture 有权
标题翻译：具有电流镜架构的感应放大器电路
公开(公告)号：US07663928B2
公开(公告)日：2010-02-16
申请号：US11868965
申请日：2007-10-09
申请人： Hong-Ping Tsai , Ching-Yuan Lin
发明人： Hong-Ping Tsai , Ching-Yuan Lin
IPC分类号： G11C11/34 , G11C16/06
CPC分类号： G11C7/065
摘要： A sense amplifier circuit for use in a semiconductor memory device has complemented logic states at opposite sides of the latch circuit in the sense amplifier circuit determinate all the time in operation. The sense amplifier circuit takes advantage of a current mirror circuit for ascending or descending a voltage level at the gate of a transistor by charge accumulation or charge dissipation, which turns on or off the transistor so as to control the logic states at opposite sides of the latch circuit in the sense amplifier circuit.
摘要翻译：在半导体存储器件中使用的读出放大器电路在读出放大器电路中的锁存电路的相对侧具有互补的逻辑状态，以确定操作中的所有时间。读出放大器电路利用电流镜电路来通过电荷累积或电荷耗散来升高或降低晶体管栅极处的电压电平，其导通或关断晶体管，以便控制晶体管的相对侧的逻辑状态读出放大器电路中的锁存电路。

5. 发明授权

US07288964B2 Voltage selective circuit of power source 有权
公开(公告)号：US07288964B2
公开(公告)日：2007-10-30
申请号：US11202894
申请日：2005-08-12
申请人： Wei-Ming Ku , Hong-Ping Tsai
发明人： Wei-Ming Ku , Hong-Ping Tsai
IPC分类号： H03K19/0175
CPC分类号： G11C16/30 , Y10T307/747
摘要： A voltage selective circuit of a power source having a first voltage and a second voltage of the present invention includes a selective switch module, a high voltage bias module, a level shift module and a high voltage selective module. The selective switch module includes two first transistors. A power supply is selected from either the first voltage or the second voltage to output to integrated circuits. The high voltage bias module selects a higher voltage from the power supply and the power source of the first/second voltage to output to wells of the two first transistors. The level shift module includes two level shifters. The high voltage selective module selects a higher voltage from the first voltage and the second voltage as internal power to supply to the level shift module.

6. 发明授权

US07218165B1 Boost circuit 有权
标题翻译：升压电路
公开(公告)号：US07218165B1
公开(公告)日：2007-05-15
申请号：US11306385
申请日：2005-12-27
申请人： Hong-Ping Tsai
发明人： Hong-Ping Tsai
IPC分类号： G05F1/10
CPC分类号： H02M3/07
摘要： A boost circuit comprising a first level shifter and a switch circuit is provided. The first level shifter outputs either an output voltage of the boost circuit or a first bias voltage according to a boost control signal. The switch circuit determines whether to transmit a second bias voltage to an output terminal of the boost circuit according to the output of the first level shifter. The present invention further comprises a capacitance equivalent circuit and a second level shifter. The capacitance equivalent circuit comprises a first terminal and a second terminal, and the first terminal is electrically coupled to the output terminal of the boost circuit. Similarly, the second level shifter outputs a third bias voltage or the first bias voltage to the second terminal of the capacitance equivalent circuit. In addition, the first bias voltage is smaller than the second bias voltage and the third bias voltage.
摘要翻译：提供了包括第一电平移位器和开关电路的升压电路。第一电平移位器根据升压控制信号输出升压电路的输出电压或第一偏置电压。开关电路根据第一电平移位器的输出，确定是否向升压电路的输出端子发送第二偏置电压。本发明还包括电容等效电路和第二电平移位器。电容等效电路包括第一端子和第二端子，并且第一端子电耦合到升压电路的输出端子。类似地，第二电平移位器将第三偏置电压或第一偏置电压输出到电容等效电路的第二端。此外，第一偏置电压小于第二偏置电压和第三偏置电压。

7. 发明申请

US20070117330A1 SENSING AMPLIFIER 有权
标题翻译：感应放大器
公开(公告)号：US20070117330A1
公开(公告)日：2007-05-24
申请号：US11164485
申请日：2005-11-24
申请人： Ching-Yuan Lin , Hong-Ping Tsai
发明人： Ching-Yuan Lin , Hong-Ping Tsai
IPC分类号： H01L21/336 , H01L29/94
CPC分类号： G11C7/065 , G11C7/02
摘要： A sensing amplifier comprising a program cell current sensing circuit, an erase cell current sensing circuit and a latch circuit is provided. Each of the program and erase cell current sensing circuits further comprises a plurality of program/erase memory cells, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor and a fourth PMOS transistor. Wherein, one of the drain/source of the first NMOS transistor is electrically coupled to both the program/erase memory cells and a gate of the third NMOS transistor to form a node. In addition, one of the drain/source of the third NMOS transistor is coupled to the latch circuit. Moreover, the program/erase memory cell provides a program/erase current to the first NMOS transistor. The latch circuit will be driven once the amount of the electric charges accumulated at the node caused by the program/erase current overcomes a threshold voltage of the third NMOS transistor.
摘要翻译：提供了包括编程单元电流检测电路，擦除单元电流检测电路和锁存电路的感测放大器。每个编程和擦除单元电流检测电路还包括多个编程/擦除存储器单元，第一NMOS晶体管，第二NMOS晶体管，第三NMOS晶体管和第四PMOS晶体管。其中，第一NMOS晶体管的漏极/源极之一电耦合到编程/擦除存储器单元和第三NMOS晶体管的栅极以形成节点。此外，第三NMOS晶体管的漏极/源极之一耦合到锁存电路。此外，编程/擦除存储单元向第一NMOS晶体管提供编程/擦除电流。一旦由编程/擦除电流引起的累积在节点处的电荷的量克服了第三NMOS晶体管的阈值电压，锁存电路将被驱动。

8. 发明授权

US07209392B2 Single poly non-volatile memory 有权
标题翻译：单个多重非易失性存储器
公开(公告)号：US07209392B2
公开(公告)日：2007-04-24
申请号：US10905736
申请日：2005-01-19
申请人： Hsin-Ming Chen , Shih-Chen Wang , Hong-Ping Tsai
发明人： Hsin-Ming Chen , Shih-Chen Wang , Hong-Ping Tsai
IPC分类号： G11C16/04
CPC分类号： G11C16/0441 , H01L27/115
摘要： An erasable programmable non-volatile memory cell encompasses an ion well; a first select transistor including a select gate, source/drain formed in the ion well, and a channel region formed between its source and drain; a first floating gate transistor having a drain, a source coupled to the drain of the first select transistor, a first floating gate channel region formed between its drain and source, and a common floating gate overlying the floating gate channel region; a second select transistor including a select gate, source/drain formed in the ion well, and a channel region formed between its source and drain; and a second floating gate transistor having a drain, a source coupled to the drain of the second select transistor, a second floating gate channel region formed between its drain and source, and the common floating gate overlying the second floating gate channel region.
摘要翻译：可擦除可编程非易失性存储单元包含离子阱; 包括选择栅极的第一选择晶体管，形成在所述离子阱中的源极/漏极以及在其源极和漏极之间形成的沟道区域; 具有漏极的第一浮栅晶体管，耦合到所述第一选择晶体管的漏极的源极，形成在其漏源和源极之间的第一浮置栅极沟道区和覆盖所述浮置栅极沟道区的公共浮动栅; 包括选择栅极的第二选择晶体管，形成在离子阱中的源极/漏极，以及在其源极和漏极之间形成的沟道区域; 以及第二浮栅晶体管，其具有漏极，耦合到所述第二选择晶体管的漏极的源极，形成在其漏极和源极之间的第二浮置栅极沟道区域以及覆盖所述第二浮置栅极沟道区域的所述公共浮动栅极。

9. 发明申请

US20050146230A1 Power supply voltage switch circuit 有权
标题翻译：电源电压开关电路
公开(公告)号：US20050146230A1
公开(公告)日：2005-07-07
申请号：US10707647
申请日：2003-12-30
申请人： Hong-Ping Tsai , Yu-Ming Hsu
发明人： Hong-Ping Tsai , Yu-Ming Hsu
IPC分类号： H02B1/24 , H02J1/08
CPC分类号： H02J1/08 , H02J2001/008 , Y10T307/858
摘要： A power supply voltage switch circuit for selecting a power supply voltage of an integrated circuit according to a first control signal. The power supply voltage switch circuit contains a high voltage selecting module for generating an output voltage according to the higher of a first and a second voltages; a level shifting module electrically connected to the high voltage selecting module to receive the output voltage as power supply, for performing level shifting to a first control signal according to the output voltage; and a selecting switch module electrically connected to the level shifting module for selectively outputting the first or the second voltage as the power supply voltage of the integrated circuit according to the level-shifted first control signal.
摘要翻译：一种用于根据第一控制信号选择集成电路的电源电压的电源电压开关电路。电源电压开关电路包括用于根据第一和第二电压中较高者产生输出电压的高电压选择模块; 电平移动模块，电连接到所述高电压选择模块以接收所述输出电压作为电源，用于根据所述输出电压进行到第一控制信号的电平转换; 以及选择开关模块，电连接到电平移位模块，用于根据电平移位的第一控制信号选择性地输出第一或第二电压作为集成电路的电源电压。

10. 发明授权

US06850442B2 Flash memory with sensing amplifier using load transistors driven by coupled gate voltages 有权
标题翻译：带有感应放大器的闪存，使用由耦合栅极电压驱动的负载晶体管
公开(公告)号：US06850442B2
公开(公告)日：2005-02-01
申请号：US10248112
申请日：2002-12-19
申请人： Hong-Ping Tsai , Yu-Ming Hsu
发明人： Hong-Ping Tsai , Yu-Ming Hsu
IPC分类号： G11C16/06 , G11C16/04 , G11C16/28
CPC分类号： G11C16/28
摘要： A memory including a plurality of memory cells, a sensing load, a reference load, a control circuit and a comparator. Each of the memory cells can store a bit data and provide a driving current according to the bit data. The sensing load is driven by the driving current and a driving voltage to generate a sensing voltage, and the reference load is driven by the driving voltage to generate a reference voltage. The control circuit can control the driving voltage to drive the sensing load or the reference load such that the sensing voltage or the reference voltage is kept constant while the driving current changes. The comparator is for comparing the sensing voltage with the reference voltage and therefore determining the bit data stored in the memory cell that provides the driving current.
摘要翻译：包括多个存储单元，感测负载，参考负载，控制电路和比较器的存储器。每个存储器单元可以存储位数据并根据位数据提供驱动电流。感测负载由驱动电流和驱动电压驱动以产生感测电压，并且参考负载由驱动电压驱动以产生参考电压。控制电路可以控制驱动电压以驱动感测负载或参考负载，使得感测电压或参考电压在驱动电流变化时保持恒定。比较器用于将感测电压与参考电压进行比较，因此确定存储在提供驱动电流的存储单元中的位数据。

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