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1. 发明授权

US06503825B1 Method for forming multi-layer wiring structure 失效
标题翻译：多层布线结构形成方法
公开(公告)号：US06503825B1
公开(公告)日：2003-01-07
申请号：US09024250
申请日：1998-02-17
申请人： Hiroyuki Iida , Kazuto Ohbuchi , Atsushi Matsushita , Yoshio Hagiwara
发明人： Hiroyuki Iida , Kazuto Ohbuchi , Atsushi Matsushita , Yoshio Hagiwara
IPC分类号： H01L214763
CPC分类号： H01L21/02126 , H01L21/02216 , H01L21/02282 , H01L21/31138 , H01L21/3122 , H01L21/316 , H01L21/76801 , H01L21/76802 , H01L21/76826 , H01L21/76832
摘要： For suppressing decomposition of organic group (for example, CH3 group) during ashing process, which is bonded to Si atom of an organic SOG film or layer for use in flattening process, a method comprises following steps: forming an organic SOG layer directly or through a predetermined film including a hillock protection layer on said lower wiring layer; forming said upper wiring layer on said organic SOG layer without processing of etching back; forming a via hole through an etching process by using a patterned resist layer provided on said upper wiring layer as a mask; performing ashing process with a plasma by making ion or radical which is induced from oxygen gas as a main reactant, under an atmosphere of pressure ranging from 0.01 Torr to 30.0 Torr; and burying said via hole with conductive material so as to electrically connect between said lower wiring layer and said upper wiring layer.
摘要翻译：为了抑制灰化过程中有机基团（例如CH 3基团）的分解，其结合到有机SOG膜或用于平坦化处理的层的Si原子上，所述方法包括以下步骤：直接或直接形成有机SOG层在所述下布线层上具有小丘保护层的预定膜; 在所述有机SOG层上形成所述上布线层，而不进行回蚀处理; 通过使用设置在所述上布线层上的图案化抗蚀剂层作为掩模，通过蚀刻工艺形成通孔; 在0.01Torr至30.0Torr的压力气氛中，通过使由氧气引起的离子或自由基作为主反应物，通过等离子体进行灰化处理; 并用导电材料掩埋所述通孔，以便在所述下布线层和所述上布线层之间电连接。

2. 发明授权

US06995096B2 Method for forming multi-layer wiring structure 失效
标题翻译：多层布线结构形成方法
公开(公告)号：US06995096B2
公开(公告)日：2006-02-07
申请号：US10782084
申请日：2004-02-19
申请人： Hiroyuki Iida , Kazuto Ohbuchi , Atsushi Matsushita , Yoshio Hagiwara
发明人： Hiroyuki Iida , Kazuto Ohbuchi , Atsushi Matsushita , Yoshio Hagiwara
IPC分类号： H01L21/31
CPC分类号： H01L21/02126 , H01L21/02216 , H01L21/02282 , H01L21/31138 , H01L21/3122 , H01L21/316 , H01L21/76801 , H01L21/76802 , H01L21/76826 , H01L21/76832
摘要： For suppressing decomposition of an organic group (for example, a CH3 group) which is bonded to an Si atom of an organic SOG film for use in a flattening process at the time of an ashing process, there is provided a method comprising the steps of: forming an organic SOG layer directly on a lower wiring layer or on a predetermined film including a hillock protection layer which is formed on the lower wiring layer in advance; forming an upper wiring layer on the organic SOG layer without using an etching back process; forming a via hole through an etching process by using a patterned resist layer provided on the upper wiring layer as a mask; performing an ashing process with a plasma by making ions or radicals which are induced from oxygen gas as a main reactant, under an atmospheric pressure ranging from 0.01 Torr to 30.0 Torr; and filling said via hole with a conductive material so as to electrically connect the lower wiring layer to the upper wiring layer.
摘要翻译：为了抑制与灰化处理时的平坦化处理中使用的有机SOG膜的Si原子结合的有机基团（例如CH 3 O 3基团）的分解，提供了一种方法，包括以下步骤：直接在下布线层上或在包括形成在下布线层上的小丘保护层的预定膜上形成有机SOG层; 在所述有机SOG层上形成上层布线层，而不使用蚀刻反应工艺; 通过使用设置在上布线层上的图案化抗蚀剂层作为掩模通过蚀刻工艺形成通孔; 在0.01Torr至30.0Torr的大气压下，通过使由氧气引起的离子或自由基作为主要反应物，通过等离子体进行灰化处理; 并用导电材料填充所述通孔，以将下布线层电连接到上布线层。

3. 发明授权

US06723633B2 Method for forming multi-layer wiring structure 失效
公开(公告)号：US06723633B2
公开(公告)日：2004-04-20
申请号：US10291456
申请日：2002-11-07
申请人： Hiroyuki Iida , Kazuto Ohbuchi , Atsushi Matsushita , Yoshio Hagiwara
发明人： Hiroyuki Iida , Kazuto Ohbuchi , Atsushi Matsushita , Yoshio Hagiwara
IPC分类号： H01L214763
CPC分类号： H01L21/02126 , H01L21/02216 , H01L21/02282 , H01L21/31138 , H01L21/3122 , H01L21/316 , H01L21/76801 , H01L21/76802 , H01L21/76826 , H01L21/76832
摘要： For suppressing decomposition of an organic group (for example, a CH3 group) which is bonded to an Si atom of an organic SOG film for use in a flattening process at the time of an ashing process, there is provided a method comprising the steps of: forming an organic SOG layer directly on a lower wiring layer or on a predetermined film including a hillock protection layer which is formed on the lower wiring layer in advance; forming an upper wiring layer on the organic SOG layer without using an etching back process; forming a via hole through an etching process by using a patterned resist layer provided on the upper wiring layer as a mask; performing an ashing process with a plasma by making ions or radicals which are induced from oxygen gas as a main reactant, under an atmospheric pressure ranging from 0.01 Torr to 30.0 Torr; and filling said via hole with a conductive material so as to electrically connect the lower wiring layer to the upper wiring layer.

4. 发明授权

US5846329A Plasma processing apparatus 失效
标题翻译：等离子体处理装置
公开(公告)号：US5846329A
公开(公告)日：1998-12-08
申请号：US805062
申请日：1997-02-24
申请人： Hisashi Hori , Kazuto Ohbuchi , Atsushi Matsushita , Kaoru Sakamoto
发明人： Hisashi Hori , Kazuto Ohbuchi , Atsushi Matsushita , Kaoru Sakamoto
IPC分类号： H01J37/32 , C23C16/00
CPC分类号： H01J37/321 , H01J37/32357 , H01J37/32541
摘要： A plasma processing apparatus has first and second electrodes disposed around a tubular chamber for generating a plasma. Each of the first and second electrodes comprises a plurality of web-shaped electrode segments spaced by a constant distant and disposed substantially halfway around the chamber. Each of the web-shaped electrode segments has opposite ends fastened to a pair of respective insulators disposed diametrically opposite to each other across the chamber. The web-shaped electrode segments of the first electrode are electrically connected to each other by a conductor on one of the insulators, and the web-shaped electrode segments of the second electrode are electrically connected to each other by a conductor on the other conductors. The first electrode is connected to a high-frequency power supply, and the second electrode is connected to ground.
摘要翻译：等离子体处理装置具有设置在管状室周围的用于产生等离子体的第一和第二电极。所述第一和第二电极中的每一个包括多个网状电极段，所述多个网状电极段以恒定的远离并且围绕所述腔室大致中途地设置。每个网状电极段具有固定在一对彼此绝缘体上的相对端，该绝缘体跨过腔室彼此径向相对设置。第一电极的网状电极段通过其中一个绝缘体上的导体彼此电连接，并且第二电极的网状电极段通过其它导体上的导体彼此电连接。第一电极连接到高频电源，第二电极连接到地。

5. 发明申请

US20050199586A1 Resist removal method and semiconductor device manufactured by using the same 审中-公开
标题翻译：抗蚀剂去除方法和使用其制造的半导体器件
公开(公告)号：US20050199586A1
公开(公告)日：2005-09-15
申请号：US11052911
申请日：2005-02-09
申请人： Atsushi Matsushita , Isao Matsumoto , Kazuaki Inukai , Hong Shin , Naofumi Ohashi , Shuji Sone , Kaori Misawa
发明人： Atsushi Matsushita , Isao Matsumoto , Kazuaki Inukai , Hong Shin , Naofumi Ohashi , Shuji Sone , Kaori Misawa
IPC分类号： H01L21/3065 , B44C1/22 , H01L21/311 , H01L21/3213
CPC分类号： H01L21/31138 , G03F7/427 , H01J37/32192 , H01J37/32357 , H01J37/32477 , H01J2237/3342
摘要： In resist removal using hydrogen gas, the specific dielectric constant of an insulating film of a low dielectric constant can be reduced and the resist removal speed can be increased. A wafer is loaded on a rotary table in a chamber, and hydrogen mixed gas is introduced into a discharge tube from a gas introduction port, and a μ wave is supplied into the discharge tube via a waveguide, and the mixed gas is excited by plasma, and a hydrogen active species is generated. And, a neutral radical (hydrogen radical) of hydrogen atoms or hydrogen molecules is introduced into the chamber from a gas transport pipe and a resist mask on the surface of the wafer is removed. Here, by a substrate heating system for heating the rotary table and controlling the temperature, the temperature of the wafer is set within the range from 200° C. to 400° C. The processed gas after resist removal is ejected from the chamber through a gas ejection port by an exhaust system.
摘要翻译：在使用氢气的抗蚀剂去除中，可以降低介电常数低的绝缘膜的比介电常数，并且可以提高抗蚀剂去除速度。将晶片装载在室内的旋转台上，将氢气混合气体从气体导入口引入放电管，经由波导将mu波供给到放电管内，混合气体被等离子体激发，生成氢活性物质。并且，从气体输送管将氢原子或氢分子的中性自由基（氢基团）引入到室中，并且去除晶片表面上的抗蚀剂掩模。这里，通过用于加热旋转台并控制温度的基板加热系统，将晶片的温度设定在200℃至400℃的范围内。抗蚀剂除去后的处理气体通过一个气体排出口由排气系统。

6. 发明授权

US6067930A Coaxial plasma processing apparatus 失效
标题翻译：同轴等离子体处理装置
公开(公告)号：US6067930A
公开(公告)日：2000-05-30
申请号：US979254
申请日：1992-11-20
申请人： Mitsuaki Minato , Akira Uehara , Atsushi Matsushita
发明人： Mitsuaki Minato , Akira Uehara , Atsushi Matsushita
IPC分类号： H01L21/302 , H01J37/32 , H01L21/00 , H01L21/3065 , C23C16/00
CPC分类号： H01L21/67069 , H01J37/32009 , H01J37/32541
摘要： A tubular reaction chamber is mounted on an annular insulating plate disposed on a grounded metallic base plate. A cylindrical outer electrode connected to a high-frequency power supply is disposed around said tubular reaction chamber, and a cylindrical inner electrode is disposed in said reaction chamber coaxially with said cylindrical outer electrode. The cylindrical inner electrode has a plurality of inlet holes defined therein, and a lower end disposed in an opening defined in the metallic base plate and fixed to said metallic base plate. A holder is disposed in said cylindrical inner electrode for supporting a plurality of wafers at spaced intervals.
摘要翻译：管状反应室安装在设置在接地金属基板上的环形绝缘板上。连接到高频电源的圆柱形外电极设置在所述管状反应室周围，并且圆柱形内电极设置在与所述圆柱形外电极同轴的所述反应室中。圆柱形内电极具有限定在其中的多个入口孔，下端设置在限定在金属基板中的开口中并固定到所述金属基板。保持器设置在所述圆柱形内电极中，用于以间隔间隔支撑多个晶片。

7. 发明授权

US5220339A Antenna having a core of an amorphous material 失效
标题翻译：具有非晶材料芯的天线
公开(公告)号：US5220339A
公开(公告)日：1993-06-15
申请号：US421142
申请日：1989-10-13
申请人： Atsushi Matsushita
发明人： Atsushi Matsushita
IPC分类号： H01Q1/44 , H01Q7/08
CPC分类号： H01Q7/08 , H01Q1/44
摘要： An antenna element characterized that the core thereof is made of an amorphous metal and at least a part of its surface is wound with an electric conductive material, and an antenna comprising of at least one said antenna element.
摘要翻译：一种天线元件，其特征在于，其芯由非晶金属制成，并且其表面的至少一部分用导电材料缠绕，以及包括至少一个所述天线元件的天线。

8. 发明授权

US09492986B2 Laminate and method for separating the same 有权
标题翻译：层压板及其分离方法
公开(公告)号：US09492986B2
公开(公告)日：2016-11-15
申请号：US13881114
申请日：2011-10-07
申请人： Yoshihiro Inao , Yasushi Fujii , Atsushi Matsushita , Koki Tamura , Atsushi Kubo
发明人： Yoshihiro Inao , Yasushi Fujii , Atsushi Matsushita , Koki Tamura , Atsushi Kubo
IPC分类号： B32B38/10 , B32B7/06 , B32B43/00 , H01L21/683 , B32B7/12 , B32B9/04 , B32B15/04 , B32B17/06
CPC分类号： B32B7/06 , B32B7/12 , B32B9/04 , B32B15/04 , B32B17/06 , B32B17/061 , B32B43/006 , H01L21/6835 , H01L2221/68327 , H01L2221/6834 , Y10T156/1158 , Y10T428/30 , Y10T428/31678
摘要： A laminate including a supporting member which is light transmissive; a supported substrate supported by the supporting member; an adhesive layer provided on a surface of the supported substrate which surface faces toward the supporting member; and a release layer which is made of an inorganic material and is provided between the supporting member and the supported substrate, the release layer having a property that changes when the release layer absorbs light coming through the supporting layer, and the release layer having a flat surface which faces the adhesive layer.
摘要翻译：一种层压体，其包括透光性的支撑构件; 由支撑构件支撑的支撑基板; 所述粘合剂层设置在所述被支撑基板的表面朝向所述支撑部件的表面上; 以及剥离层，其由无机材料制成并且设置在所述支撑构件和所述被支撑基板之间，所述剥离层具有当所述剥离层吸收通过所述支撑层的光时变化的性质，并且所述剥离层具有平坦面向粘合剂层的表面。

9. 发明申请

US20050208756A1 Method of removing resist, semiconductor device thereby and method of manufacturing a semiconductor device 失效
标题翻译：从而除去抗蚀剂，半导体器件的方法以及制造半导体器件的方法
公开(公告)号：US20050208756A1
公开(公告)日：2005-09-22
申请号：US11052987
申请日：2005-02-09
申请人： Atsushi Matsushita , Isao Matsumoto , Kazuaki Inukai , Hong Shin , Naofumi Ohashi , Shuji Sone , Kaori Misawa
发明人： Atsushi Matsushita , Isao Matsumoto , Kazuaki Inukai , Hong Shin , Naofumi Ohashi , Shuji Sone , Kaori Misawa
IPC分类号： H01L21/3065 , G03F7/42 , H01L21/027 , H01L21/311 , H01L21/3213 , H01L21/461 , H01L21/4763 , H01L21/768
CPC分类号： G03F7/427 , H01L21/0274 , H01L21/31138 , H01L21/31144 , H01L21/76802 , H01L21/7681
摘要： Disclosed is a method of removing resist preventing increase of dielectric constant of low permittivity insulating films and preventing remains of resist. Using a resist mask, a protection insulating film, a MSQ film, and a silicon oxide film composing an ILD are RIE dry etched sequentially, and a via is formed on the surface of a substrate for processing reaching the diffusion layer on the substrate for processing. Subsequent process consists of; removing a modified layer formed on the substrate for processing surface because of prior etching using plasma gas by plasma excitation of NH3 gas, and another etching for complete removal of the resist mask by irradiation of hydrogen active species created by hydrogen gas and inert gas, of which example is helium gas or argon gas.
摘要翻译：公开了一种去除抗蚀剂的方法，该方法防止低介电常数绝缘膜的介电常数增加并防止抗蚀剂残留。使用抗蚀剂掩模，保护绝缘膜，MSQ膜和构成ILD的氧化硅膜，依次进行RIE干式蚀刻，并且在用于处理的基板的表面上形成通孔以到达用于处理的基板上的扩散层。随后的过程包括由于通过等离子体激发NH 3气体的等离子体气体的先前蚀刻，除去形成在用于处理表面的基板上的改性层，以及通过产生氢活性物质的照射完全除去抗蚀剂掩模的另一蚀刻通过氢气和惰性气体，例如氦气或氩气。

10. 发明授权

US06664199B2 Coating liquid for forming a silica group coating film having a small dielectric constant 失效
公开(公告)号：US06664199B2
公开(公告)日：2003-12-16
申请号：US10216998
申请日：2002-08-12
申请人： Yasushi Fujii , Atsushi Matsushita
发明人： Yasushi Fujii , Atsushi Matsushita
IPC分类号： H01L2131
CPC分类号： H01L21/0234 , H01L21/02126 , H01L21/02282 , H01L21/31058 , H01L21/31138 , H01L21/3121 , H01L21/76802
摘要： A coating liquid for forming a silica group coating film having a dielectric constant equal to or less than 3.2, comprises a condensation product which is obtained through hydrolysis of trialkoxysilane within an organic solvent under an acid catalysis; and at least one of polyalkylene glycol and the end alkylation product thereof. The addition amount of the at least one of polyalkylene glycol and the end alkylation product thereof is 10-500 weight % with respect to the solid component of the coating liquid, and the weight-average molecular weight of the polyalkylene glycol and the end alkylation product thereof is 100-10,000.

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