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1. 发明授权

US5511162A Automatic LSI testing apparatus using expert system 失效
标题翻译：自动LSI测试仪器采用专家系统
公开(公告)号：US5511162A
公开(公告)日：1996-04-23
申请号：US82289
申请日：1993-06-24
申请人： Hiroyuki Hamada , Tohru Tsujide , Masaaki Sugimoto
发明人： Hiroyuki Hamada , Tohru Tsujide , Masaaki Sugimoto
IPC分类号： G01R31/26 , G01R31/28 , G06F11/25 , G11C29/00 , G11C29/44 , G11C29/56 , H01L21/66 , G06F11/00
CPC分类号： G06F11/2257 , G11C29/56
摘要： An automatic testing apparatus includes an expert rule which is derived from expert knowledge and defines a tree of successively traceable nodes interconnected by decision branches which lead to a plurality of fault modes. Each of the nodes defines a particular test pattern and a corresponding expected value. One of the nodes is specified and a test pattern defined by the specified node is applied to an LSI chip under test and a result signal is derived therefrom. This result signal is compared with the expected value defined by the specified node to produce a comparison result. The tree of the expert rule is traced from the specified node to a subsequent node according to the comparison result and the subsequent node is specified instead of the previously specified node. The process is repeated as the tree is traced from one node to another until one of the fault modes is reached to identify a chip failure.
摘要翻译：自动测试装置包括从专家知识导出的专家规则，并且定义通过导致多个故障模式的决策分支互连的连续可跟踪节点的树。每个节点定义特定的测试模式和相应的预期值。指定其中一个节点，并将由指定节点定义的测试模式应用于被测试的LSI芯片，并从中得到结果信号。将该结果信号与由指定节点定义的期望值进行比较以产生比较结果。专家规则的树根据比较结果从指定的节点追溯到后续节点，指定后续节点，而不是先前指定的节点。当树从一个节点追溯到另一个节点时，重复该过程，直到到达一个故障模式来识别芯片故障。

2. 发明授权

US07700380B2 Surface contamination analyzer for semiconductor wafers, method used therein and process for fabricating semiconductor device 失效
标题翻译：用于半导体晶片的表面污染物分析仪，其中使用的方法和用于制造半导体器件的工艺
公开(公告)号：US07700380B2
公开(公告)日：2010-04-20
申请号：US11151068
申请日：2005-06-13
申请人： Takeo Ushiki , Keizo Yamada , Yohsuke Itagaki , Tohru Tsujide
发明人： Takeo Ushiki , Keizo Yamada , Yohsuke Itagaki , Tohru Tsujide
IPC分类号： H01L21/66
CPC分类号： G01N21/9501 , G21K7/00 , H01J2237/24507 , H01J2237/24571 , H01J2237/24592 , H01L21/02063 , H01L22/12
摘要： A semiconductor wafer is radiated with an electron beam so that the inelastic scattering takes place in the narrow region, and current flows out from the narrow region; the amount of current is dependent on the substance or substances in the narrow region so that the analyst evaluates the degree of contamination on the basis of the substance or substances specified in the narrow region.
摘要翻译：用电子束照射半导体晶片，使得非弹性散射发生在窄区域，电流从窄区域流出; 当前的数量取决于狭窄地区的物质或物质，以便分析人员根据狭义地区规定的物质或物质评估污染程度。

3. 发明授权

US06975125B2 Semiconductor device tester 失效
标题翻译：半导体器件测试仪
公开(公告)号：US06975125B2
公开(公告)日：2005-12-13
申请号：US10842167
申请日：2004-05-10
申请人： Keizo Yamada , Yousuke Itagaki , Takeo Ushiki , Tohru Tsujide
发明人： Keizo Yamada , Yousuke Itagaki , Takeo Ushiki , Tohru Tsujide
IPC分类号： G01B15/00 , G01B15/04 , G01B15/08 , G01N23/225 , G01N27/00 , G01R31/02 , G01R31/305 , G01R31/307 , G04B15/00 , H01J37/20 , H01J37/28 , H01L21/66
CPC分类号： H01J37/256 , G01R31/307 , H01J2237/20228 , H01J2237/221 , H01J2237/24564
摘要： In one aspect, the present invention is a system and method for obtaining information regarding one or more contact holes and/or vias on a semiconductor wafer. In this regard, in one embodiment, the system comprises an electron gun to irradiate an electron beam, having a variable acceleration voltage, on the one or more contact holes and/or vias. The system further includes a current measuring device, coupled to the semiconductor wafer, may measure a compensation current, wherein the compensation current is generated in response to the electron beam irradiated at a plurality of acceleration voltages on the one or more contact holes. The system also includes a data processor, coupled to the current measuring device, to determine information relating to the one or more contact holes and/or vias using the compensation current measured for the plurality of acceleration voltages of the electron beam.
摘要翻译：一方面，本发明是用于获得关于半导体晶片上的一个或多个接触孔和/或通孔的信息的系统和方法。在这方面，在一个实施例中，该系统包括电子枪，以在一个或多个接触孔和/或通孔上照射具有可变加速电压的电子束。该系统还包括耦合到半导体晶片的电流测量装置可以测量补偿电流，其中响应于在一个或多个接触孔上以多个加速电压照射的电子束产生补偿电流。该系统还包括耦合到当前测量装置的数据处理器，以使用针对电子束的多个加速电压测量的补偿电流来确定与一个或多个接触孔和/或通孔有关的信息。

4. 发明授权

US06842663B2 Production managing system of semiconductor device 失效
标题翻译：半导体器件生产管理系统
公开(公告)号：US06842663B2
公开(公告)日：2005-01-11
申请号：US10790276
申请日：2004-03-01
申请人： Keizo Yamada , Yousuke Itagaki , Takeo Ushiki , Tohru Tsujide
发明人： Keizo Yamada , Yousuke Itagaki , Takeo Ushiki , Tohru Tsujide
IPC分类号： H01L21/02 , H01L21/00 , G06F19/99
CPC分类号： H01L21/67276
摘要： A production managing system for semiconductor devices includes, in a semiconductor producing center C, production devices 11a-11c for producing semiconductor devices, in-line measuring devices 12a-12c for measuring data of a lot, a database 2 storing data of production methods, the measured data, the specifications of the process steps corresponding to the measured data, the estimated yield, the data of lot input date and hour, the data of the scheduled date on which the process step is performed, the data of actual date of completion in every step and the data of the scheduled date of completion of the semiconductor devices of every lot, correspondingly to a lot number data of the semiconductor devices (chips) and a server 1 including an estimated yield operating unit 1a for calculating the estimated yield, which is a final yield, on the basis of the specifications and the measured data, and a production managing unit 1b for performing a production management of semiconductor devices ordered by a user on the basis of the respective data inputted by the user and the estimated yield, wherein a user terminal of the user not only performs a determination whether or not the process processing in every process is normal but also estimates the final number of normal products ordered by the user and obtainable finally.
摘要翻译：半导体装置的生产管理系统包括半导体制造中心C，用于制造半导体器件的生产装置11a-11c，用于测量批次数据的在线测量装置12a-12c，存储生产方法数据的数据库2，测量数据，对应于测量数据的过程步骤的规格，估计产量，批次输入日期和时间的数据，执行处理步骤的预定日期的数据，实际完成日期的数据在每个步骤和每个批次的半导体器件的预定完成日期的数据中，对应于半导体器件（芯片）的批号数据和包括用于计算估计产量的估计产量操作单元1a的服务器1，根据规格和测量数据是最终产量，以及用于执行半导体器件的生产管理的生产管理单元1b 由用户根据用户输入的相应数据和估计的收益进行排序，其中用户的用户终端不仅执行每个处理中的处理处理是否正常的确定，还估计正品由用户订购，最终可以获得。

5. 发明授权

US5521516A Semiconductor integrated circuit fault analyzing apparatus and method therefor 失效
标题翻译：半导体集成电路故障分析装置及其方法
公开(公告)号：US5521516A
公开(公告)日：1996-05-28
申请号：US354088
申请日：1994-12-06
申请人： Yasuko Hanagama , Toyokazu Nakamura , Kiyoshi Nikawa , Tohru Tsujide
发明人： Yasuko Hanagama , Toyokazu Nakamura , Kiyoshi Nikawa , Tohru Tsujide
IPC分类号： G01R31/302 , G01R31/307 , H01L21/66 , G01R1/04
CPC分类号： G01R31/307
摘要： A semiconductor integrated circuit fault analyzing apparatus includes an electron beam tester and controller. The electron beam tester includes an electron gun assembly for generating a primary electron beam and forms a voltage contrast image on the basis of a detection amount of secondary electrons obtained by irradiating the primary electron beam from the electron gun assembly onto a semiconductor integrated circuit serving as a target to be tested and supplied with a test pattern signal, thereby specifying a faulty circuit portion of the semiconductor integrated circuit using the formed voltage contrast image. The controller sets, immediately before the test pattern signal is supplied to the semiconductor integrated circuit, at least one of a power and a signal which are supplied to the semiconductor integrated circuit to be a voltage different from a voltage obtained in the presence of the test pattern signal to cause the electron beam tester to acquire a voltage contrast image free from charge-up phenomena in synchronism with the start of supplying the test pattern signal.
摘要翻译：半导体集成电路故障分析装置包括电子束测试器和控制器。该电子束测试器包括一个用于产生一次电子束的电子枪组件，并且基于通过将来自电子枪组件的一次电子束照射到半导体集成电路而获得的二次电子的检测量形成电压对比图像，要测试并提供测试图案信号的目标，从而使用形成的电压对比图像指定半导体集成电路的故障电路部分。控制器将紧接在测试图案信号提供给半导体集成电路之前，将提供给半导体集成电路的功率和信号中的至少一个设置为与存在测试时获得的电压不同的电压模式信号使电子束测试仪与开始提供测试图案信号同步地获取没有充电现象的电压对比图像。

6. 发明授权

US4481524A Semiconductor memory device having stacked polycrystalline silicon layers 失效
标题翻译：具有层叠多晶硅层的半导体存储器件
公开(公告)号：US4481524A
公开(公告)日：1984-11-06
申请号：US359018
申请日：1982-03-18
申请人： Tohru Tsujide
发明人： Tohru Tsujide
IPC分类号： G11C11/412 , G11C11/417 , H01L21/822 , H01L21/8244 , H01L23/528 , H01L23/532 , H01L27/04 , H01L27/11 , H01L29/78 , H01L27/02 , G11C11/00 , H01L29/04 , H01L29/34
CPC分类号： H01L27/1104 , G11C11/412 , G11C11/417 , H01L23/528 , H01L23/53271 , H01L2924/0002 , Y10S257/903
摘要： A high-density integrated circuit is disclosed, which comprises at least three stacked wiring layers, the lowest layer being formed of polycrystalline and including silicon gates of a plurality of insulated-gate field-effect transistors, one of the upper layers being formed of polycrystalline silicon and used for feeding a power supply to the transistors, and the other of the upper layers being formed of high-conductivity metal. Where the upper polycrystalline silicon wiring layer is under the metal wiring layer, it is preferably of a mesh-like pattern.
摘要翻译：公开了一种高密度集成电路，其包括至少三层堆叠的布线层，最下层由多晶形成并且包括多个绝缘栅场效应晶体管的硅栅极，其中一层由多晶并且用于将电源馈送到晶体管，并且另一个上层由高导电性金属形成。在上部多晶硅布线层位于金属布线层下方的情况下，优选为网状图案。

7. 发明授权

US07795593B2 Surface contamination analyzer for semiconductor wafers 失效
标题翻译：半导体晶圆表面污染分析仪
公开(公告)号：US07795593B2
公开(公告)日：2010-09-14
申请号：US12248312
申请日：2008-10-09
申请人： Takeo Ushiki , Keizo Yamada , Yohsuke Itagaki , Tohru Tsujide
发明人： Takeo Ushiki , Keizo Yamada , Yohsuke Itagaki , Tohru Tsujide
IPC分类号： G01T1/24 , G01R31/305 , G01R31/26 , G01N27/00 , G01N23/00
CPC分类号： G01N21/9501 , G21K7/00 , H01J2237/24507 , H01J2237/24571 , H01J2237/24592 , H01L21/02063 , H01L22/12
摘要： A semiconductor wafer is radiated with an electron beam so that the inelastic scattering takes place in the narrow region, and current flows out from the narrow region; the amount of current is dependent on the substance or substances in the narrow region so that the analyst evaluates the degree of contamination on the basis of the substance or substances specified in the narrow region.
摘要翻译：用电子束照射半导体晶片，使得非弹性散射发生在窄区域，电流从窄区域流出; 当前的数量取决于狭窄地区的物质或物质，以便分析人员根据狭义地区规定的物质或物质评估污染程度。

8. 发明授权

US07385195B2 Semiconductor device tester 失效
标题翻译：半导体器件测试仪
公开(公告)号：US07385195B2
公开(公告)日：2008-06-10
申请号：US11198780
申请日：2005-08-05
申请人： Keizo Yamada , Yousuke Itagaki , Takeo Ushiki , Tohru Tsujide
发明人： Keizo Yamada , Yousuke Itagaki , Takeo Ushiki , Tohru Tsujide
IPC分类号： G01R31/02
CPC分类号： H01J37/256 , G01R31/307 , H01J2237/20228 , H01J2237/221 , H01J2237/24564
摘要： A system and method is disclosed for obtaining information regarding one or more contact and/or via holes on a semiconductor wafer. In one embodiment, the method obtains information regarding one or more holes (for example, via or contact) that are disposed in a semiconductor wafer or disposed in a layer which is disposed on or above the semiconductor wafer. The method of this embodiment comprises irradiating the one or more holes with an electron beam; and determining information relating to a bottom diameter or a bottom circumference of the one or more holes using data which is representative of an amount of substrate current which is generated in response to irradiating the one or more holes with an electron beam.
摘要翻译：公开了一种用于获得关于半导体晶片上的一个或多个接触和/或通孔的信息的系统和方法。在一个实施例中，该方法获得关于设置在半导体晶片中或设置在设置在半导体晶片上或上方的层中的一个或多个孔（例如，通孔或接触）的信息。该实施例的方法包括用电子束照射一个或多个孔; 以及使用表示响应于用电子束照射所述一个或多个孔而产生的衬底电流的量的数据来确定与所述一个或多个孔的底部直径或底部圆周有关的信息。

9. 发明申请

US20050230622A1 Surface contamination analyzer for semiconductor wafers, method used therein and process for fabricating semiconductor device 失效
公开(公告)号：US20050230622A1
公开(公告)日：2005-10-20
申请号：US11151068
申请日：2005-06-13
申请人： Takeo Ushiki , Keizo Yamada , Yohsuke Itagaki , Tohru Tsujide
发明人： Takeo Ushiki , Keizo Yamada , Yohsuke Itagaki , Tohru Tsujide
IPC分类号： G01R1/06 , G01N21/95 , G01N27/00 , G01Q30/10 , G01Q60/40 , G01R31/302 , G21K7/00 , H01L21/304 , H01L21/306 , H01L21/66 , H01L29/94
CPC分类号： G01N21/9501 , G21K7/00 , H01J2237/24507 , H01J2237/24571 , H01J2237/24592 , H01L21/02063 , H01L22/12
摘要： A semiconductor wafer is radiated with an electron beam so that the inelastic scattering takes place in the narrow region, and current flows out from the narrow region; the amount of current is dependent on the substance or substances in the narrow region so that the analyst evaluates the degree of contamination on the basis of the substance or substances specified in the narrow region.

10. 发明授权

US06753194B2 Surface contamination analyzer for semiconductor wafers, method used therein and process for fabricating semiconductor device 失效
公开(公告)号：US06753194B2
公开(公告)日：2004-06-22
申请号：US10083440
申请日：2002-02-26
申请人： Takeo Ushiki , Keizo Yamada , Yohsuke Itagaki , Tohru Tsujide
发明人： Takeo Ushiki , Keizo Yamada , Yohsuke Itagaki , Tohru Tsujide
IPC分类号： H01L2166
CPC分类号： G01N21/9501 , G21K7/00 , H01J2237/24507 , H01J2237/24571 , H01J2237/24592 , H01L21/02063 , H01L22/12
摘要： A semiconductor wafer is radiated with an electron beam so that the inelastic scattering takes place in the narrow region, and current flows out from the narrow region; the amount of current is dependent on the substance or substances in the narrow region so that the analyst evaluates the degree of contamination on the basis of the substance or substances specified in the narrow region.

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