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1. 发明授权

US07994616B2 Multilayered lead frame for a semiconductor light-emitting device 有权
标题翻译：用于半导体发光器件的多层引线框架
公开(公告)号：US07994616B2
公开(公告)日：2011-08-09
申请号：US12509065
申请日：2009-07-24
申请人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
发明人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
IPC分类号： H01L23/495
CPC分类号： H01L33/62 , H01L23/49582 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2224/45099 , H01L2924/00
摘要： A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
摘要翻译：通过以大致整体的方式施加镀镍（102），镀钯（103）和镀金（104）的方式形成用于半导体器件的引线框架（100），以引导诸如铜薄板的框架体（101）并且进一步将银电镀（105）选择性地施加到将被半导体器件的封装封装的内部部分的一部分。引线框架（100）还可以包括封装的基部。镀银有助于内部部件的良好的光反射率和引线接合效率，而闪镀电镀有助于在封装外部的外部部件具有优异的耐腐蚀性和焊接效率。

2. 发明授权

US08541871B2 Multilayered lead frame for a semiconductor light-emitting device 有权
标题翻译：用于半导体发光器件的多层引线框架
公开(公告)号：US08541871B2
公开(公告)日：2013-09-24
申请号：US12716938
申请日：2010-03-03
申请人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
发明人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
IPC分类号： H01L23/495
CPC分类号： H01L33/62 , H01L23/49582 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2224/45099 , H01L2924/00
摘要： A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
摘要翻译：通过以大致整体的方式施加镀镍（102），镀钯（103）和镀金（104）的方式形成用于半导体器件的引线框架（100），以引导诸如铜薄板的框架体（101）并且进一步将银电镀（105）选择性地施加到将被半导体器件的封装封装的内部部分的一部分。引线框架（100）还可以包括封装的基部。镀银有助于内部部件的良好的光反射率和引线接合效率，而闪镀电镀有助于在封装外部的外部部件具有优异的耐腐蚀性和焊接效率。

3. 发明授权

US07692277B2 Multilayered lead frame for a semiconductor light-emitting device 有权
标题翻译：用于半导体发光器件的多层引线框架
公开(公告)号：US07692277B2
公开(公告)日：2010-04-06
申请号：US10542419
申请日：2004-01-13
申请人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
发明人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
IPC分类号： H01L23/495
CPC分类号： H01L33/62 , H01L23/49582 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2224/45099 , H01L2924/00
摘要： A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
摘要翻译：通过以大致整体的方式施加镀镍（102），镀钯（103）和镀金（104）的方式形成用于半导体器件的引线框架（100），以引导诸如铜薄板的框架体（101）并且进一步将银电镀（105）选择性地施加到将被半导体器件的封装封装的内部部分的一部分。引线框架（100）还可以包括封装的基部。镀银有助于内部部件的良好的光反射率和引线接合效率，而闪镀电镀有助于在封装外部的外部部件具有优异的耐腐蚀性和焊接效率。

4. 发明申请

US20060102936A1 Lead frame for a semiconductor device 有权
标题翻译：半导体器件的引线框架
公开(公告)号：US20060102936A1
公开(公告)日：2006-05-18
申请号：US10542419
申请日：2004-01-13
申请人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
发明人： Hidekazu Tomohiro , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
IPC分类号： H01L31/112
CPC分类号： H01L33/62 , H01L23/49582 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2224/45099 , H01L2924/00
摘要： A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
摘要翻译：通过以大致整体的方式施加镀镍（102），镀钯（103）和镀金（104）的方式形成用于半导体器件的引线框架（100），以引导诸如铜薄板的框架体（101）并且进一步将银电镀（105）选择性地施加到将被半导体器件的封装封装的内部部分的一部分。引线框架（100）还可以包括封装的基部。镀银有助于内部部件的良好的光反射率和引线接合效率，而闪镀电镀有助于在封装外部的外部部件具有优异的耐腐蚀性和焊接效率。

5. 发明申请

US20090283791A1 MULTILAYERED LEAD FRAME FOR A SEMICONDUCTOR LIGHT-EMITTING DEVICE 有权
标题翻译：用于半导体发光器件的多层引线框架
公开(公告)号：US20090283791A1
公开(公告)日：2009-11-19
申请号：US12509065
申请日：2009-07-24
申请人： Hidekazu TOMOHIRO , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
发明人： Hidekazu TOMOHIRO , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
IPC分类号： H01L33/00
CPC分类号： H01L33/62 , H01L23/49582 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2224/45099 , H01L2924/00
摘要： A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
摘要翻译：通过以大致整体的方式施加镀镍（102），镀钯（103）和镀金（104）的方式形成用于半导体器件的引线框架（100），以引导诸如铜薄板的框架体（101）并且进一步将银电镀（105）选择性地施加到将被半导体器件的封装封装的内部部分的一部分。引线框架（100）还可以包括封装的基部。镀银有助于内部部件的良好的光反射率和引线接合效率，而闪镀电镀有助于在封装外部的外部部件具有优异的耐腐蚀性和焊接效率。

6. 发明申请

US20100155770A1 MULTILAYERED LEAD FRAME FOR A SEMICONDUCTOR LIGHT-EMITTING DEVICE 有权
标题翻译：用于半导体发光器件的多层引线框架
公开(公告)号：US20100155770A1
公开(公告)日：2010-06-24
申请号：US12716938
申请日：2010-03-03
申请人： Hidekazu TOMOHIRO , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
发明人： Hidekazu TOMOHIRO , Masayuki Fujii , Norio Satou , Tomoyuki Yamada , Tomio Kusano
IPC分类号： H01L33/00
CPC分类号： H01L33/62 , H01L23/49582 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/85439 , H01L2224/85464 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2224/45099 , H01L2924/00
摘要： A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.
摘要翻译：通过以大致整体的方式施加镀镍（102），镀钯（103）和镀金（104）的方式形成用于半导体器件的引线框架（100），以引导诸如铜薄板的框架体（101）并且进一步将银电镀（105）选择性地施加到将被半导体器件的封装封装的内部部分的一部分。引线框架（100）还可以包括封装的基部。镀银有助于内部部件的良好的光反射率和引线接合效率，而闪镀电镀有助于在封装外部的外部部件具有优异的耐腐蚀性和焊接效率。

7. 发明授权

US08280148B2 Pattern defect analysis equipment, pattern defect analysis method and pattern defect analysis program 有权
标题翻译：图案缺陷分析设备，图案缺陷分析方法和图案缺陷分析程序
公开(公告)号：US08280148B2
公开(公告)日：2012-10-02
申请号：US13349402
申请日：2012-01-12
申请人： Norio Satou , Susumu Koyama , Masashi Sakamoto , Kenji Obara
发明人： Norio Satou , Susumu Koyama , Masashi Sakamoto , Kenji Obara
IPC分类号： G06K9/00
CPC分类号： G06T7/001 , G06T2207/10061 , G06T2207/30148
摘要： A data processing unit acquires a review image including a pattern defect on a substrate, compares the review image with a reference image thereby to extract a defect image, the reference image including no pattern defect, and performs an alignment between the review image and a self-layer design pattern image which is generated from design data belonging to the identical layer in a region corresponding to the review image. The data processing unit, then, based on result of the alignment, generates an another-layer design pattern image which is generated from design data belonging to another layer in the region corresponding to the review image, and, based on a synthesized image of the defect image and the another-layer design pattern image, determines the relative position relationship between the pattern defect and a pattern belonging to another layer, and judges the criticality based on the relative position relationship.
摘要翻译：数据处理单元获取在基板上包含图案缺陷的检查图像，将检查图像与参考图像进行比较，从而提取缺陷图像，该参考图像不包括图案缺陷，并且在检查图像与自身之间进行对准在与检查图像相对应的区域中属于相同层的设计数据生成的层设计图案图像。然后，数据处理单元基于对准的结果，生成从属于与检视图像对应的区域中的另一层的设计数据生成的另一层设计图案图像，并且基于合成图像缺陷图像和另一层设计图案图像，确定图案缺陷和属于另一层的图案之间的相对位置关系，并且基于相对位置关系来判断临界度。

8. 发明授权

US07941008B2 Pattern search method 有权
标题翻译：模式搜索方式
公开(公告)号：US07941008B2
公开(公告)日：2011-05-10
申请号：US11104632
申请日：2005-04-13
申请人： Norio Satou , Akiyuki Sugiyama , Osamu Komuro , Satoru Yamaguchi
发明人： Norio Satou , Akiyuki Sugiyama , Osamu Komuro , Satoru Yamaguchi
IPC分类号： G06K9/54
CPC分类号： G06T7/001
摘要： According to the pattern search method of the present invention, detection of a detection image region relative to an observation image is performed by a pattern matching. An image whose size is substantially the same as that of the observation image is used as the detection image region. The detection image region is relatively displaced with reference to the observation image, thereby detecting a degree of similarity for a common region which is common to both of the region and the image. Displacement range of the detection image region is set in advance. If area of the common region is larger than a predetermined value, calculating the degree of similarity will be performed.
摘要翻译：根据本发明的图案搜索方法，通过图案匹配来执行相对于观察图像的检测图像区域的检测。使用与观察图像基本相同的图像作为检测图像区域。检测图像区域相对于观察图像相对移位，从而检测对于区域和图像两者共同的公共区域的相似度。预先设定检测图像区域的位移范围。如果公共区域的面积大于预定值，则将执行相似度的计算。

9. 发明申请

US20090180680A1 PATTERN DEFECT ANALYSIS EQUIPMENT, PATTERN DEFECT ANALYSIS METHOD AND PATTERN DEFECT ANALYSIS PROGRAM 有权
标题翻译：图形缺陷分析设备，图形缺陷分析方法和图形缺陷分析程序
公开(公告)号：US20090180680A1
公开(公告)日：2009-07-16
申请号：US12350783
申请日：2009-01-08
申请人： Norio Satou , Susumu Koyama , Masashi Sakamoto , Kenji Obara
发明人： Norio Satou , Susumu Koyama , Masashi Sakamoto , Kenji Obara
IPC分类号： G06K9/00
CPC分类号： G06T7/001 , G06T2207/10061 , G06T2207/30148
摘要： A data processing unit acquires a review image including a pattern defect on a substrate, compares the review image with a reference image thereby to extract a defect image, the reference image including no pattern defect, and performs an alignment between the review image and a self-layer design pattern image which is generated from design data belonging to the identical layer in a region corresponding to the review image. The data processing unit, then, based on result of the alignment, generates an another-layer design pattern image which is generated from design data belonging to another layer in the region corresponding to the review image, and, based on a synthesized image of the defect image and the another-layer design pattern image, determines the relative position relationship between the pattern defect and a pattern belonging to another layer, and judges the criticality based on the relative position relationship.
摘要翻译：数据处理单元获取在基板上包含图案缺陷的检查图像，将检查图像与参考图像进行比较，从而提取缺陷图像，该参考图像不包括图案缺陷，并且在检查图像和自身之间进行对准在与检查图像相对应的区域中属于相同层的设计数据生成的层设计图案图像。然后，数据处理单元基于对准的结果，生成从属于与检视图像对应的区域中的另一层的设计数据生成的另一层设计图案图像，并且基于合成图像缺陷图像和另一层设计图案图像，确定图案缺陷和属于另一层的图案之间的相对位置关系，并且基于相对位置关系来判断临界度。

10. 发明申请

US20110032176A1 IMAGE FORMING METHOD AND CHARGED PARTICLE BEAM APPARATUS 有权
标题翻译：图像形成方法和充电颗粒光束装置
公开(公告)号：US20110032176A1
公开(公告)日：2011-02-10
申请号：US12907912
申请日：2010-10-19
申请人： Atsushi KOBARU , Hidetoshi Morokuma , Hiroki Kawada , Sho Takami , Katsuhiro Sasada , Kouichi Yamamoto , Norio Satou , Kunio Nakanishi
发明人： Atsushi KOBARU , Hidetoshi Morokuma , Hiroki Kawada , Sho Takami , Katsuhiro Sasada , Kouichi Yamamoto , Norio Satou , Kunio Nakanishi
IPC分类号： G09G1/06
CPC分类号： H01J37/265 , H01J37/28 , H01J2237/1536 , H01J2237/31749
摘要： An image forming method and a charged particle beam apparatus suitable for suppressing the inclination of charging when scanning a two-dimensional area with a charged particle beam. A third scanning line located between a first scanning line and a second scanning line is scanned. After the first, second and third scanning lines have been scanned, a plurality of scanning lines are scanned between the first and third scanning lines and between the second and third scanning lines.
摘要翻译：一种适于在用带电粒子束扫描二维区域时抑制充电倾斜的图像形成方法和带电粒子束装置。扫描位于第一扫描线和第二扫描线之间的第三扫描线。在扫描第一，第二和第三扫描线之后，在第一扫描线和第三扫描线之间以及第二和第三扫描线之间扫描多条扫描线。

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