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    • 1. 发明授权
    • Via and pad structure for thermoplastic substrates and method and
apparatus for forming the same
    • 用于热塑性基材的通孔和垫结构及其形成方法和装置
    • US5401911A
    • 1995-03-28
    • US863645
    • 1992-04-03
    • Herbert AndersonArthur BrossJulian G. CempaRobert O. LussowDonald E. MyersThomas J. Walsh
    • Herbert AndersonArthur BrossJulian G. CempaRobert O. LussowDonald E. MyersThomas J. Walsh
    • B29C65/70H01R12/04H01R43/20H05K1/11H05K3/00H05K3/36H05K3/40H05K3/46
    • H05K3/4046H01L2224/11003H01L2224/11334H05K2201/0129H05K2201/0141H05K2201/091H05K2201/10234H05K2203/1105H05K2203/1189Y10T29/49126Y10T29/49153
    • An improved connection through a substrate layer is formed by embedding a conductive element such as a pin on one or more balls or spheres in a thermoplastic material which is preferably a liquid crystal polymer. The substrate may be heated to facilitate the embedding process in which material of the substrate layer is reflowed under pressure to retain the conductive element by means of a preload force. The formation of such connections with either pins or plural conductive elements allows independence of aspect ratio of the connection and, hence, feature size of conductive patterns on the substrate and the thickness of the substrate layer. Perfecting features of the substrate and method and apparatus for forming the substrate, embedding to a selected depth to form protrusions and recesses to assist in registration of a substrate layer with another substrate layer, metallization to form pads, improved connection between metallization patterns on the substrate and the conductive elements, the regulation of pressurization of substrate material by means of differently shaped dimples or a renewable surface and several alternative arrangements for positioning and embedding the conductive elements. Multiple types of conductive elements may be simultaneously embedded to different depths in a single substrate and from either or both sides thereof to form a variety of substrate structures.
    • 通过在热塑性材料(其优选为液晶聚合物)中将诸如针的导电元件嵌入一个或多个球或球体上而形成改进的连接。 衬底可以被加热以便于嵌入过程,其中衬底层的材料在压力下被回流以通过预加载力来保持导电元件。 与引脚或多个导电元件的这种连接的形成允许独立于连接的纵横比,因此独立于衬底上导电图案的特征尺寸和衬底层的厚度。 衬底的完善特征以及用于形成衬底的方法和装置,嵌入到所选择的深度以形成突出和凹陷以辅助衬底层与另一衬底层对准,金属化以形成衬垫,改善衬底上的金属化图案之间的连接 和导电元件,通过不同形状的凹坑或可再生表面调节衬底材料的加压以及用于定位和嵌入导电元件的几种替代布置。 多种类型的导电元件可以同时嵌入到单个基板中的不同深度并且从其一侧或两侧嵌入到不同深度以形成各种基板结构。
    • 10. 发明授权
    • High density probe
    • 高密度探头
    • US5225777A
    • 1993-07-06
    • US830875
    • 1992-02-04
    • Arthur BrossThomas J. Walsh
    • Arthur BrossThomas J. Walsh
    • G01R1/073H01L21/66
    • G01R1/07342
    • There is disclosed a high density test probe assembly, and method of fabricating it. The probe assembly has a multitude of wire-like probe elements whose exposed tips are spaced on centers X and Y to match the centers of closely spaced surface pads of a VLSI circuit. Interconnections to and from the probe elements (for connection to external test equipment) are provided by a multi-layer arrangement of insulating and conducting layers within the body of the probe assembly. The tips of the probe elements are canted relative to vertical so that when the probe assembly is pushed down into mating position onto a VLSI circuit, the probe elements uniformly deflect laterally in one direction only and give a "wiping" action in contacting surface pads of the VLSI circuit together with a desired normal contact force. The method of fabricating the probe assembly includes forcing all of the probe elements through staggered vias in the multilayer arrangement. This step simultaneously makes desired electrical interconnections to the probe elements, precisely aligns and captivates the probe elements, and bends (cants) their ends so that they deflect uniformly in one direction only when the probe assembly is mated with a VLSI circuit.
    • 公开了一种高密度测试探针组件及其制造方法。 探针组件具有多个线状探针元件,其暴露的尖端在中心X和Y上间隔开以匹配VLSI电路的紧密间隔的表面焊盘的中心。 与探头元件(用于连接到外部测试设备)的互连通过探针组件的主体内的绝缘和导电层的多层布置提供。 探针元件的尖端相对于垂直方向倾斜,使得当探针组件被向下推入到VLSI电路中的配合位置时,探针元件仅在一个方向上均匀地偏转横向,并在接触表面垫中的“擦拭” VLSI电路与所需的正常接触力一起。 制造探针组件的方法包括通过多层布置中的交错通孔迫使所有探针元件。 该步骤同时使得对探针元件的期望的电互连,精确地对准和捕获探针元件,并且使其端部弯曲(倾斜),使得仅当探针组件与VLSI电路配合时,它们在一个方向上均匀偏转。