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1. 发明授权

US07185324B2 Compiler apparatus and method for determining locations for data in memory area 有权
标题翻译：用于确定存储器区域中的数据的位置的编译器装置和方法
公开(公告)号：US07185324B2
公开(公告)日：2007-02-27
申请号：US10631960
申请日：2003-08-01
申请人： Shohei Michimoto , Hajime Ogawa , Toshiyuki Sakata , Taketo Heishi , Shuichi Takayama
发明人： Shohei Michimoto , Hajime Ogawa , Toshiyuki Sakata , Taketo Heishi , Shuichi Takayama
IPC分类号： G06F9/45 , G06F12/00 , G06F12/02
CPC分类号： G06F9/5016 , G06F8/443 , G06F9/44557
摘要： Disclosed is a compiler apparatus for generating an instruction code composed of instruction sets each including an instruction that designates an m-bit immediate value indicating a location of a data item in a memory area. The compiler apparatus sequentially selects, based on one data attribute, a data item from a group X composed of a plurality of data items; and judges, each time a data item is selected, whether the selected data item is allocatable to an n-byte memory area (n≦2m). When the judgment is negative, the compiler apparatus specifies, based on a different data attribute, a data item out of all the selected data items and excludes the specified data item from the group X, and repeats the selection until all the data items remaining in the group X after excluding specified data items are judged to be allocatable to the memory area.
摘要翻译：公开了一种编译装置，用于生成由指令集构成的指令代码，每个指令集包括指定指示存储区中的数据项的位置的m位立即值的指令。编译装置根据一个数据属性从由多个数据项组成的组X中依次选择数据项; 并且每当选择数据项时，判断所选择的数据项是否可分配给n字节存储区（n <= 2 ^{m）。当判断为否定时，编译装置根据不同的数据属性指定所有选择的数据项中的数据项，并从组X中排除指定的数据项，并重复选择，直到剩余的所有数据项在排除指定数据项之后的组X被判断为可分配给存储区。}

2. 发明授权

US08418157B2 Compiler apparatus with flexible optimization 有权
标题翻译：具有灵活优化的编译器
公开(公告)号：US08418157B2
公开(公告)日：2013-04-09
申请号：US12706329
申请日：2010-02-16
申请人： Hajime Ogawa , Taketo Heishi , Toshiyuki Sakata , Shuichi Takayama , Shohei Michimoto , Tomoo Hamada , Ryoko Miyachi
发明人： Hajime Ogawa , Taketo Heishi , Toshiyuki Sakata , Shuichi Takayama , Shohei Michimoto , Tomoo Hamada , Ryoko Miyachi
IPC分类号： G06F9/45
CPC分类号： G06F8/443
摘要： A compiler comprises an analysis unit that detects directives (options and pragmas) from a user to the compiler, an optimization unit that is made up of a processing unit (a global region allocation unit, a software pipelining unit, a loop unrolling unit, a “if” conversion unit, and a pair instruction generation unit) that performs individual optimization processing designated by options and pragmas from a user, following the directives and the like from the analysis unit, etc. The global region allocation unit performs optimization processing, following designation of the maximum data size of variables to be allocated to a global region, designation of variables to be allocated to the global region, and options and pragmas regarding designation of variables not to be allocated in the global region.
摘要翻译：编译器包括检测用户到编译器的指令（选项和编译指示）的分析单元，由处理单元（全局区域分配单元，软件流水线单元，循环展开单元，如果转换单元和配对指令生成单元）执行来自用户的选项和编译指示的单独优化处理，遵循来自分析单元的指令等。全局区域分配单元执行优化处理，在指定要分配给全局区域的变量的最大数据大小，要分配给全局区域的变量的指定，以及关于在全局区域中未分配的变量的指定的选项和编译指示。

3. 发明授权

US08151254B2 Compiler, compiler apparatus and compilation method 有权
标题翻译：编译器，编译器和编译方法
公开(公告)号：US08151254B2
公开(公告)日：2012-04-03
申请号：US11790215
申请日：2007-04-24
申请人： Taketo Heishi , Toshiyuki Sakata , Hajime Ogawa , Ryoko Miyachi , Shuji Miyasaka , Tomokazu Ishikawa
发明人： Taketo Heishi , Toshiyuki Sakata , Hajime Ogawa , Ryoko Miyachi , Shuji Miyasaka , Tomokazu Ishikawa
IPC分类号： G06F9/45
CPC分类号： G06F8/443 , G06F8/425 , G06F8/427 , G06F8/4441
摘要： An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.
摘要翻译：提供包括在源程序101中的操作者定义文件102等以及将源程序101转换为机器语言程序105的编译器100。操作者定义文件102包括通过类定义的各种定点类型操作符的定义。编译器100可以生成有效的高级特定指令，处理器执行并通过扩展功能等进行改进，而不会重复频繁升级编译器本身的版本。编译器100由生成中间代码的中间代码生成单元121构成，机器语言指令替换单元122，其使用机器语言指令代替参考由操作者定义文件102定义的类别的中间代码和优化单元130，执行针对包括替代机器语言指令的中间代码的优化。

4. 发明申请

US20070256065A1 Compiler, compiler apparatus and compilation method 有权
公开(公告)号：US20070256065A1
公开(公告)日：2007-11-01
申请号：US11790215
申请日：2007-04-24
申请人： Taketo Heishi , Toshiyuki Sakata , Hajime Ogawa , Ryoko Miyachi , Shuji Miyasaka , Tomokazu Ishikawa
发明人： Taketo Heishi , Toshiyuki Sakata , Hajime Ogawa , Ryoko Miyachi , Shuji Miyasaka , Tomokazu Ishikawa
IPC分类号： G06F9/45
CPC分类号： G06F8/443 , G06F8/425 , G06F8/427 , G06F8/4441
摘要： An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.

5. 发明申请

US20060080643A1 Program processing apparatus 审中-公开
标题翻译：程序处理装置
公开(公告)号：US20060080643A1
公开(公告)日：2006-04-13
申请号：US11233023
申请日：2005-09-23
申请人： Hajime Ogawa , Toshiyuki Sakata
发明人： Hajime Ogawa , Toshiyuki Sakata
IPC分类号： G06F9/44
CPC分类号： G06F8/423 , G06F8/443
摘要： A program processing apparatus, which can correct a source program by automatically inserting hint information so that a satisfactory optimization can be performed even in the case where the user has not given hint information to a compiler, automatically inserts, into the source program, hint information given to the compiler, and includes: a syntax analysis unit which analyzes a syntax of the source program and generates analysis information; and a hint information insertion unit which creates a program by inserting hint information that is logically consistent and that is given to the compiler into the source program based on the analysis information, and outputs the created program.
摘要翻译：一种程序处理装置，其可以通过自动插入提示信息来校正源程序，使得即使在用户没有向编译器提供提示信息的情况下也可以执行令人满意的优化，自动地将其提供给源程序提示信息提供给编译器，并且包括：语法分析单元，其分析源程序的语法并生成分析信息; 以及提示信息插入单元，其通过在逻辑上一致地插入提示信息并且基于分析信息将编译器提供给源程序来创建程序，并输出所创建的程序。

6. 发明授权

US07698696B2 Compiler apparatus with flexible optimization 有权
标题翻译：具有灵活优化的编译器
公开(公告)号：US07698696B2
公开(公告)日：2010-04-13
申请号：US10608040
申请日：2003-06-30
申请人： Hajime Ogawa , Taketo Heishi , Toshiyuki Sakata , Shuichi Takayama , Shohei Michimoto , Tomoo Hamada , Ryoko Miyachi
发明人： Hajime Ogawa , Taketo Heishi , Toshiyuki Sakata , Shuichi Takayama , Shohei Michimoto , Tomoo Hamada , Ryoko Miyachi
IPC分类号： G06F9/45 , G06F9/44
CPC分类号： G06F8/443
摘要： A compiler comprises an analysis unit that detects directives (options and pragmas) from a user to the compiler, an optimization unit that is made up of a processing unit (a global region allocation unit, a software pipelining unit, a loop unrolling unit, a “if” conversion unit, and a pair instruction generation unit) that performs individual optimization processing designated by options and pragmas from a user, following the directives and the like from the analysis unit, etc. The global region allocation unit performs optimization processing, following designation of the maximum data size of variables to be allocated to a global region, designation of variables to be allocated to the global region, and options and pragmas regarding designation of variables not to be allocated in the global region.
摘要翻译：编译器包括检测用户到编译器的指令（选项和编译指示）的分析单元，由处理单元（全局区域分配单元，软件流水线单元，循环展开单元，根据来自分析单元等的指令等，执行由用户选择和编译指定的单独优化处理的“if”转换单元和一对指令生成单元）。全局区域分配单元执行优化处理指定要分配给全球区域的变量的最大数据大小，指定要分配给全局区域的变量，以及关于指定未分配给全局区域的变量的选项和编译指示。

7. 发明授权

US07254807B2 Program conversion apparatus, program conversion method, and computer program for executing program conversion process 有权
标题翻译：程序转换装置，程序转换方法和用于执行程序转换处理的计算机程序
公开(公告)号：US07254807B2
公开(公告)日：2007-08-07
申请号：US10315877
申请日：2002-12-10
申请人： Toshiyuki Sakata , Taketo Heishi , Hajime Ogawa , Shohei Michimoto , Shuichi Takayama
发明人： Toshiyuki Sakata , Taketo Heishi , Hajime Ogawa , Shohei Michimoto , Shuichi Takayama
IPC分类号： G06F9/45
CPC分类号： G06F8/41 , G06F9/44521 , G06F9/44542
摘要： A compiling unit (110) generates indefinite branch information showing that an instruction set to be selected is indefinite, instead of generating a branch instruction. A linking unit (130) generates an appropriate direct addressing branch instruction by judging whether an instruction set used at a branch source and an instruction set used at a branch destination are the same. Also, one reference instruction set is determined. The compiling unit (110) adds a mode adjusting instruction that belongs to the reference instruction set and that is for causing a branch to an instruction placed at a branch destination and for selecting the instruction set that is originally to be selected. The mode adjusting instruction provides an alternative branch destination corresponding to an original branch destination, and the compiling unit (110) generates an indirect addressing branch instruction for causing a branch to the alternative branch destination and for selecting the reference instruction set.
摘要翻译：编译单元（110）产生不确定的分支信息，表示选择的指令集是不确定的，而不是生成分支指令。链接单元（130）通过判断在分支源使用的指令集和在分支目的地使用的指令集是否相同来生成适当的直接寻址分支指令。此外，确定一个参考指令集。编译单元（110）添加属于参考指令集的模式调整指令，其用于使分支到位于分支目的地的指令，并且用于选择最初被选择的指令集。模式调整指令提供与原始分支目的地相对应的替代分支目的地，并且编译单元（110）生成用于使分支到备选分支目的地并用于选择参考指令集的间接寻址分支指令。

8. 发明授权

US07827542B2 Compiler apparatus 有权
标题翻译：编译器
公开(公告)号：US07827542B2
公开(公告)日：2010-11-02
申请号：US11534719
申请日：2006-09-25
申请人： Hajime Ogawa , Ryoko Miyachi , Toshiyuki Sakata
发明人： Hajime Ogawa , Ryoko Miyachi , Toshiyuki Sakata
IPC分类号： G06F9/45
CPC分类号： G06F8/445
摘要： A compiler apparatus that improves the performance of loop processing. The compiler apparatus translates a C program that includes a loop into a machine language program, and includes: a movement judgment unit that judges whether or not an instruction which is positioned outside of the loop of the C program can be moved into the loop, based on a state of live ranges of variables used in the instruction; a movement execution unit that moves the instruction into the loop in the case where the movement judgment unit judges that the instruction can be moved into the loop, thereby generating an intermediate program; and a translation unit that translates the intermediate program into the machine language program.
摘要翻译：一种提高循环处理性能的编译器。编译装置将包括循环的C程序转换为机器语言程序，并且包括：移动判断单元，其基于C程序的循环以外的指令是否可以移动到循环中在指令中使用的变量的生存范围的状态; 移动执行单元，其在移动判断单元判断该指令可以移动到循环中的情况下将指令移动到循环中，从而生成中间程序; 以及将中间程序转换为机器语言程序的翻译单元。

9. 发明申请

US20080141229A1 PROCESSOR, PROGRAM CONVERSION APPARATUS, PROGRAM CONVERSION METHOD, AND COMPUTER PROGRAM 审中-公开
标题翻译：处理器，程序转换装置，程序转换方法和计算机程序
公开(公告)号：US20080141229A1
公开(公告)日：2008-06-12
申请号：US11969083
申请日：2008-01-03
申请人： Taketo Heishi , Hajime Ogawa , Shuichi Takayama , Toshiyuki Sakata , Shohei Michimoto
发明人： Taketo Heishi , Hajime Ogawa , Shuichi Takayama , Toshiyuki Sakata , Shohei Michimoto
IPC分类号： G06F9/45 , G06F9/312
CPC分类号： G06F9/30094 , G06F9/30021 , G06F9/30072
摘要： The first, second, and third operating units 441 to 443 each perform a predetermined operation according to an instruction before a point of time partway through a clock cycle. When having performed a comparison operation, each operating unit outputs a result value to the condition flag operating unit 51. The condition flag operating unit 51 calculates a new condition flag value by performing a logical operation on either (a) a value that has been read from the condition flag register 46 and the result value or (b) the result values themselves. The condition flag operating unit 51 outputs, before the clock cycle ends, the new condition flag value to one of the first, second, and third gates 451 to 453 that is related to a conditional instruction so as to control nullification of the conditional new condition flag value.
摘要翻译：第一，第二和第三操作单元441至443各自根据在时钟周期的中途的时间点之前的指令执行预定的操作。当执行比较操作时，每个操作单元将结果值输出到条件标志操作单元51。条件标志操作单元51通过对（a）从条件标志寄存器46读取的值和结果值或（b）结果值本身执行逻辑运算来计算新条件标志值。条件标志操作单元51在时钟周期结束之前将新条件标志值输出到与条件指令相关的第一，第二和第三门451至453中的一个，以便控制条件新条件的无效标志值。

10. 发明授权

US07284241B2 Compiler, compiler apparatus and compilation method 有权
标题翻译：编译器，编译器和编译方法
公开(公告)号：US07284241B2
公开(公告)日：2007-10-16
申请号：US10630705
申请日：2003-07-31
申请人： Taketo Heishi , Toshiyuki Sakata , Hajime Ogawa , Ryoko Miyachi , Shuji Miyasaka , Tomokazu Ishikawa
发明人： Taketo Heishi , Toshiyuki Sakata , Hajime Ogawa , Ryoko Miyachi , Shuji Miyasaka , Tomokazu Ishikawa
IPC分类号： G06F9/45
CPC分类号： G06F8/443 , G06F8/425 , G06F8/427 , G06F8/4441
摘要： An operator definition file 102 and the like included in a source program 101 and a compiler 100 that translates the source program 101 into a machine language program 105 are provided. The operator definition file 102 includes definitions of various fixed point type operators by class definitions. The compiler 100 can generate effectively advanced and specific instructions that a processor executes and make improvements through expanding functions and the like without repeating frequently upgrading of the version of the compiler itself. The compiler 100 is made up of an intermediate code generation unit 121 that generates intermediate codes, a machine language instruction substitution unit 122 that substitutes the intermediate codes referring to classes defined by the operator definition file 102 with machine language instructions and an optimization unit 130 that performs optimization targeting the intermediate codes including the substituted machine language instructions.
摘要翻译：提供包括在源程序101中的操作者定义文件102等以及将源程序101转换为机器语言程序105的编译器100。操作者定义文件102包括通过类定义的各种定点类型操作符的定义。编译器100可以生成有效的高级特定指令，处理器执行并通过扩展功能等进行改进，而不会重复频繁升级编译器本身的版本。编译器100由生成中间代码的中间代码生成单元121构成，机器语言指令替换单元122，其使用机器语言指令代替参考由操作者定义文件102定义的类别的中间代码和优化单元130，执行针对包括替代机器语言指令的中间代码的优化。

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