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    • 2. 发明授权
    • Audio decoder
    • 音频解码器
    • US08081764B2
    • 2011-12-20
    • US11993066
    • 2006-07-11
    • Yosiaki TakagiKok seng ChongTakeshi NorimatsuShuji MiyasakaAkihisa KawamuraKojiro Ono
    • Yosiaki TakagiKok seng ChongTakeshi NorimatsuShuji MiyasakaAkihisa KawamuraKojiro Ono
    • H04R5/00
    • G10L19/008G10L19/0204
    • Provided is an audio decoder which can reduce an amount of arithmetic operations while suppressing occurrence of aliasing noise. The audio decoder includes: a decoder (102) and an analysis filter bank (110) which generate, from a coded down-mixed signal, the first frequency band signal (x) corresponding to a down-mixed signal (M); a channel expansion unit (130) which converts the first frequency band signal (x) generated by the analysis filter bank (110) into output signals (y) corresponding to respective audio signals of N channels, using BC information; an synthesis filter bank (140) which performs band synthesis for the output signals (y) generate by the channel expansion unit (130) and thereby converts the output signals (y) into the respective audio signals of the N channels on a time axis; and an aliasing noise detection unit (120) which detects occurrence of aliasing noise in the first frequency band signal (x). The channel expansion unit (130) further prevents the aliasing noise from being included in the output signals (y), based on information detected by the aliasing noise detection unit (120).
    • 提供一种音频解码器,其可以在抑制混叠噪声的发生的同时减少算术运算量。 音频解码器包括:解码器(102)和分析滤波器组(110),其从编码的下变频信号产生与下混合信号(M)对应的第一频带信号(x); 信道扩展单元,其使用BC信息将由分析滤波器组(110)生成的第一频带信号(x)转换成对应于N个信道的各个音频信号的输出信号(y); 合成滤波器组(140),其对由所述信道扩展单元(130)生成的输出信号(y)进行频带合成,从而将输出信号(y)转换成时间轴上的N个信道的各个音频信号; 以及用于检测第一频带信号(x)中的混叠噪声的出现的混叠噪声检测单元(120)。 信道扩展单元(130)还基于混叠噪声检测单元(120)检测到的信息进一步防止混叠噪声包含在输出信号(y)中。
    • 3. 发明授权
    • Energy shaping apparatus and energy shaping method
    • 能量整形设备和能量整形方法
    • US08019614B2
    • 2011-09-13
    • US12065378
    • 2006-08-31
    • Yoshiaki TakagiKok Seng ChongTakeshi NorimatsuShuji MiyasakaAkihisa KawamuraKojiro OnoTomokazu Ishikawa
    • Yoshiaki TakagiKok Seng ChongTakeshi NorimatsuShuji MiyasakaAkihisa KawamuraKojiro OnoTomokazu Ishikawa
    • G10L19/00
    • G10L19/26G10L19/008G10L19/0204H04S2420/03
    • A temporal processing apparatus includes: a splitter splitting an audio signal, included in the sub-band domain, into diffuse signals indicating reverberating components and direct signals indicating non-reverberating components; a downmix unit generating a downmix signal by downmixing the direct signals; BPFs respectively generating a bandpass downmix signal and bandpass diffuse signals; normalization processing units respectively generating a normalized downmix signal and normalized diffuse signals; a scale computation processing unit computing, on a predetermined time slot basis, a scale factor indicating the magnitude of energy of the normalized downmix signal with respect to energy of the normalized diffuse signals; a calculating unit generating scale diffuse signals; a HPF generating high-pass diffuse signals; an adding unit generating addition signals; and a synthesis filter bank performing synthesis filter processing on the addition signals and transforming the addition signals into the time domains.
    • 时间处理装置包括:分离器,将包括在子带域中的音频信号分成指示混响分量的漫射信号和指示非混响分量的直接信号; 下混合单元,通过使直接信号下混合来产生降混信号; BPF分别产生带通下混信号和带通漫射信号; 归一化处理单元,分别产生归一化的下混信号和归一化扩散信号; 比例计算处理单元在预定时隙的基础上计算指示归一化的下混信号相对于归一化扩散信号的能量的能量的大小的比例因子; 计算单元,生成缩放漫射信号; HPF产生高通漫反射信号; 添加单元生成附加信号; 以及合成滤波器组,对加法信号执行合成滤波处理,并将加法信号转换成时域。
    • 6. 发明授权
    • Floating point number storage method and floating point arithmetic device
    • 浮点数存储方法和浮点运算器
    • US07188133B2
    • 2007-03-06
    • US10405242
    • 2003-04-03
    • Shuji MiyasakaTomokazu Ishikawa
    • Shuji MiyasakaTomokazu Ishikawa
    • G06F7/487
    • G06F7/4876G06F2207/3824
    • In order to provide a method or the like for storing floating point numbers to make it easier to manage the floating point numbers using a fixed point processor, when a real number x is represented by a*(2^n) where a mantissa is a and an exponent is n, the mantissa is stored as a fixed point number in the upper U bits of N-bit field (N≧(U+L)) and the exponent is stored as an integer in the lower L bits. For the multiplication of two real numbers represented in such a format, these two real numbers are multiplied as fixed point numbers so as to make only the upper significant bits of the multiplication result a mantissa, while these two real numbers are added as integers so as to make only the lower significant bits of the addition result an exponent. As a result, the multiplication result can be obtained in a floating point format.
    • 为了提供用于存储浮点数的方法等以使得使用固定点处理器更容易地管理浮点数,当实数x由*(2 ^ n)表示时,其中尾数为 并且指数为n,尾数作为固定点数存储在N位字段(N> =(U + L))的高U位中,并且指数作为整数存储在较低的L位中。 对于以这种格式表示的两个实数的乘法,将这两个实数乘以固定点数,以便仅使乘法结果的高有效位为尾数,而将这两个实数作为整数相加,以便 以使相加结果的较低有效位成为指数。 结果,可以以浮点格式获得乘法结果。