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    • 4. 发明授权
    • Method and apparatus to manufacture an electronic package with direct wiring pattern
    • 制造具有直接布线图案的电子封装的方法和装置
    • US06459039B1
    • 2002-10-01
    • US09597906
    • 2000-06-19
    • Raschid J. BezamaGovindarajan NatarajanRobert W. Pasco
    • Raschid J. BezamaGovindarajan NatarajanRobert W. Pasco
    • H05K102
    • H01L23/49827H01L2224/16H01L2924/00014H01L2924/01079H01L2924/15174H01L2924/15311H01L2924/3011H05K1/113H05K3/3436H05K2201/09836H05K2201/10378Y02P70/613H01L2224/0401
    • An electronic package assembly for electrical interconnection between two electronic modules having differing conductive array parameters is disclosed. The electronic package assembly includes two electronic modules, providing between the two electronic modules an interposer having a top surface and a bottom surface; a first set of conductive arrays having a first conductive array parameter on the top surface, and a second set of conductive arrays having a second conductive array parameter on the bottom surface, the second conductive array and the first conductive array having differing parameters. A plurality of conductors traverses a thickness of the interposer of the electronic package assembly, with the conductors including a conductive material optionally coated with a dielectric material, the conductors having a first end at the first conductive arrays and a second end at the second conductive arrays, whereby the conductors connecting the first and second conductive arrays therein are adapted to spatially transform the differing parameters to provide an electrical interconnection. A conductive matrix surrounds the conductors of the interposer of the electronic package assembly. The first set of conductive arrays includes the same conductive array parameters as a first electronic module and the second set of conductive arrays includes the same conductive array parameters as a second electronic module.
    • 公开了一种用于具有不同导电阵列参数的两个电子模块之间的电互连的电子封装组件。 电子封装组件包括两个电子模块,在两个电子模块之间提供具有顶表面和底表面的插入件; 具有在顶表面上具有第一导电阵列参数的第一组导电阵列和在底表面上具有第二导电阵列参数的第二组导电阵列,所述第二导电阵列和第一导电阵列具有不同的参数。 多个导体横穿电子封装组件的插入件的厚度,其中导体包括任选涂覆有电介质材料的导电材料,导体在第一导电阵列处具有第一端,在第二导电阵列处具有第二端 由此连接其中的第一和第二导电阵列的导体适于空间转换不同的参数以提供电互连。 导电矩阵围绕电子封装组件的插入件的导体。 第一组导电阵列包括与第一电子模块相同的导电阵列参数,第二组导电阵列包括与第二电子模块相同的导电阵列参数。
    • 6. 发明授权
    • Spatial transformation interposer for electronic packaging
    • 电子封装空间转换插件
    • US06332782B1
    • 2001-12-25
    • US09597919
    • 2000-06-19
    • Raschid J. BezamaGovindarajan NatarajanRobert W. Pasco
    • Raschid J. BezamaGovindarajan NatarajanRobert W. Pasco
    • H01R1200
    • H05K1/141H01L2224/16225H01L2924/15174H01L2924/15311H01R13/24H05K1/113H05K3/3436H05K3/368H05K7/1061H05K2201/049H05K2201/09836H05K2201/10378H05K2201/10734
    • An interconnect substrate structure for electrical interconnection between two electronic modules having differing conductive array parameters. The interconnect structure comprises an interposer having a top surface and a bottom surface; a first set of conductive arrays having a first conductive array parameter on the top surface, and a second set of conductive arrays having a second conductive array parameter on the bottom surface, the second conductive array and the first conductive array having differing parameters. A plurality of conductors traverses a thickness of the interposer, with the conductors comprising a conductive material optionally coated with a dielectric material, the conductors having a first end at the first conductive arrays and a second end at the second conductive arrays, whereby the conductors connecting the first and second conductive arrays therein are adapted to spatially transform the differing parameters to provide an electrical interconnection. A conductive matrix surrounds the conductors. The first set of conductive arrays comprise the same conductive array parameters as a first electronic module and the second set of conductive arrays comprise the same conductive array parameters as a second electronic module.
    • 一种互连衬底结构,用于具有不同导电阵列参数的两个电子模块之间的电互连。 互连结构包括具有顶表面和底表面的插入件; 具有在顶表面上具有第一导电阵列参数的第一组导电阵列和在底表面上具有第二导电阵列参数的第二组导电阵列,所述第二导电阵列和第一导电阵列具有不同的参数。 多个导体横穿插入件的厚度,导体包括任选地涂覆有电介质材料的导电材料,导体在第一导电阵列处具有第一端,在第二导电阵列处具有第二端,由此导体连接 其中的第一和第二导电阵列适于空间转换不同的参数以提供电互连。 导电矩阵围绕导体。 第一组导电阵列包括与第一电子模块相同的导电阵列参数,并且第二组导电阵列包括与第二电子模块相同的导电阵列参数。
    • 10. 发明授权
    • Ceramic structure using a support sheet
    • 陶瓷结构使用支撑片
    • US06726984B2
    • 2004-04-27
    • US10403239
    • 2003-03-28
    • Govindarajan NatarajanJohn U. KnickerbockerRobert W. Pasco
    • Govindarajan NatarajanJohn U. KnickerbockerRobert W. Pasco
    • B32B300
    • H01L21/486H05K1/0306H05K3/4061H05K3/4614H05K3/4629H05K2201/09581H05K2203/0152H05K2203/0156Y10T29/49126Y10T156/1057Y10T428/24917Y10T428/24926
    • The present invention relates generally to a new ceramic structure and process thereof. Basically, the present invention relates to a structure and method for forming laminated structures and more particularly to a structure and method for fabricating multi-layer ceramic products using very thin green sheets and/or green sheets with very dense electrically conductive patterns on top of a stronger support sheet. The structure and method of the present invention enables the screening, stacking and handling of very thin green sheets and/or green sheets with very dense metallized patterns in the manufacture of multi-layer ceramic packages. The thin green sheets were tacked/bonded to thicker and stronger support sheets to form a sub-structure which had excellent stability in screening and enabled further processing. The sheets are anchored or pinned in such a way as to allow the processing of the green sheet with the subsequent easy removal of the support sheet.
    • 本发明一般涉及一种新的陶瓷结构及其工艺。 基本上,本发明涉及一种用于形成层压结构的结构和方法,更具体地涉及一种使用非常薄的生坯片和/或具有非常致密导电图案的生片在多层陶瓷产品的顶部制造多层陶瓷产品的结构和方法 更强的支撑板。 本发明的结构和方法能够在多层陶瓷封装的制造中筛选,堆叠和处理非常薄的生片和/或具有非常密集金属化图案的生片。 薄的生片被粘合到较厚和更坚固的支撑片上以形成在筛选中具有优异稳定性并能够进一步加工的亚结构。 这些片材以这样的方式锚定或固定,以便随后可以容易地移除支撑片材来处理生片。