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1. 发明授权

US06376158B1 Methods for selectively filling apertures 失效
标题翻译：选择性填充孔径的方法
公开(公告)号：US06376158B1
公开(公告)日：2002-04-23
申请号：US09484671
申请日：2000-01-18
申请人： Gerald Walter Jones , Heike Marcello , Kostas Papathomas
发明人： Gerald Walter Jones , Heike Marcello , Kostas Papathomas
IPC分类号： G03F700
CPC分类号： H01L21/486 , H05K3/0082 , H05K3/0094 , H05K2201/0959 , H05K2203/0278
摘要： A novel method of filling apertures in substrates, such as through holes, is provided. The method utilizes a phtoimageable film, and comprises the following steps: applying a photoimagable, hole fill film over the apertures, preferably having a solvent content of 7-18%; reflowing the hole fill film to flow into the apertures; exposing the hole fill film to actinic radiation, preferably ultraviolet light, through a phototool, which preferably has openings slightly larger than the diameter of the apertures; then at least partially curing the hole fill film; and developing the hole fill film to remove the unexposed hole fill film. Thus, the apertures may be selectively filled. After the apertures are filled, the hole fill film is cured. Thereafter, the substrate may be subjected to further processing steps, for example, nubs of cured hole fill film can be removed. If desired, the substrate is circuitized and overplated with gold.
摘要翻译：提供了一种在诸如通孔的基板中填充孔的新方法。该方法利用可成像的薄膜，并且包括以下步骤：在光孔上施加可光成像的孔填充薄膜，优选具有7-18％的溶剂含量; 回填孔填充膜流入孔中; 将孔填充膜暴露于通过光学工具的光化辐射，优选紫外光，其优选具有比孔的直径稍大的开口; 然后至少部分固化孔填充膜; 并开发孔填充膜以去除未曝光的孔填充膜。因此，可以选择性地填充孔。填充孔后，孔填充膜固化。此后，可以对基板进行进一步的加工步骤，例如，可以去除固化的孔填充膜的凸点。如果需要，衬底被电路化并用金过镀。

2. 发明授权

US06066889A Methods of selectively filling apertures 失效
公开(公告)号：US06066889A
公开(公告)日：2000-05-23
申请号：US158811
申请日：1998-09-22
申请人： Gerald Walter Jones , Heike Marcello , Kostas Papathomas
发明人： Gerald Walter Jones , Heike Marcello , Kostas Papathomas
IPC分类号： H01L21/48 , H05K3/00 , H01L23/04
CPC分类号： H01L21/486 , H05K3/0094 , H05K2201/0959 , H05K2203/0278 , H05K3/0082
摘要： A novel method of filling apertures in substrates, such as through holes, is provided. The method utilizes a photoimageable film, and comprises the following steps: applying a photoimagable, hole fill film over the apertures; reflowing the hole fill film to flow into the apertures; exposing the hole fill film to actinic radiation, preferably ultraviolet light, through a phototool, which preferably has openings slightly larger than the diameter of the apertures; then at least partially curing the hole fill film; and developing the hole fill film to remove the unexposed hole fill film. An advantage of the present method is that the apertures may be selectively filled. After the apertures are filled, the hole fill film is cured, preferably by baking. Thereafter, the substrate is preferably subjected to further processing steps; for example, nubs of cured hole fill film are preferably removed. If desired, the substrate is circuitized. If desired, features are gold plated, such as for example, electrolessly gold plated. The hole fill film preferably has solids which comprise 0 to about 20% of a thixotrope and about 80% to about 100% parts of an epoxy resin system; the epoxy resin system comprises: from about 10% to about 80% of phenoxy polyol resin which is the condensation product of epichlorohydrin and bisphenol A, having a molecular weight of from about 40,000 to about 130,000; from about 20% to about 90% of an epoxidized multifunctional bisphenol A formaldehyde novolac resin having a molecular weight of from about 4,000 to about 10,000; from about 35% to about 50% of a diglycidyl ether of bisphenol A, preferably halogenated, and having a molecular weight of from about 600 to about 2,500; and from about 0.1 to about 15 parts by weight of the total resin weight, a cationic photoinitiator. The invention also relates to circuitized structures produced according to the method.

3. 发明授权

US6025057A Organic electronic package and method of applying palladium-tin seed layer thereto 失效
标题翻译：有机电子封装及其中施加钯 - 锡种子层的方法
公开(公告)号：US6025057A
公开(公告)日：2000-02-15
申请号：US992700
申请日：1997-12-17
申请人： Anastasios Peter Angelopoulos , Gerald Walter Jones , Richard William Malek , Heike Marcello , Jeffrey McKeveny
发明人： Anastasios Peter Angelopoulos , Gerald Walter Jones , Richard William Malek , Heike Marcello , Jeffrey McKeveny
IPC分类号： H05K3/00 , H05K3/18 , H05K3/46 , B32B9/00
CPC分类号： H05K3/4661 , H05K3/0023 , H05K3/184 , Y10S428/901 , Y10T428/24917
摘要： A method of fabricating an electronic package having an organic substrate. The substrate is formed of fiberglass and epoxy. In order to additively circuitize the electronic package substrate, an organic polyelectrolyte is deposited onto the organic substrate. A colloidal palladium-tin seed layer is deposited atop the organic polyelectrolyte. This is followed by depositing a photoimageable polymer atop the seed layer, and photolithographically patterning the photoimageable polymer to uncover portions of the seed. layer. The uncovered portions of the seed layer are catalytic to the electroless deposition of copper. In this way a conductive layer of copper is deposited atop the uncovered seed layer. The organic polyelectrolyte is deposited from an aqueous solution at the pH appropriate for the desired seed catalyst coating, depending on the ionizable character of the particular polyelectrolyte employed.
摘要翻译：一种制造具有有机基板的电子封装的方法。基材由玻璃纤维和环氧树脂制成。为了对电子封装基板进行相加电路化，将有机聚电解质沉积在有机基底上。在有机聚电解质的顶部沉积胶态钯 - 锡种子层。随后在种子层顶上沉积可光成像的聚合物，并光刻地图案化可光成象聚合物以露出种子的部分。层。种子层的未覆盖部分催化铜的无电沉积。以这种方式，铜的导电层沉积在未覆盖的种子层顶上。根据所使用的特定聚电解质的电离特性，有机聚电解质以适合于所需种子催化剂涂层的pH从水溶液中沉积。

4. 发明授权

US5866237A Organic electronic package and method of applying palladium-tin seed layer thereto 失效
标题翻译：有机电子封装及其中施加钯 - 锡种子层的方法
公开(公告)号：US5866237A
公开(公告)日：1999-02-02
申请号：US702346
申请日：1996-08-23
申请人： Anastasios Peter Angelopoulos , Gerald Walter Jones , Richard William Malek , Heike Marcello , Jeffrey McKeveny
发明人： Anastasios Peter Angelopoulos , Gerald Walter Jones , Richard William Malek , Heike Marcello , Jeffrey McKeveny
IPC分类号： C08L63/04 , H01L23/14 , H05K3/18 , B32B3/00
CPC分类号： H05K3/184 , Y10T428/24917
摘要： A method of fabricating an electronic package having an organic substrate. The substrate is formed of fiberglass and epoxy. In order to additively circuitize the electronic package substrate, an organic polyelectrolyte is deposited onto the organic substrate. A colloidal palladium-tin seed layer is deposited atop the organic polyelectrolyte. This is followed by depositing a photoimagable polymer atop the seed layer, and photolithographically patterning the photoimagable polymer to uncover portions of the seed layer. The uncovered portions of the seed layer are catalytic to the electroless deposition of copper. In this way a conductive layer of copper is deposited atop the uncovered seed layer. The organic polyelectrolyte is deposited from an aqueous solution at the pH appropriate for the desired seed catalyst coating, depending on the ionizable character of the particular polyelectrolyte employed.
摘要翻译：一种制造具有有机基板的电子封装的方法。基材由玻璃纤维和环氧树脂制成。为了对电子封装基板进行相加电路化，将有机聚电解质沉积在有机基底上。在有机聚电解质的顶部沉积胶态钯 - 锡种子层。随后在种子层顶上沉积可光成像的聚合物，并光刻地图案化光可光聚合物以露出种子层的部分。种子层的未覆盖部分催化铜的无电沉积。以这种方式，铜的导电层沉积在未覆盖的种子层顶上。根据所使用的特定聚电解质的电离特性，有机聚电解质以适合于所需种子催化剂涂层的pH从水溶液中沉积。

5. 发明授权

US06680440B1 Circuitized structures produced by the methods of electroless plating 失效
标题翻译：通过无电镀方法生产的电路结构
公开(公告)号：US06680440B1
公开(公告)日：2004-01-20
申请号：US09027856
申请日：1998-02-23
申请人： David John Russell , Gerald Walter Jones , Heike Marcello , Voya Rista Markovich
发明人： David John Russell , Gerald Walter Jones , Heike Marcello , Voya Rista Markovich
IPC分类号： H05K116
CPC分类号： H05K3/287 , G03F7/0385 , H05K3/0023 , H05K3/184 , H05K3/243 , H05K2203/072
摘要： The present invention provides new methods for electroless plating of metal particularly gold and copper onto substrates, such as circuitized substrates, which reduces processing steps, reduces metal consumption, and reduces the scraping of parts due to contamination. The method employs a permanent plating resist. The method for electrolessly plating metal onto a substrate, including the following steps: providing: an uncured, photoimagable, dielectric permanent plating resist comprising: from about 10 to 80% of phenoxy polyol resin which is the condensation product of epichlorohydrin and bisphenol A, having a molecular weight of from about 40,000 to 130,000; from about 20 to 90% of an epoxidized multifunctional bisphenol A formaldehyde novolac resin having a molecular weight of from about 4,000 to 10,000; from 0 to 50% of a diglycidyl ether of bisphenol A having a molecular weight of from about 600 to 2,500; and from about 0.1 to 15 parts by weight of the total resin weight, a cationic photoinitiator; applying the permanent plating resist on the substrate; photopatterning the permanent plating resist to form apertures therein which expose areas of the substrate; and electrolessly plating metal onto the exposed areas of the substrate. The permanent plating resist is useful to protect the substrate areas including for example metallized features on the substrate, from the electroless deposition of metal during electroless plating; thus selective plating of metal is achieved. The permanent plating resist is not degraded by conventional gold or copper electroless baths. The invention also relates to circuitized structures produced by the methods of electroless plating.
摘要翻译：本发明提供了金属特别是金和铜在电路化基板等基板上进行化学镀的新方法，其减少了加工步骤，降低了金属消耗，并减少了由于污染引起的部件刮擦。该方法采用永久电镀抗蚀剂。将金属无电镀在基板上的方法，包括以下步骤：提供：未固化的，可光成像的绝缘永久电镀抗蚀剂，其包含：约10至80％的作为表氯醇和双酚A的缩合产物的苯氧基多元醇树脂，其具有分子量为约40,000至130,000; 约20至90％的分子量为约4,000至10,000的环氧化多官能双酚A甲醛酚醛清漆树脂; 0至50％的分子量为约600至2,500的双酚A的二缩水甘油醚; 和约0.1至15重量份的总树脂重量，阳离子光引发剂; 在基板上施加永久电镀抗蚀剂; 对永久电镀抗蚀剂进行光图案化以在其中形成露出基板的区域的孔; 并将金属化学镀在衬底的暴露区域上。永久电镀抗蚀剂可用于保护衬底区域，包括例如基板上的金属化特征，在化学镀期间的金属化学沉积; 从而实现了金属的选择性镀覆。永久电镀抗蚀剂不会被常规的金或铜无电镀浴降解。本发明还涉及通过化学镀方法制造的电路结构。

6. 发明授权

US06528218B1 Method of fabricating circuitized structures 失效
标题翻译：制造电路结构的方法
公开(公告)号：US06528218B1
公开(公告)日：2003-03-04
申请号：US09808334
申请日：2001-03-14
申请人： Elizabeth Foster , Gary A. Johansson , Heike Marcello , David J. Russell
发明人： Elizabeth Foster , Gary A. Johansson , Heike Marcello , David J. Russell
IPC分类号： G03F711
CPC分类号： G03F7/0385 , G03F7/038 , H05K3/0023 , H05K3/4644 , H05K3/4676 , Y10T428/24851
摘要： A method for fabricating circuitized substrates which reduces shorts, and does not require baking and resulting film. The method employs a photoimageable dielectric film, having a solvent content less than about 5%, and a glass transition temperature, when cured, which is greater than about 110° C. A photoimageable dielectric film is provided having from about 95% to about 100% solids, and comprising: from 0% to about 30% of the solids, of a particulate rheology modifier; from about 70% to about 100% of the solids of an epoxy resin system (liquid at 20° C.) comprising: from about 85% to about 99.9% epoxy resins; and from about 0.1 to 15 parts of the total resin weight, a cationic photoinitiator; from 0 to about 5% solvent; applying the photoimageable dielectric film to a circuitized substrate; and exposing the film to actinic radiation.
摘要翻译：一种制造电路化基板的方法，其减少短路，并且不需要烘烤和得到的膜。该方法使用溶剂含量小于约5％的光致成像电介质膜，当固化时玻璃化转变温度大于约110℃。提供具有约95％至约100的光致成像电介质膜％固体，并且包含：0％至约30％的固体，颗粒状流变改性剂; 约70％至约100％的环氧树脂体系的固体（20℃的液体），包含：约85％至约99.9％的环氧树脂; 和约0.1至15份的总树脂重量，阳离子光引发剂; 0至约5％的溶剂; 将光致成像电介质膜施加到电路化基板上; 并将膜暴露于光化辐射。

7. 发明授权

US06195264B1 Laminate substrate having joining layer of photoimageable material 失效
标题翻译：具有可光成像材料接合层的层叠基板
公开(公告)号：US06195264B1
公开(公告)日：2001-02-27
申请号：US09195389
申请日：1998-11-18
申请人： John M. Lauffer , Heike Marcello , David J. Russell
发明人： John M. Lauffer , Heike Marcello , David J. Russell
IPC分类号： H05K118
CPC分类号： H05K3/0061 , H01L21/4803 , H01L23/36 , H01L2924/0002 , H05K1/183 , H05K3/0023 , H05K3/386 , Y10T29/49126 , Y10T29/4913 , Y10T29/49131 , Y10T29/49144 , Y10T29/49155 , Y10T29/53178 , Y10T156/1798 , H01L2924/00
摘要： A cavity-type chip module. The module is formed with an adhesive joining layer of photoimageable material interposed between a metal stiffener and a laminate top layer with a central aperture defined in the top layer. The photoimageable material is exposed to actinic radiation, except for an area corresponding to the aperture in the top layer. The unexposed area of photoimageable material is developed away to form a window in the joining layer. The top layer, joining layer, and stiffener are laminated together with the window and aperture aligned, and with a portion of the stiffener spanning the aperture to define a cavity in the resulting substrate. The removal of the unexposed photoimageable material, and the selective exposure of the joining layer to actinic radiation, keep the cavity free of photoimageable material and inhibit bleeding of the photoimageable material into the cavity from its inner edge. As a result, a semiconductor component can be flush mounted in the cavity with optimal thermal conductivity to the metal stiffener.
摘要翻译：腔型芯片模块。该模块形成有介于金属加强件和层压顶层之间的可光成像材料的粘合剂接合层，中间孔限定在顶层中。光致成像材料暴露于光化辐射，除了对应于顶层中的孔的区域外。可光成像材料的未曝光区域被开发出来以在接合层中形成窗口。将顶层，接合层和加强件层压在一起，窗口和孔对齐，并且加强件的一部分跨越孔以在所得到的基底中限定空腔。未曝光的可光成像材料的去除以及将接合层选择性地暴露于光化辐射，保持空腔不含可光成像的材料并且抑制可光成像材料从其内边缘渗入空腔。结果，半导体部件可以齐平地安装在空腔中，对金属加强件具有最佳的导热性。

8. 发明授权

US06835533B2 Photoimageable dielectric epoxy resin system film 失效
标题翻译：可光成像介电环氧树脂体系膜
公开(公告)号：US06835533B2
公开(公告)日：2004-12-28
申请号：US10781073
申请日：2004-02-18
申请人： Elizabeth Foster , Gary A. Johansson , Heike Marcello , David J. Russell
发明人： Elizabeth Foster , Gary A. Johansson , Heike Marcello , David J. Russell
IPC分类号： G03F7038
CPC分类号： G03F7/0385 , G03F7/038 , H05K3/0023 , H05K3/4644 , H05K3/4676 , Y10T428/24851
摘要： A method for fabricating circuitized substrates which reduces shorts, and does not require baking and resulting film. The method employs a photoimageable dielectric film, having a solvent content less than about 5%, and a glass transition temperature, when cured, which is greater than about 110° C. A photoimageable dielectric film is provided having from about 95% to about 100% solids, and comprising: from 0% to about 30% of the solids, of a particulate rheology modifier; from about 70% to about 100% of the solids of an epoxy resin system (liquid at 20° C.) comprising: from about 85% to about 99.9% epoxy resins; and from about 0.1 to 15 parts of the total resin weight, a cationic photoinitiator; from 0% to about 5% solvent; applying the photoimageable dielectric film to a circuitized substrate; and exposing the film to actinic radiation.
摘要翻译：一种制造电路化基板的方法，其减少短路，并且不需要烘烤和得到的膜。该方法使用溶剂含量小于约5％的光致成像电介质膜，当固化时玻璃化转变温度大于约110℃。提供具有约95％至约100的光致成像电介质膜％固体，并且包含：0％至约30％的固体，颗粒状流变改性剂; 约70％至约100％的环氧树脂体系的固体（20℃的液体），包含：约85％至约99.9％的环氧树脂; 和约0.1至15份的总树脂重量，阳离子光引发剂; 0％至约5％的溶剂; 将光致成像电介质膜施加到电路化基板上; 并将膜暴露于光化辐射。

9. 发明授权

US06706464B2 Method of fabricating circuitized structures 失效
标题翻译：制造电路结构的方法
公开(公告)号：US06706464B2
公开(公告)日：2004-03-16
申请号：US10345561
申请日：2003-01-16
申请人： Elizabeth Foster , Gary A. Johansson , Heike Marcello , David J. Russell
发明人： Elizabeth Foster , Gary A. Johansson , Heike Marcello , David J. Russell
IPC分类号： G03F740
CPC分类号： G03F7/0385 , G03F7/038 , H05K3/0023 , H05K3/4644 , H05K3/4676 , Y10T428/24851
摘要： A method for fabricating circuitized substrates which reduces shorts, and does not require baking and resulting film. The method employs a photoimageable dielectric film, having a solvent content less than about 5%, and a glass transition temperature, when cured, which is greater than about 110° C. A photoimageable dielectric film, is provided having from about 95% to about 100% solids, and comprising: from 0% to about 30% of the solids, of a particulate rheology modifier, from about 70% to about 100% of the solids of an epoxy resin system (liquid at 20° C. comprising: from about 85% to about 99.9% epoxy resins; and from about 0.1 to 15 parts of the total resin weight, a cationic photoinitiator; from 0 to about 5% solvent, applying the photoimageable dielectric film to a circuitized substrate; and exposing the film to actinic radiation.
摘要翻译：一种制造电路化基板的方法，其减少短路，并且不需要烘烤和得到的膜。该方法采用溶剂含量小于约5％的光致成像电介质膜，当固化时玻璃化转变温度大于约110℃。提供了可见光电介质膜，其具有约95％至约 100％固体，并且包含：固体的0％至约30％的颗粒状流变改性剂，约70％至约100％的环氧树脂体系的固体（液体在20℃，包括：来自约85％至约99.9％的环氧树脂;和约0.1至15份的总树脂重量，阳离子光引发剂; 0至约5％的溶剂，将可光成像的电介质膜施加到电路化基板;以及将膜暴露于光化辐射。

10. 发明授权

US06519843B2 Method of forming a chip carrier by joining a laminate layer and stiffener 失效
标题翻译：通过接合层压层和加强件形成芯片载体的方法
公开(公告)号：US06519843B2
公开(公告)日：2003-02-18
申请号：US09772418
申请日：2001-01-30
申请人： John M. Lauffer , Heike Marcello , David J. Russell
发明人： John M. Lauffer , Heike Marcello , David J. Russell
IPC分类号： H05K334
CPC分类号： H05K3/0061 , H01L21/4803 , H01L23/36 , H01L2924/0002 , H05K1/183 , H05K3/0023 , H05K3/386 , Y10T29/49126 , Y10T29/4913 , Y10T29/49131 , Y10T29/49144 , Y10T29/49155 , Y10T29/53178 , Y10T156/1798 , H01L2924/00
摘要： A cavity-type chip module. The module is formed with an adhesive joining layer of photoimageable material interposed between a metal stiffener and a laminate top layer with a central aperture defined in the top layer. The photoimageable material is exposed to actinic radiation, except for an area corresponding to the aperture in the top layer. The unexposed area of photoimageable material is developed away to form a window in the joining layer. The top layer, joining layer, and stiffener are laminated together with the window and aperture aligned, and with a portion of the stiffener spanning the aperture to define a cavity in the resulting substrate. The removal of the unexposed photoimageable material, and the selective exposure of the joining layer to actinic radiation, keep the cavity free of photoimageable material and inhibit bleeding of the photoimageable material into the cavity from its inner edge. As a result, a semiconductor component can be flush mounted in the cavity with optimal thermal conductivity to the metal stiffener.
摘要翻译：腔型芯片模块。该模块形成有介于金属加强件和层压顶层之间的可光成像材料的粘合剂接合层，中间孔限定在顶层中。可光成像材料暴露于光化辐射，除了与顶层中的孔相对应的区域之外。可光成像材料的未曝光区域被开发出来以在接合层中形成窗口。将顶层，接合层和加强件层压在一起，窗口和孔对齐，并且加强件的一部分跨越孔以在所得到的基底中限定空腔。未曝光的可光成像材料的去除以及将接合层选择性地暴露于光化辐射，保持空腔不含可光成像的材料并且抑制可光成像材料从其内边缘渗入空腔。结果，半导体部件可以齐平地安装在空腔中，对金属加强件具有最佳的导热性。

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