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1. 发明申请

US20120146133A1 Method for Producing a Semiconductor Component with Insulated Semiconductor Mesas 有权
标题翻译：用半导体绝缘体制造半导体元件的方法
公开(公告)号：US20120146133A1
公开(公告)日：2012-06-14
申请号：US13288271
申请日：2011-11-03
申请人： Franz Hirler , Anton Mauder , Hermann Gruber , Hubert Rothleitner , Andreas Peter Melser
发明人： Franz Hirler , Anton Mauder , Hermann Gruber , Hubert Rothleitner , Andreas Peter Melser
IPC分类号： H01L29/78 , H01L21/28
CPC分类号： H01L29/407 , H01L21/76224 , H01L21/76898 , H01L21/823481 , H01L23/481 , H01L24/16 , H01L27/088 , H01L29/0653 , H01L29/401 , H01L29/402 , H01L29/408 , H01L29/41741 , H01L29/42372 , H01L29/4238 , H01L29/456 , H01L29/66734 , H01L29/7397 , H01L29/7803 , H01L29/7804 , H01L29/7808 , H01L29/7811 , H01L29/7813 , H01L2224/16245 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01068 , H01L2924/01074 , H01L2924/12035 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/00
摘要： A method for producing a semiconductor component is provided. The method includes providing a semiconductor body with a first surface and a second surface opposite to the first surface, etching an insulation trench from the first surface partially into the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, processing the second surface by at least one of grinding, polishing and a CMP-process to expose the first insulation layer, and depositing on the processed second surface a second insulation layer which extends to the first insulation layer.
摘要翻译：提供一种半导体元件的制造方法。该方法包括：提供具有与第一表面相对的第一表面和第二表面的半导体本体，将绝缘沟槽从第一表面部分地蚀刻到半导体本体中，在绝缘沟槽的一个或多个侧壁上形成第一绝缘层，通过研磨，抛光和CMP工艺中的至少一个来处理第二表面以暴露第一绝缘层，以及在经处理的第二表面上沉积延伸到第一绝缘层的第二绝缘层。

2. 发明授权

US09396997B2 Method for producing a semiconductor component with insulated semiconductor mesas 有权
标题翻译：用绝缘半导体台面制造半导体部件的方法
公开(公告)号：US09396997B2
公开(公告)日：2016-07-19
申请号：US13288271
申请日：2011-11-03
申请人： Franz Hirler , Anton Mauder , Hermann Gruber , Hubert Rothleitner , Andreas Peter Meiser
发明人： Franz Hirler , Anton Mauder , Hermann Gruber , Hubert Rothleitner , Andreas Peter Meiser
IPC分类号： H01L21/76 , H01L21/768 , H01L23/48 , H01L29/06 , H01L29/423 , H01L29/739 , H01L29/78 , H01L21/762 , H01L21/8234 , H01L23/00 , H01L27/088 , H01L29/40 , H01L29/417 , H01L29/45 , H01L29/66
CPC分类号： H01L29/407 , H01L21/76224 , H01L21/76898 , H01L21/823481 , H01L23/481 , H01L24/16 , H01L27/088 , H01L29/0653 , H01L29/401 , H01L29/402 , H01L29/408 , H01L29/41741 , H01L29/42372 , H01L29/4238 , H01L29/456 , H01L29/66734 , H01L29/7397 , H01L29/7803 , H01L29/7804 , H01L29/7808 , H01L29/7811 , H01L29/7813 , H01L2224/16245 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01068 , H01L2924/01074 , H01L2924/12035 , H01L2924/12036 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/00
摘要： A method for producing a semiconductor component is provided. The method includes providing a semiconductor body with a first surface and a second surface opposite to the first surface, etching an insulation trench from the first surface partially into the semiconductor body, forming a first insulation layer on one or more sidewalls of the insulation trench, processing the second surface by at least one of grinding, polishing and a CMP-process to expose the first insulation layer, and depositing on the processed second surface a second insulation layer which extends to the first insulation layer.
摘要翻译：提供一种半导体元件的制造方法。该方法包括：提供具有与第一表面相对的第一表面和第二表面的半导体本体，将绝缘沟槽从第一表面部分地蚀刻到半导体本体中，在绝缘沟槽的一个或多个侧壁上形成第一绝缘层，通过研磨，抛光和CMP工艺中的至少一个来处理第二表面以暴露第一绝缘层，以及在经处理的第二表面上沉积延伸到第一绝缘层的第二绝缘层。

3. 发明授权

US08404562B2 Method for manufacturing a composite wafer having a graphite core, and composite wafer having a graphite core 有权
标题翻译：具有石墨芯的复合晶片的制造方法以及具有石墨芯的复合晶片
公开(公告)号：US08404562B2
公开(公告)日：2013-03-26
申请号：US12894344
申请日：2010-09-30
申请人： Rudolf Berger , Hermann Gruber , Wolfgang Lehnert , Guenther Ruhl , Raimund Foerg , Anton Mauder , Hans-Joachim Schulze
发明人： Rudolf Berger , Hermann Gruber , Wolfgang Lehnert , Guenther Ruhl , Raimund Foerg , Anton Mauder , Hans-Joachim Schulze
IPC分类号： H01L21/322 , H01L21/00 , H01L21/31
CPC分类号： H01L21/76251 , H01L21/02002 , H01L21/0237 , H01L21/0243 , H01L21/02527 , H01L21/02601 , H01L21/02628 , H01L21/7624 , H01L29/02 , H01L29/04 , H01L29/16 , H01L29/1608 , H01L29/161
摘要： According to an embodiment, a composite wafer includes a carrier substrate having a graphite core and a monocrystalline semiconductor layer attached to the carrier substrate.
摘要翻译：根据实施例，复合晶片包括具有石墨芯和附着到载体衬底的单晶半导体层的载体衬底。

4. 发明申请

US20120083098A1 Method for Manufacturing a Composite Wafer Having a Graphite Core, and Composite Wafer Having a Graphite Core 有权
标题翻译：制造具有石墨芯的复合晶片的方法和具有石墨芯的复合晶片
公开(公告)号：US20120083098A1
公开(公告)日：2012-04-05
申请号：US13206029
申请日：2011-08-09
申请人： Rudolf Berger , Hermann Gruber , Wolfgang Lehnert , Guenther Ruhl , Raimund Foerg , Anton Mauder , Hans-Joachim Schulze , Karsten Kellermann , Michael Sommer , Christian Rottmair , Roland Rupp
发明人： Rudolf Berger , Hermann Gruber , Wolfgang Lehnert , Guenther Ruhl , Raimund Foerg , Anton Mauder , Hans-Joachim Schulze , Karsten Kellermann , Michael Sommer , Christian Rottmair , Roland Rupp
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , C30B25/186 , H01L21/02115 , H01L21/02282 , H01L21/02598 , H01L21/2007 , H01L21/265 , H01L21/3212 , H01L21/324 , H01L21/76251 , H01L29/1608 , H01L29/20 , H01L29/2003
摘要： According to an embodiment, a composite wafer includes a carrier substrate having a graphite layer and a monocrystalline semiconductor layer attached to the carrier substrate.
摘要翻译：根据实施例，复合晶片包括具有石墨层和附着到载体衬底的单晶半导体层的载体衬底。

5. 发明申请

US20120080690A1 Method for Manufacturing a Composite Wafer Having a Graphite Core, and Composite Wafer Having a Graphite Core 有权
标题翻译：制造具有石墨芯的复合晶片的方法和具有石墨芯的复合晶片
公开(公告)号：US20120080690A1
公开(公告)日：2012-04-05
申请号：US12894344
申请日：2010-09-30
申请人： Rudolf Berger , Hermann Gruber , Wolfgang Lehnert , Guenther Ruhl , Raimund Foerg , Anton Mauder , Hans-Joachim Schulze
发明人： Rudolf Berger , Hermann Gruber , Wolfgang Lehnert , Guenther Ruhl , Raimund Foerg , Anton Mauder , Hans-Joachim Schulze
IPC分类号： H01L29/24 , H01L21/30 , H01L29/02 , H01L21/20
CPC分类号： H01L21/76251 , H01L21/02002 , H01L21/0237 , H01L21/0243 , H01L21/02527 , H01L21/02601 , H01L21/02628 , H01L21/7624 , H01L29/02 , H01L29/04 , H01L29/16 , H01L29/1608 , H01L29/161
摘要： According to an embodiment, a composite wafer includes a carrier substrate having a graphite core and a monocrystalline semiconductor layer attached to the carrier substrate.
摘要翻译：根据实施例，复合晶片包括具有石墨芯和附着到载体衬底的单晶半导体层的载体衬底。

6. 发明授权

US08822306B2 Method for manufacturing a composite wafer having a graphite core, and composite wafer having a graphite core 有权
标题翻译：具有石墨芯的复合晶片的制造方法以及具有石墨芯的复合晶片
公开(公告)号：US08822306B2
公开(公告)日：2014-09-02
申请号：US13206029
申请日：2011-08-09
申请人： Rudolf Berger , Hermann Gruber , Wolfgang Lehnert , Guenther Ruhl , Raimund Foerg , Anton Mauder , Hans-Joachim Schulze , Karsten Kellermann , Michael Sommer , Christian Rottmair , Roland Rupp
发明人： Rudolf Berger , Hermann Gruber , Wolfgang Lehnert , Guenther Ruhl , Raimund Foerg , Anton Mauder , Hans-Joachim Schulze , Karsten Kellermann , Michael Sommer , Christian Rottmair , Roland Rupp
IPC分类号： H01L21/30
CPC分类号： H01L21/76254 , C30B25/186 , H01L21/02115 , H01L21/02282 , H01L21/02598 , H01L21/2007 , H01L21/265 , H01L21/3212 , H01L21/324 , H01L21/76251 , H01L29/1608 , H01L29/20 , H01L29/2003
摘要： According to an embodiment, a composite wafer includes a carrier substrate having a graphite layer and a monocrystalline semiconductor layer attached to the carrier substrate.
摘要翻译：根据实施例，复合晶片包括具有石墨层和附着到载体衬底的单晶半导体层的载体衬底。

7. 发明授权

US09079449B2 Device for storing collectibles 有权
标题翻译：用于存储收藏品的装置
公开(公告)号：US09079449B2
公开(公告)日：2015-07-14
申请号：US13389639
申请日：2010-08-09
申请人： Hermann Gruber
发明人： Hermann Gruber
IPC分类号： B65D21/032 , B42F7/14
CPC分类号： B42F7/14
摘要： A device for storing collectibles, including a base unit having a first receiving region that receives a first object and a second receiving region that receives a collectibles storage unit. The base unit has a connecting wall connecting the first and second side walls, and two receiving elements for mounting the storage unit. The first receiving region is delimited by the first side wall, the second side wall and the connecting wall. The second receiving region, open on at least one side and separated from the first receiving region by the connecting wall, is delimited by the first receiving element, the second receiving element and the connecting wall. The storage unit includes at least two segments connectable to and separable from each other, wherein each segment has a receiving region for receiving at least one collectible and wherein at least a partial region of each segment is transparent.
摘要翻译：一种用于存储收藏品的装置，包括具有接收第一物体的第一接收区域的基本单元和接收收藏品存储单元的第二接收区域。基座单元具有连接第一和第二侧壁的连接壁和用于安装存储单元的两个接收元件。第一接收区域由第一侧壁，第二侧壁和连接壁限定。在第一接收元件，第二接收元件和连接壁上限定第二接收区域，该第二接收区域在至少一个侧面上被连接壁与第一接收区域分开。存储单元包括至少两个可彼此连接并可彼此分离的段，其中每个段具有用于接收至少一个可收集物的接收区域，并且其中每个段的至少一部分区域是透明的。

8. 发明授权

US08866274B2 Semiconductor packages and methods of formation thereof 有权
标题翻译：半导体封装及其形成方法
公开(公告)号：US08866274B2
公开(公告)日：2014-10-21
申请号：US13431251
申请日：2012-03-27
申请人： Hermann Gruber , Joachim Mahler , Uwe Hoeckele , Anton Prueckl , Thomas Fischer , Matthias Schmidt
发明人： Hermann Gruber , Joachim Mahler , Uwe Hoeckele , Anton Prueckl , Thomas Fischer , Matthias Schmidt
IPC分类号： H01L23/495 , H01L21/00 , H01L23/31
CPC分类号： H01L23/3114 , H01L21/561 , H01L23/291 , H01L23/3107 , H01L23/3135 , H01L23/3185 , H01L23/49513 , H01L23/49524 , H01L23/49541 , H01L23/49575 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48464 , H01L2224/49171 , H01L2224/73265 , H01L2224/83191 , H01L2224/85203 , H01L2224/85207 , H01L2224/92247 , H01L2224/97 , H01L2924/01047 , H01L2924/07802 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： In one embodiment, a method of forming a semiconductor package comprises providing a first die having contact regions on a top surface but not on an opposite bottom surface. A dielectric liner layer is deposited under the bottom surface of the first die. The first die is attached with the deposited dielectric liner layer to a die paddle of a substrate. A bond layer is disposed between the substrate and the dielectric liner layer.
摘要翻译：在一个实施例中，形成半导体封装的方法包括提供在顶表面上但不在相对的底表面上具有接触区域的第一裸片。介电衬垫层沉积在第一管芯的底表面下方。第一裸片与沉积的介电衬垫层连接到衬底的裸片上。接合层设置在基板和电介质衬垫层之间。

9. 发明授权

US07468307B2 Semiconductor structure and method 有权
标题翻译：半导体结构与方法
公开(公告)号：US07468307B2
公开(公告)日：2008-12-23
申请号：US11476497
申请日：2006-06-28
申请人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L21/76
CPC分类号： H01L21/743 , H01L23/535 , H01L29/0653 , H01L29/7809 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.
摘要翻译：半导体结构包括半导体层堆叠，其包括第一导电类型的半导体衬底，第二导电类型的重掺杂掩埋层和形成在半导体层的顶部上的第三导电类型的单晶半导体层和埋入层，与埋层的接触，在接触孔中形成的接触以及半导体结构的不同部分的横向绝缘，所述绝缘体形成在隔离沟槽中。可以在隔离沟槽内形成与半导体衬底的接触。

10. 发明申请

US20070018195A1 Semiconductor structure and method 有权
标题翻译：半导体结构与方法
公开(公告)号：US20070018195A1
公开(公告)日：2007-01-25
申请号：US11476497
申请日：2006-06-28
申请人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L29/74
CPC分类号： H01L21/743 , H01L23/535 , H01L29/0653 , H01L29/7809 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.
摘要翻译：半导体结构包括半导体层堆叠，其包括第一导电类型的半导体衬底，第二导电类型的重掺杂掩埋层和形成在半导体层的顶部上的第三导电类型的单晶半导体层和埋入层，与埋层的接触，在接触孔中形成的接触以及半导体结构的不同部分的横向绝缘，所述绝缘体形成在隔离沟槽中。可以在隔离沟槽内形成与半导体衬底的接触。

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