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1. 发明授权

US08411871B2 Echo cancellation 有权
公开(公告)号：US08411871B2
公开(公告)日：2013-04-02
申请号：US11842964
申请日：2007-08-22
申请人： David Schwingshackl , Joerg Hauptmann , Gerhard Paoli , Dietmar Straeussnigg
发明人： David Schwingshackl , Joerg Hauptmann , Gerhard Paoli , Dietmar Straeussnigg
IPC分类号： H04B3/20
CPC分类号： H04B3/237
摘要： Implementations related to echo cancellation are depicted and described herein.

2. 发明授权

US07164708B1 Line termination device for a telephone subscriber line 有权
标题翻译：线路终端设备用于电话用户线
公开(公告)号：US07164708B1
公开(公告)日：2007-01-16
申请号：US10031034
申请日：2000-07-12
申请人： Joerg Hauptmann , Christian Schranz , Bernhard Zojer , Peter Pessl , David Schwingshackl , Herbert Zoler
发明人： Joerg Hauptmann , Christian Schranz , Bernhard Zojer , Peter Pessl , David Schwingshackl , Herbert Zoler
IPC分类号： H04B1/38
CPC分类号： H04L27/0002 , H04M11/062
摘要： In the line terminating device, which is provided for transmitting and receiving narrowband low-frequency voice signals and broadband data signals at a higher frequency, the analog reception path is subdivided into two separate analog paths (32, 33) for voice and data using a balance filter (49), which is used for data signal echo cancellation. In the transmission direction, the voice signal path and the data signal path are separated in the digital part by means of digital filters (43, 45). The invention is used for voice and data signal separation in xDSL methods, for example, ADSL.Lite.
摘要翻译：在用于以更高频率发送和接收窄带低频语音信号和宽带数据信号的线路终端设备中，模拟接收路径被细分为两个单独的模拟路径（32,33），用于语音和数据，使用平衡滤波器（49），用于数据信号回波消除。在传输方向上，语音信号路径和数据信号路径通过数字滤波器（43,45）在数字部分中分离。本发明用于xDSL方法中的语音和数据信号分离，例如ADSL.Lite。

3. 发明授权

US06635930B1 Protective circuit 有权
标题翻译：保护电路
公开(公告)号：US06635930B1
公开(公告)日：2003-10-21
申请号：US09806070
申请日：2001-04-30
申请人： Joerg Hauptmann , Alexander Kahl
发明人： Joerg Hauptmann , Alexander Kahl
IPC分类号： H01L2362
CPC分类号： H02H9/046
摘要： A protective circuit for limiting a voltage at a pad of an integrated circuit includes a threshold selector connected between the pad and ground. The input voltage to the threshold selector is the pad voltage. The threshold detector includes a first transistor where load path is connected to the pad. The central terminal of the first transistor is maintained at a threshold voltage derived from the pad voltage. A second transistor has its control terminal connected to a second terminal of the load path of the first transistor. The load path of this second transistor is connected between the pad and ground.
摘要翻译：用于限制集成电路的焊盘处的电压的保护电路包括连接在焊盘和接地之间的阈值选择器。阈值选择器的输入电压是焊盘电压。阈值检测器包括第一晶体管，其中负载路径连接到焊盘。第一晶体管的中心端子保持在从焊盘电压导出的阈值电压。第二晶体管的控制端连接到第一晶体管的负载路径的第二端。该第二晶体管的负载路径连接在焊盘和接地之间。

4. 发明授权

US5727024A Circuit configuration for conversion of a one-bit digital signal into an analog signal 失效
标题翻译：用于将1位数字信号转换为模拟信号的电路配置
公开(公告)号：US5727024A
公开(公告)日：1998-03-10
申请号：US606475
申请日：1996-03-04
申请人： Joerg Hauptmann
发明人： Joerg Hauptmann
IPC分类号： H03M3/02 , H04B14/06
CPC分类号： H03M3/502
摘要： A circuit configuration for converting a one-bit digital signal at a given sampling frequency into an analog signal, includes a multiplication device having one input receiving the digital signal, another input receiving a reference signal and an output. A delay device receives the digital signal, delays the digital signal by one period of a sampling frequency and has an output. A further multiplication device has one input connected to the output of the delay device, another input receiving the reference signal and an output. An adding device has inputs each being connected to the output of a respective one of the multiplication devices and an output at which the analog signal is available.
摘要翻译：用于将给定采样频率的1比特数字信号转换成模拟信号的电路结构包括具有接收数字信号的一个输入的乘法装置，接收参考信号的另一输入和输出。延迟装置接收数字信号，将数字信号延迟采样频率的一个周期并具有输出。另一个乘法器具有连接到延迟器件的输出的一个输入端，接收参考信号的另一个输入端和一个输出端。添加装置具有各自连接到相应一个乘法装置的输出的输入和模拟信号可用的输出。

5. 发明授权

US07576670B2 Sigma-delta analog-digital converter for an xDSL multistandard input stage 失效
标题翻译：用于xDSL多标准输入级的Sigma-delta模数转换器
公开(公告)号：US07576670B2
公开(公告)日：2009-08-18
申请号：US11661627
申请日：2004-09-02
申请人： Martin Clara , Antonio Di Giandomenico , Joerg Hauptmann , Andreas Wiesbauer
发明人： Martin Clara , Antonio Di Giandomenico , Joerg Hauptmann , Andreas Wiesbauer
IPC分类号： H03M3/00
CPC分类号： H03M3/394 , H03M3/406 , H03M3/424 , H03M3/452
摘要： The invention relates to a sigma-delta analogue/digital converter for an xDSL multi-standard input stage for converting an xDSL signal into a digital output signal, where the sigma-delta analogue/digital converter (1) has: an analogue loop filter (6) which filters an analogue difference signal between the xDSL signal to be converted and a feedback signal in order to produce a filter output signal; a quantizer which quantizes the filter output signal from the analogue loop filter (6) in order to produce the digital output signal; a first digital/analogue converter (16) which converts the digital output signal into the analogue feedback signal; where the analogue loop filter (6) has at least two resonator filter stages (6a, 6b) which respectively comprise a first integrator (6a-1; 6b-1) and a second integrator (6a-2; 6b-2) connected in series therewith, where the second integrator (6a-2; 6b-2) can be connected to the first integrator (6a-1, 6b-1) by means of a controllable feedback switch (6a-3, 6b-3) in order to close a local feedback loop, where the integrator outputs can respectively be connected by means of a controllable switch (25) to a signal input of an adder (27) which adds the output signals from the integrators in order to produce the filter output signal.
摘要翻译：本发明涉及一种用于xDSL多标准输入级的Σ-Δ模拟/数字转换器，用于将xDSL信号转换成数字输出信号，其中Σ-Δ模拟/数字转换器（1）具有：模拟环路滤波器 6），其对要转换的xDSL信号和反馈信号之间的模拟差分信号进行滤波，以产生滤波器输出信号; 量化器，其量化来自模拟环路滤波器（6）的滤波器输出信号，以产生数字输出信号; 第一数字/模拟转换器（16），其将数字输出信号转换成模拟反馈信号; 其中模拟环路滤波器（6）具有至少两个分别包括第一积分器（6a-1; 6b-1）和第二积分器（6a-2; 6b-2）的谐振器滤波器级（6a，6b）其中第二积分器（6a-2; 6b-2）可以通过可控反馈开关（6a-3,6b-3）按顺序连接到第一积分器（6a-1,6b-1）以闭合局部反馈回路，其中积分器输出可以分别通过可控开关（25）连接到加法器（27）的信号输入端，加法器（27）的信号输入相加来自积分器的输出信号，以产生滤波器输出信号。

6. 发明授权

US5969567A Circuit configuration for line adaptation and echo suppression 失效
标题翻译：线路适应和回波抑制的电路配置
公开(公告)号：US5969567A
公开(公告)日：1999-10-19
申请号：US824442
申请日：1997-03-26
申请人： Alexander Kahl , Peter Caldera , Joerg Hauptmann , Franz Dielacher
发明人： Alexander Kahl , Peter Caldera , Joerg Hauptmann , Franz Dielacher
IPC分类号： H04B3/23 , H04B7/015 , H03K5/00
CPC分类号： H04B7/015 , H04B3/23
摘要： A circuit configuration for line adaptation and echo suppression includes a balance filter which is triggered by transmission signals and supplies output signals that are linked through a subtractor to a reception signal. An impedance adaptation filter is triggered by the reception signal and supplies an output signal that is linked through an adder to the transmission signal. An analog/digital converter converts analog reception signals into digital reception signals. A digital/analog converter converts digital transmission signals into analog transmission signals. The impedance adaptation filter processes digital signals and the balance filter processes analog signals.
摘要翻译：用于线路适应和回波抑制的电路配置包括平衡滤波器，其由传输信号触发并且将通过减法器链接的输出信号提供给接收信号。阻抗适配滤波器由接收信号触发，并将通过加法器链接的输出信号提供给发送信号。模拟/数字转换器将模拟接收信号转换为数字接收信号。数字/模拟转换器将数字传输信号转换为模拟传输信号。阻抗适配滤波器处理数字信号，平衡滤波器处理模拟信号。

7. 发明授权

US07352776B1 Line terminator unit for a subscriber line 有权
标题翻译：用户线的线路终端单元
公开(公告)号：US07352776B1
公开(公告)日：2008-04-01
申请号：US09806415
申请日：1999-09-30
申请人： Joerg Hauptmann , Paul Kunisch , Hans Werner Rudolf , Gerald Krottendorfer , Manfred Preitnegger , Rudi Frenzel , Markus Terschluse , Dirk Schmuecking
发明人： Joerg Hauptmann , Paul Kunisch , Hans Werner Rudolf , Gerald Krottendorfer , Manfred Preitnegger , Rudi Frenzel , Markus Terschluse , Dirk Schmuecking
IPC分类号： H04J1/00 , H04J1/02 , H04M11/00
CPC分类号： H04L25/028 , H04L25/0272 , H04L25/0286 , H04L25/0292 , H04Q11/0442
摘要： The invention relates to a line terminating device for a subscriber line which transmits and receives broadband signals via a single subscriber line, a broadband signal being composed of a broadband or narrowband audio-frequency data signal and a broadband higher-frequency data signal and the frequency bands of the voice signal and of the data signal essentially not overlapping. The line terminating device according to the invention has a digital frequency separating filter in the digital section of the line terminating device, which is arranged in the digital section of the line terminating device so that the audio-frequency voice signal is separated from the higher-frequency data signal. In particular, the line terminating device is suitable for separating an ISDN or POTS voice signal from an ADSL data signal.
摘要翻译：本发明涉及一种用户线的线路终端设备，用于通过单个用户线路发送和接收宽带信号，宽带信号由宽带或窄带音频数据信号和宽带高频数据信号组成，频率语音信号和数据信号的频带基本上不重叠。根据本发明的线路终端设备在线路终端设备的数字部分中具有数字频率分离滤波器，其布置在线路终端设备的数字部分中，使得音频语音信号与较高分辨率的分离滤波器分离，频率数据信号。特别地，线路终端设备适合于将ISDN或POTS语音信号与ADSL数据信号分离。

8. 发明授权

US07339415B2 SC circuit arrangement 有权
标题翻译： SC电路布置
公开(公告)号：US07339415B2
公开(公告)日：2008-03-04
申请号：US11009538
申请日：2004-12-10
申请人： Richard Gaggl , Joerg Hauptmann
发明人： Richard Gaggl , Joerg Hauptmann
IPC分类号： H03K3/01 , G05F1/10
CPC分类号： H03H19/004
摘要： The invention relates to a linear SC circuit arrangement using integrated deep submicron technology, having at least one switched capacitor circuit which is connected to an input for inputting an input signal and which has at least one switchable capacitor and at least one first transistor, having a control circuit for directly actuating the first transistors, having an output stage which has second transistors and which is arranged downstream of the switched capacitor circuit, where the first transistors are in the form of thick oxide transistors and have a higher withstand voltage than the second transistors.
摘要翻译：本发明涉及使用集成深亚微米技术的线性SC电路装置，其具有至少一个开关电容器电路，其连接到用于输入输入信号的输入端，并且具有至少一个可切换电容器和至少一个第一晶体管，该第一晶体管具有用于直接致动第一晶体管的控制电路，具有具有第二晶体管并且布置在开关电容器电路的下游的输出级，其中第一晶体管是厚氧化物晶体管的形式并且具有比第二晶体管更高的耐受电压。

9. 发明授权

US5789959A Circuit configuration for direct voltage and alternating voltage decoupling 失效
标题翻译：直流电压和交流电压去耦的电路配置
公开(公告)号：US5789959A
公开(公告)日：1998-08-04
申请号：US723976
申请日：1996-09-30
申请人： Franz Dielacher , Berndt Pilgram , Joerg Hauptmann
发明人： Franz Dielacher , Berndt Pilgram , Joerg Hauptmann
IPC分类号： H04Q11/04 , H04M19/00
CPC分类号： H04Q11/0471 , H04Q2213/1308 , H04Q2213/13082 , H04Q2213/13209 , H04Q2213/13299 , H04Q2213/13302 , H04Q2213/13305 , H04Q2213/1332
摘要： Direct voltage and alternating voltage signals are decoupled from a first and a second pair of leads. The pairs of leads each carry an alternating voltage signal and they are subject to a direct voltage between them. A capacitive connection of the leads with the inputs of a signal receiving device allows decoupling of the alternative voltage signal. For decoupling one pole of the direct voltage signal, diodes are provided that are connected to the leads of the respective pair of leads. The diodes are each connected via a respective current source transistor to one terminal for the pole of the direct voltage. The control terminals of the current source transistors are controlled by the center tap of a voltage divider connected between the diodes. The embodiment for direct voltage decoupling is readily integratable.
摘要翻译：直接电压和交流电压信号与第一和第二对引线分离。这些引线对每个都带有交流电压信号，并且它们之间经受直流电压。引线与信号接收装置的输入的电容连接允许替代电压信号的去耦。为了解耦直流电压信号的一极，提供连接到相应引线对的引线的二极管。二极管各自通过相应的电流源晶体管连接到直流电压极的一个端子。电流源晶体管的控制端由连接在二极管之间的分压器的中心抽头控制。用于直接电压去耦的实施例易于集成。

10. 发明申请

US20080297385A1 Sigma-Delta Analog-Digital Converter For An Xdsl Multistandard Input Stage 失效
标题翻译：用于Xdsl多标准输入级的Sigma-Delta模拟数字转换器
公开(公告)号：US20080297385A1
公开(公告)日：2008-12-04
申请号：US11661627
申请日：2004-09-02
申请人： Martin Clara , Antonio Di Giandomenico , Joerg Hauptmann , Andreas Wiesbauer
发明人： Martin Clara , Antonio Di Giandomenico , Joerg Hauptmann , Andreas Wiesbauer
IPC分类号： H03M3/04
CPC分类号： H03M3/394 , H03M3/406 , H03M3/424 , H03M3/452
摘要： The invention relates to a sigma-delta analogue/digital converter for an xDSL multi-standard input stage for converting an xDSL signal into a digital output signal, where the sigma-delta analogue/digital converter (1) has: an analogue loop filter (6) which filters an analogue difference signal between the xDSL signal to be converted and a feedback signal in order to produce a filter output signal; a quantizer which quantizes the filter output signal from the analogue loop filter (6) in order to produce the digital output signal; a first digital/analogue converter (16) which converts the digital output signal into the analogue feedback signal; where the analogue loop filter (6) has at least two resonator filter stages (6a, 6b) which respectively comprise a first integrator (6a-1; 6b-1) and a second integrator (6a-2; 6b-2) connected in series therewith, where the second integrator (6a-2; 6b-2) can be connected to the first integrator (6a-1, 6b-1) by means of a controllable feedback switch (6a-3, 6b-3) in order to close a local feedback loop, where the integrator outputs can respectively be connected by means of a controllable switch (25) to a signal input of an adder (27) which adds the output signals from the integrators in order to produce the filter output signal.
摘要翻译：本发明涉及一种用于xDSL多标准输入级的Σ-Δ模拟/数字转换器，用于将xDSL信号转换成数字输出信号，其中Σ-Δ模拟/数字转换器（1）具有：模拟环路滤波器 6），其对要转换的xDSL信号和反馈信号之间的模拟差分信号进行滤波，以产生滤波器输出信号; 量化器，其量化来自模拟环路滤波器（6）的滤波器输出信号，以产生数字输出信号; 第一数字/模拟转换器（16），其将数字输出信号转换成模拟反馈信号; 其中模拟环路滤波器（6）具有至少两个分别包括第一积分器（6a-1; 6b-1）和第二积分器（6a-2; 6b-2）的谐振器滤波器级（6a，6b）其中第二积分器（6a-2; 6b-2）可以通过可控反馈开关（6a-3,6b-3）按顺序连接到第一积分器（6a-1,6b-1）以闭合局部反馈回路，其中积分器输出可以分别通过可控开关（25）连接到加法器（27）的信号输入端，加法器（27）的信号输入相加来自积分器的输出信号，以产生滤波器输出信号。

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