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1. 发明授权

US07352776B1 Line terminator unit for a subscriber line 有权
标题翻译：用户线的线路终端单元
公开(公告)号：US07352776B1
公开(公告)日：2008-04-01
申请号：US09806415
申请日：1999-09-30
申请人： Joerg Hauptmann , Paul Kunisch , Hans Werner Rudolf , Gerald Krottendorfer , Manfred Preitnegger , Rudi Frenzel , Markus Terschluse , Dirk Schmuecking
发明人： Joerg Hauptmann , Paul Kunisch , Hans Werner Rudolf , Gerald Krottendorfer , Manfred Preitnegger , Rudi Frenzel , Markus Terschluse , Dirk Schmuecking
IPC分类号： H04J1/00 , H04J1/02 , H04M11/00
CPC分类号： H04L25/028 , H04L25/0272 , H04L25/0286 , H04L25/0292 , H04Q11/0442
摘要： The invention relates to a line terminating device for a subscriber line which transmits and receives broadband signals via a single subscriber line, a broadband signal being composed of a broadband or narrowband audio-frequency data signal and a broadband higher-frequency data signal and the frequency bands of the voice signal and of the data signal essentially not overlapping. The line terminating device according to the invention has a digital frequency separating filter in the digital section of the line terminating device, which is arranged in the digital section of the line terminating device so that the audio-frequency voice signal is separated from the higher-frequency data signal. In particular, the line terminating device is suitable for separating an ISDN or POTS voice signal from an ADSL data signal.
摘要翻译：本发明涉及一种用户线的线路终端设备，用于通过单个用户线路发送和接收宽带信号，宽带信号由宽带或窄带音频数据信号和宽带高频数据信号组成，频率语音信号和数据信号的频带基本上不重叠。根据本发明的线路终端设备在线路终端设备的数字部分中具有数字频率分离滤波器，其布置在线路终端设备的数字部分中，使得音频语音信号与较高分辨率的分离滤波器分离，频率数据信号。特别地，线路终端设备适合于将ISDN或POTS语音信号与ADSL数据信号分离。

2. 发明申请

US20060059319A1 Architecture with shared memory 审中-公开
标题翻译：具有共享内存的架构
公开(公告)号：US20060059319A1
公开(公告)日：2006-03-16
申请号：US10507408
申请日：2003-04-04
申请人： Rudi Frenzel , Christian Horak , Markus Terschluse , Stefan Uhlemann , Raj Jain
发明人： Rudi Frenzel , Christian Horak , Markus Terschluse , Stefan Uhlemann , Raj Jain
IPC分类号： G06F13/00
CPC分类号： G06F13/1652 , G06F12/0607
摘要： A system with multiple processors sharing a single memory module without noticeable performance degradation is described. The memory module is divided into n independently addressable banks, where n is at least 2 and mapped such that sequential addresses are rotated between the banks. Such a mapping causes sequential data bytes to be stored in alternate banks. Each bank may be further divided into a plurality of blocks. By staggering or synchronizing the processors to execute the computer program such that each processor access a different block during the same cycle, the processors can access the memory simultaneously. Additionally, a cache is provided to enable a processor to fetch from memory a plurality of data words from different memory banks to reduce memory latency caused by memory contention.
摘要翻译：描述了具有共享单个存储器模块的多个处理器的系统，而没有明显的性能下降。存储器模块被分成n个可独立寻址的存储体，其中n至少为2，并被映射使得顺序地址在存储体之间旋转。这样的映射使顺序数据字节存储在备用存储体中。每个存储体可以进一步分成多个块。通过交错或同步处理器来执行计算机程序，使得每个处理器在同一周期期间访问不同的块，处理器可以同时访问存储器。此外，提供高速缓存以使得处理器能够从存储器中获取来自不同存储体的多个数据字，以减少由存储器争用引起的存储器等待时间。

3. 发明申请

US20050071574A1 Architecture with shared memory 审中-公开
标题翻译：具有共享内存的架构
公开(公告)号：US20050071574A1
公开(公告)日：2005-03-31
申请号：US10494808
申请日：2002-11-06
申请人： Rudi Frenzel , Christain Horak , Raj Jain , Markus Terschluse , Stefan Uhlemann
发明人： Rudi Frenzel , Christain Horak , Raj Jain , Markus Terschluse , Stefan Uhlemann
IPC分类号： G06F12/00 , G06F13/16
CPC分类号： G06F13/1647
摘要： A system with multiple processors sharing a single memory module without noticeable performance degradation is described. The memory module is divided into n independently addressable banks, where n is at least 2 and mapped such that sequential addresses are rotated between the banks. Such a mapping causes sequential data bytes to be stored in alternate banks. Each bank may be further divided into a plurality of blocks. By staggering or synchronizing the processors to execute the computer program such that each processor access a different block during the same cycle, the processors can access the memory simultaneously.
摘要翻译：描述了具有共享单个存储器模块的多个处理器的系统，而没有明显的性能下降。存储器模块被分成n个可独立寻址的存储体，其中n至少为2，并被映射使得顺序地址在存储体之间旋转。这样的映射使顺序数据字节存储在备用存储体中。每个存储体可以进一步分成多个块。通过交错或同步处理器来执行计算机程序，使得每个处理器在同一周期期间访问不同的块，处理器可以同时访问存储器。

4. 发明授权

US6118857A Modem 有权
标题翻译：调制解调器
公开(公告)号：US6118857A
公开(公告)日：2000-09-12
申请号：US138975
申请日：1998-08-24
申请人： Markus Terschluse
发明人： Markus Terschluse
IPC分类号： H04M3/428 , H04M11/06 , H04M11/00
CPC分类号： H04M3/428 , H04M11/06
摘要： The data transmission apparatus has a subscriber connection for a telephone subscriber line and a data connection for connection to a computer. A modulator section converts the digital data received from the computer into a transmission signal which is suitable for transmission via the telephone subscriber line. A demodulator section converts the signal received from the telephone subscriber line into a digital data stream. The data transmission apparatus has a device for detecting a special signal that is contained in the received signal at times. The special signal may be, in particular, a call-waiting signal injected into the subscriber line at an exchange while a call is waiting.
摘要翻译：数据传输装置具有用于电话用户线的用户连接和用于连接到计算机的数据连接。调制器部分将从计算机接收的数字数据转换成适合于通过电话用户线传输的传输信号。解调器部分将从电话用户线接收的信号转换为数字数据流。数据发送装置具有用于检测接收信号中包含的特殊信号的装置。特别的是，在呼叫正在等待的时候，特殊信号可能是在交换机处注入用户线的呼叫等待信号。

5. 发明授权

US07649948B2 xDSL multistandard driver circuit 有权
标题翻译： xDSL多标准驱动电路
公开(公告)号：US07649948B2
公开(公告)日：2010-01-19
申请号：US11199637
申请日：2005-08-09
申请人： Jorg Hauptmann , Markus Terschluse
发明人： Jorg Hauptmann , Markus Terschluse
IPC分类号： H04B3/00
CPC分类号： H04L27/0002 , H03F1/025 , H03F3/45475
摘要： An electric circuit for amplifying an xDSL signal comprises an operational amplifier and a signal monitoring circuit. The operational amplifier is configured to amplify the xDSL signal, is powered by a variable voltage supply and has a gain which is adjustable by an operating mode control signal. The signal monitoring circuit is activated by the operating mode control signal and is configured, when activated by the operating mode control signal, to generate a control signal to adjust the voltage of the variable voltage supply in order to adjust the maximal signal swing of the output signal of said operational amplifier. The control signal is generated by comparing the amplitude of the xDSL signal applied to the electric circuit with an amplitude threshold value.
摘要翻译：用于放大xDSL信号的电路包括运算放大器和信号监视电路。运算放大器配置为放大xDSL信号，由可变电源供电，并具有可通过工作模式控制信号调节的增益。信号监视电路由操作模式控制信号激活，并且被配置为当由操作模式控制信号激活时，产生控制信号以调节可变电压源的电压，以便调整输出的最大信号摆幅所述运算放大器的信号。通过将施加到电路的xDSL信号的振幅与振幅阈值进行比较来生成控制信号。

6. 发明授权

US07764698B2 Transceiver 失效
标题翻译：收发器
公开(公告)号：US07764698B2
公开(公告)日：2010-07-27
申请号：US11041759
申请日：2005-01-24
申请人： Markus Terschluse
发明人： Markus Terschluse
IPC分类号： H04L12/28
CPC分类号： H04L12/2854 , H04L2012/5606 , H04L2012/561 , H04L2012/5672
摘要： A transmission and/or reception unit is provided. The transmission and/or reception unit includes a module for transmitting and/or receiving data over a multiplicity of channels and at least two interfaces, the multiplicity of channels being divided between the at least two interfaces. With such a transmission and/or reception unit, for example, flexible adaptation of DSL linecards with different granularities is possible.
摘要翻译：提供传输和/或接收单元。传输和/或接收单元包括用于通过多个信道和至少两个接口发送和/或接收数据的模块，所述多个信道被划分在所述至少两个接口之间。例如，通过这样的传输和/或接收单元，可以灵活地适应具有不同粒度的DSL线卡。

7. 发明申请

US20050185670A1 Transceiver 失效
标题翻译：收发器
公开(公告)号：US20050185670A1
公开(公告)日：2005-08-25
申请号：US11041759
申请日：2005-01-24
申请人： Markus Terschluse
发明人： Markus Terschluse
IPC分类号： H04J3/16 , H04L5/20 , H04L12/28 , H04L12/56 , H04L12/66 , H04M11/06 , H04Q11/00
CPC分类号： H04L12/2854 , H04L2012/5606 , H04L2012/561 , H04L2012/5672
摘要： A transmission and/or reception unit is provided. The transmission and/or reception unit includes a module for transmitting and/or receiving data over a multiplicity of channels and at least two interfaces, the multiplicity of channels being divided between the at least two interfaces. With such a transmission and/or reception unit, for example, flexible adaptation of DSL linecards with different granularities is possible.
摘要翻译：提供传输和/或接收单元。传输和/或接收单元包括用于通过多个信道和至少两个接口发送和/或接收数据的模块，所述多个信道被划分在所述至少两个接口之间。例如，通过这样的传输和/或接收单元，可以灵活地适应具有不同粒度的DSL线卡。

8. 发明申请

US20130003940A1 XDSL MULTISTANDARD DRIVER CIRCUIT 审中-公开
标题翻译： XDSL多媒体驱动器电路
公开(公告)号：US20130003940A1
公开(公告)日：2013-01-03
申请号：US13602251
申请日：2012-09-03
申请人： Jorg Hauptmann , Markus Terschluse
发明人： Jorg Hauptmann , Markus Terschluse
IPC分类号： H04M3/22 , H04M11/00
CPC分类号： H04L27/0002 , H03F1/025 , H03F3/45475
摘要： An electric circuit for amplifying an xDSL signal comprises an operational amplifier and a signal monitoring circuit. The operational amplifier is configured to amplify the xDSL signal, is powered by a variable voltage supply and has a gain which is adjustable by an operating mode control signal. The signal monitoring circuit is activated by the operating mode control signal and is configured, when activated by the operating mode control signal, to generate a control signal to adjust the voltage of the variable voltage supply in order to adjust the maximal signal swing of the output signal of said operational amplifier. The control signal is generated by comparing the amplitude of the xDSL signal applied to the electric circuit with an amplitude threshold value.
摘要翻译：用于放大xDSL信号的电路包括运算放大器和信号监视电路。运算放大器配置为放大xDSL信号，由可变电源供电，并具有可通过工作模式控制信号调节的增益。信号监视电路由操作模式控制信号激活，并且被配置为当由操作模式控制信号激活时，产生控制信号以调节可变电压源的电压，以便调整输出的最大信号摆幅所述运算放大器的信号。通过将施加到电路的xDSL信号的振幅与振幅阈值进行比较来生成控制信号。

9. 发明授权

US08259821B2 xDSL multistandard driver circuit 有权
标题翻译： xDSL多标准驱动电路
公开(公告)号：US08259821B2
公开(公告)日：2012-09-04
申请号：US12650824
申请日：2009-12-31
申请人： Jorg Hauptmann , Markus Terschluse
发明人： Jorg Hauptmann , Markus Terschluse
IPC分类号： H04B3/00
CPC分类号： H04L27/0002 , H03F1/025 , H03F3/45475
摘要： An electric circuit for amplifying an xDSL signal comprises an operational amplifier and a signal monitoring circuit. The operational amplifier is configured to amplify the xDSL signal, is powered by a variable voltage supply and has a gain which is adjustable by an operating mode control signal. The signal monitoring circuit is activated by the operating mode control signal and is configured, when activated by the operating mode control signal, to generate a control signal to adjust the voltage of the variable voltage supply in order to adjust the maximal signal swing of the output signal of said operational amplifier. The control signal is generated by comparing the amplitude of the xDSL signal applied to the electric circuit with an amplitude threshold value.
摘要翻译：用于放大xDSL信号的电路包括运算放大器和信号监视电路。运算放大器配置为放大xDSL信号，由可变电源供电，并具有可通过工作模式控制信号调节的增益。信号监视电路由操作模式控制信号激活，并且被配置为当由操作模式控制信号激活时，产生控制信号以调节可变电压源的电压，以便调整输出的最大信号摆幅所述运算放大器的信号。通过将施加到电路的xDSL信号的振幅与振幅阈值进行比较来生成控制信号。

10. 发明申请

US20100104089A1 xDSL MULTISTANDARD DRIVER CIRCUIT 有权
标题翻译： xDSL多功能驱动电路
公开(公告)号：US20100104089A1
公开(公告)日：2010-04-29
申请号：US12650824
申请日：2009-12-31
申请人： Jorg Hauptmann , Markus Terschluse
发明人： Jorg Hauptmann , Markus Terschluse
IPC分类号： H04M1/00
CPC分类号： H04L27/0002 , H03F1/025 , H03F3/45475
摘要： An electric circuit for amplifying an xDSL signal comprises an operational amplifier and a signal monitoring circuit. The operational amplifier is configured to amplify the xDSL signal, is powered by a variable voltage supply and has a gain which is adjustable by an operating mode control signal. The signal monitoring circuit is activated by the operating mode control signal and is configured, when activated by the operating mode control signal, to generate a control signal to adjust the voltage of the variable voltage supply in order to adjust the maximal signal swing of the output signal of said operational amplifier. The control signal is generated by comparing the amplitude of the xDSL signal applied to the electric circuit with an amplitude threshold value.
摘要翻译：用于放大xDSL信号的电路包括运算放大器和信号监视电路。运算放大器配置为放大xDSL信号，由可变电源供电，并具有可通过工作模式控制信号调节的增益。信号监视电路由操作模式控制信号激活，并且被配置为当由操作模式控制信号激活时，产生控制信号以调节可变电压源的电压，以便调整输出的最大信号摆幅所述运算放大器的信号。通过将施加到电路的xDSL信号的振幅与振幅阈值进行比较来生成控制信号。

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