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1. 发明授权

US5463736A Coupling facility for receiving commands from plurality of hosts for activating selected connection paths to I/O devices and maintaining status thereof 失效
标题翻译：用于从多个主机接收命令的耦合设备，用于激活对I / O设备的选择的连接路径并维持其状态
公开(公告)号：US5463736A
公开(公告)日：1995-10-31
申请号：US324447
申请日：1994-10-18
申请人： David A. Elko , Jeffrey A. Frey , Audrey A. Helffrich , John F. Isenberg, Jr. , Brian B. Moore , Jeffery M. Nick , Michael D. Swanson , Joseph A. Williams
发明人： David A. Elko , Jeffrey A. Frey , Audrey A. Helffrich , John F. Isenberg, Jr. , Brian B. Moore , Jeffery M. Nick , Michael D. Swanson , Joseph A. Williams
IPC分类号： G06F13/14 , G06F13/12 , G06F15/17 , G06F17/30
CPC分类号： G06F17/30985 , G06F13/122
摘要： A message path mechanism in a network having central processing complexes (CPCs) joined by message paths to a coupling facility. The coupling facility locates message paths for sending messages from one CPC to another and for sending messages between the coupling facility and one or more of the CPCs. A message path status table is provided having an entry for each of the message paths. Each entry has an indicator indicating whether its message path is active or inactive. multiple connections between the coupling facility and systems in the CPCs are registered in the coupling facility. Also provided is a mechanism for validating that each message path is connected properly such that if a message path is disconnected and then reconnected to a CPC, the validation mechanism insures that the message path has been reconnected correctly.
摘要翻译：网络中的消息路径机制，具有通过消息路径连接到耦合设备的中央处理复合体（CPC）。耦合设备定位用于将消息从一个CPC发送到另一个CPC的消息路径，并用于在耦合设施和一个或多个CPC之间发送消息。提供消息路径状态表，其具有用于每个消息路径的条目。每个条目都有一个指示符，指示其消息路径是活动还是非活动。耦合设备和CPC之间的系统之间的多个连接被注册在耦合设备中。还提供了用于验证每个消息路径被正确连接的机制，使得如果消息路径被断开并且然后重新连接到CPC，则验证机制确保消息路径已被重新正确连接。

2. 发明授权

US5317739A Method and apparatus for coupling data processing systems 失效
标题翻译：耦合数据处理系统的方法和装置
公开(公告)号：US5317739A
公开(公告)日：1994-05-31
申请号：US860803
申请日：1992-03-30
申请人： David A. Elko , Jeffrey A. Frey , John F. Isenberg, Jr. , Jeffery M. Mick , Jimmy P. Strickland , Michael D. Swanson , Audrey A. Helffrich , Brian B. Moore
发明人： David A. Elko , Jeffrey A. Frey , John F. Isenberg, Jr. , Jeffery M. Mick , Jimmy P. Strickland , Michael D. Swanson , Audrey A. Helffrich , Brian B. Moore
IPC分类号： G06F12/00 , G06F9/46 , G06F9/52 , G06F15/17 , G06F15/16 , G06F13/00
CPC分类号： G06F9/542 , G06F9/546
摘要： A Structured External Storage (SES) device/processor is connected to two or more DP systems, thereby loosely coupling the systems. The SES is capable of holding data objects of two distinct types (List objects and Cache objects), and communicates commands and command responses with the systems using a message protocol. A support facility within a processor on which a system is executing receives status indications from the SES without interrupting mainline system execution. Within the SES, a serialization mechanism allows more than one command to execute in parallel without loss of data object integrity, or command consistency. A forward completion mechanism sends to systems early notification of completion of certain commands, without permitting results inconsistent with this notification to be obtained by the systems. And a restart mechanism permits interrupted commands to be restarted by the initiating system or, in certain cases, by another system.
摘要翻译：结构化外部存储（SES）设备/处理器连接到两个或更多个DP系统，从而松散地耦合系统。 SES能够保存两种不同类型的数据对象（List对象和Cache对象），并使用消息协议与系统通信命令和命令响应。在系统正在执行的处理器内的支持设施从SES接收状态指示，而不会中断主线系统的执行。在SES中，序列化机制允许多个命令并行执行，而不会丢失数据对象完整性或命令一致性。前向完成机制向系统提前通知某些命令的完成，而不允许系统获得与此通知不一致的结果。并且重新启动机制允许中断的命令由启动系统重新启动，或者在某些情况下由另一个系统重新启动。

3. 发明授权

US5561809A In a multiprocessing system having a coupling facility, communicating messages between the processors and the coupling facility in either a synchronous operation or an asynchronous operation 失效
标题翻译：在具有耦合设施的多处理系统中，在同步操作或异步操作中，在处理器和耦合设施之间传送消息
公开(公告)号：US5561809A
公开(公告)日：1996-10-01
申请号：US420893
申请日：1995-04-11
申请人： David A. Elko , Audrey A. Helffrich , John F. Isenberg, Jr. , Brian B. Moore , Jeffrey M. Nick , Michael D. Swanson , Joseph A. Williams
发明人： David A. Elko , Audrey A. Helffrich , John F. Isenberg, Jr. , Brian B. Moore , Jeffrey M. Nick , Michael D. Swanson , Joseph A. Williams
IPC分类号： G06F13/00 , G06F13/12 , G06F15/17 , G06F15/173 , G06F15/00
CPC分类号： G06F15/17375 , G06F13/122 , G06F15/17
摘要： A mechanism for communicating messages, each including a command and a response, in a network having central processing complexes (CPCs) and one or more coupling facilities. Each coupling facility has a central processor for executing instructions and a main storage. Messages are sent from a message control block in the main storage of the CPC sending the message, and the response to the message is received in a message response block of the CPC without an interrupt to the program being executed by the central processor of the CPC. Each message from a CPC to the coupling facility may include a command and an indicator bit which instructs the coupling facility to execute the command either in synchronism with or asynchronously to the execution of the sending processor. The coupling facility executes the command and returns a response which is received in a message response block of the main storage of the sending CPC without an interrupt to any program being executed by the central processor of that CPC.
摘要翻译：一种用于在具有中央处理复合体（CPC）和一个或多个耦合设施的网络中传送各自包括命令和响应的消息的机制。每个耦合设备具有用于执行指令和主存储器的中央处理器。消息从发送消息的CPC的主存储器中的消息控制块发送，并且在CPC的消息响应块中接收到对消息的响应，而没有中断由CPC的中央处理器执行的程序的中断。来自CPC到耦合设施的每个消息可以包括指令和指示符比特，其指示耦合设备与发送处理器的执行同步或异步地执行命令。耦合设备执行命令并返回在发送CPC的主存储器的消息响应块中接收的响应，而不会中断由该CPC的中央处理器执行的任何程序。

4. 发明授权

US5394554A Interdicting I/O and messaging operations from sending central processing complex to other central processing complexes and to I/O device in multi-system complex 失效
标题翻译：将I / O和消息操作从发送中央处理复合体到其他中央处理复合体以及多系统复杂的I / O设备
公开(公告)号：US5394554A
公开(公告)日：1995-02-28
申请号：US860489
申请日：1992-03-30
申请人： David A. Elko , John F. Isenberg, Jr. , Allan S. Meritt , Brian B. Moore , Jeffrey M. Nick , William C. Shepard , David H. Surman , Michael D. Swanson
发明人： David A. Elko , John F. Isenberg, Jr. , Allan S. Meritt , Brian B. Moore , Jeffrey M. Nick , William C. Shepard , David H. Surman , Michael D. Swanson
IPC分类号： G06F15/17 , G06F13/00
CPC分类号： G06F15/17
摘要： In a multi-system complex having central processing complexes (CPCs) and subsystems, a hardware facility for prompt interdicting I/O and message operations. A CPC or subsystem failure causes as interruption in the availability of the data bases to the attached network of terminals. Often such networks have thousands of terminals. Even a short loss of data is detrimental. Therefore the CPC or subsystem takeover must be accomplished as quickly as possible and the I/O attached to the failing CPC or subsystem must be interdicting to release it for use to the rest of the complex. The disclosed hardware facility provides a mechanism which is program initiated and controlled and which guarantees the prompt completion of the interdiction function.
摘要翻译：在具有中央处理复合体（CPC）和子系统的多系统复合体中，提供了一种硬件设施，用于迅速地阻止I / O和消息操作。 CPC或子系统故障导致连接的终端网络的数据库的可用性中断。通常这样的网络有数千个终端。即使是短暂的数据丢失也是有害的。因此，CPC或子系统的接管必须尽可能快地完成，并且连接失败的CPC或子系统的I / O必须被阻止，以将其释放以供其他复合体使用。所公开的硬件设施提供了一种程序启动和控制的机制，并且确保迅速完成拦截功能。

5. 发明授权

US5339427A Method and apparatus for distributed locking of shared data, employing a central coupling facility 失效
标题翻译：共享数据的分布式锁定方法和装置，采用中央耦合设备
公开(公告)号：US5339427A
公开(公告)日：1994-08-16
申请号：US860808
申请日：1992-03-30
申请人： David A. Elko , John F. Isenberg, Jr. , Brian B. Moore , Jimmy P. Strickland , Michael D. Swanson , George W. Wang
发明人： David A. Elko , John F. Isenberg, Jr. , Brian B. Moore , Jimmy P. Strickland , Michael D. Swanson , George W. Wang
IPC分类号： G06F9/46 , G06F12/14
CPC分类号： G06F9/52
摘要： A shared coupling facility contains system lock management (SLM) means for supporting a distributed locking protocol used by a plurality of sharing lock managers each executing on a processor having access to the shared memory and to any other processors in the processor complex. A request to lock a resource shared among the lock managers is first checked against a local hash table and then, if necessary, forwarded to the system lock management means in the shared memory for synchronous or asynchronous processing. List structures are maintained in the shared coupling facility to support the protocol, and are used by the system lock management means to record data recovery status. The sharing lock managers interact with the SLM means to control/manage lock contention, waiter queueing, and compatibility processing.
摘要翻译：共享耦合设施包括系统锁管理（SLM）装置，用于支持多个共享锁管理器使用的分布式锁定协议，每个共享锁管理器在具有访问共享存储器的处理器和处理器复合体中的任何其他处理器上执行。首先针对本地哈希表检查锁定管理器之间共享的资源的请求，然后如果需要，转发到共享存储器中的系统锁管理装置，以进行同步或异步处理。列表结构保持在共享耦合设施中以支持协议，并被系统锁管理装置用于记录数据恢复状态。共享锁管理器与SLM进行交互，以控制/管理锁争用，服务员排队和兼容性处理。

6. 发明授权

US5457793A Software cache management of a shared electronic store in a supplex 失效
公开(公告)号：US5457793A
公开(公告)日：1995-10-10
申请号：US860807
申请日：1992-03-30
申请人： David A. Elko , Jeffrey A. Frey , Brian B. Moore , Jeffrey M. Nick , Kevin F. Smith , Michael D. Swanson
发明人： David A. Elko , Jeffrey A. Frey , Brian B. Moore , Jeffrey M. Nick , Kevin F. Smith , Michael D. Swanson
IPC分类号： G06F12/02 , G06F12/08 , G06F12/12 , G06F15/167 , G06F17/30
CPC分类号： G06F12/084 , G06F12/023 , G06F12/0866 , G06F12/123 , Y10S707/968 , Y10S707/99956
摘要： Storage is managed in a shared electronic store (SES) by assigning storage classes (STCs) to each directory entry having a data item stored in SES. The assignments of directory entries and data elements to the respective STCs can be changed at any time by any CPC. Eventually, no free space remains in the SES cache, and then space for new directory entries and data items must be obtained by reclaiming space occupied by directory entries and associated unchanged data items. The reclaiming of SES space is controlled on a STC basis. Any specified STC may reclaim from itself or from another STC using reclaiming software/microcode in SES, which includes a reclaim vector, a reclaim counter, a queue, and reclaiming controls. The vector and counter have respective elements for all possible STCs to controls how a specified STC may reclaim space from any or all target STC. Any enabled target STC reclaims its space according to an LRU algorithm maintained by a queue for the STC. A CPC can issue a command to load different values in target STC elements in the SES vector for a specified STC to control how reclaiming is apportioned for the specified STC. In SES, associated target counter elements are loaded from its vector. Reclaiming is done automatically in SES upon each directory miss in the current target STC having a non-zero counter value, when no free space exists. The counter is decremented for each reclaimed directory entry until its count reaches zero, and then the counter element for the next non-zero target STC is used for reclaiming until it reaches zero. When all STC elements in the counter are zero for the specified STC, the counter elements are reloaded from the vector elements to repeat the reclaiming operation, as long as a repeat factor for the specified STC has not reached zero. The repeat factor is decremented each time the counters are loaded from the vector. When the counters and repeat factor have all reached zero, reclaiming is disabled for the specified STC.

7. 发明授权

US06336184B1 Method and apparatus for performing a trap operation in an information handling system 有权
标题翻译：在信息处理系统中执行陷阱操作的方法和装置
公开(公告)号：US06336184B1
公开(公告)日：2002-01-01
申请号：US09134010
申请日：1998-08-14
申请人： Gregory A. Burke , Greg A. Dyck , David E. Lee , Brian B. Moore , Steven J. Repka
发明人： Gregory A. Burke , Greg A. Dyck , David E. Lee , Brian B. Moore , Steven J. Repka
IPC分类号： G06F948
CPC分类号： G06F9/3005 , G06F8/78
摘要： A central processing unit of an information handling system is provided with a Trap instruction to facilitate transfer of control from a user program to a trap program. A dispatchable unit control block (DUCT) of the CPU is loaded with the address of a trap control block, which in turn contains the addresses of a trap save area and a trap program. The user program is provided with Trap instructions at the desired transfer points. Upon decoding a Trap instruction in the user program, the CPU saves state information from the program status word (PSW), general registers and access registers in the designated trap save area, loads the address of the trap control block into a general register, and copies the address of the trap program into the instruction address field of the PSW to transfer control to the trap program. Upon completion of execution, the trap program may issue a Resume Program (RP) instruction to restore the previously saved state information to return control to the user program.
摘要翻译：信息处理系统的中央处理单元设置有Trap指令，以便于将控制从用户程序传送到陷阱程序。 CPU的可调度单元控制块（DUCT）装载有陷阱控制块的地址，该地址又包含陷阱保存区域的地址和陷阱程序。用户程序在所需的传输点提供陷阱指令。在解码用户程序中的Trap指令时，CPU从指定的陷阱保存区中的程序状态字（PSW），通用寄存器和访问寄存器中保存状态信息，将陷阱控制块的地址加载到通用寄存器中，将陷阱程序的地址复制到PSW的指令地址字段中，以将控制传输到陷阱程序。完成执行后，陷阱程序可以发出恢复程序（RP）指令以恢复先前保存的状态信息，以将控制权返回给用户程序。

8. 发明授权

US08522082B1 Method and apparatus for identifying remediation failures in year-2000 remediation programs 失效
标题翻译： 2000年修复计划中确定修复失败的方法和设备
公开(公告)号：US08522082B1
公开(公告)日：2013-08-27
申请号：US09561273
申请日：2000-04-28
申请人： Brian B. Moore , Gregory A. Burke , David E. Lee
发明人： Brian B. Moore , Gregory A. Burke , David E. Lee
IPC分类号： G06F11/00
CPC分类号： G06F11/3636 , G06F8/78 , G06F11/0751 , G06F11/366
摘要： Object-code instruction traces are employed to analyze selected instructions of a year-2000 (Y2K) remediated application program for possible remediation failure when confronted by a year-2000 date. The analysis includes directly identifying one or more instructions of the remediated application program that may fail. A remediation-failure-pattern descriptor is assigned to each examined instruction which is indicative of whether the remediated instruction may fail when confronted by a date in the year-2000 range. The analysis employs user-specifiable run-control values, as well as predetermined filter-specification values in comparing traces of each selected object-code instruction to predefined remediation-failure patterns.
摘要翻译：采用对象代码指令跟踪来分析2000年（2000年）（2000年）修复的应用程序的选定指令，以便在2000年以前的时间内可能的修复失败。分析包括直接识别可能失败的补救应用程序的一个或多个指令。修复失败模式描述符被分配给每个被检查的指令，其指示在2000年范围内的日期当中是否修复的指令是否可能失败。该分析采用用户可指定的运行控制值，以及将每个选定的目标代码指令的跟踪与预定义的修复故障模式进行比较的预定过滤器规范值。

9. 发明授权

US07103754B2 Computer instructions for having extended signed displacement fields for finding instruction operands 有权
标题翻译：具有用于查找指令操作数的扩展的带符号位移字段的计算机指令
公开(公告)号：US07103754B2
公开(公告)日：2006-09-05
申请号：US10403417
申请日：2003-03-28
申请人： Mark A. Check , Brian B. Moore , Timothy J. Slegel
发明人： Mark A. Check , Brian B. Moore , Timothy J. Slegel
IPC分类号： G06F9/30
CPC分类号： G06F9/30145 , G06F9/30167
摘要： A computer architecture that provides the definition of a 20 bit signed displacement value used to form the operand storage address.
摘要翻译：提供用于形成操作数存储地址的20位有符号位移值的定义的计算机体系结构。

10. 发明授权

US06279127B1 System for predicting year-2000 instruction failures 失效
标题翻译：预测2000年教学失败的系统
公开(公告)号：US06279127B1
公开(公告)日：2001-08-21
申请号：US09136279
申请日：1998-08-20
申请人： Brian B. Moore
发明人： Brian B. Moore
IPC分类号： G06F1100
CPC分类号： G06F8/78 , Y10S707/99942
摘要： Object-code instruction traces are employed to analyze selected instructions of an application program for possible failure when confronted by a year-2000 date. The analysis includes directly identifying one or more instructions of the application program that may fail, as well as identifying whether the one or more instructions have a characteristic of a predefined false-positive failure pattern. A failure-pattern descriptor is assigned to each examined instruction which is indicative of whether the instruction may fail when confronted by a date in the year-2000 range, and whether the instruction is a possible false-positive failing instruction. The analysis employs user-specifiable run-control values, as well as predetermined filter-specification values in comparing traces of each selected object-code instruction to predefined instruction failure patterns.
摘要翻译：采用对象代码指令轨迹来分析应用程序的选择指令，以便在面对2000年的日期时可能发生故障。分析包括直接识别可能失败的应用程序的一个或多个指令，以及识别一个或多个指令是否具有预定义的假阳性故障模式的特性。分配给每个被检查指令的故障模式描述符，其指示当在2000年范围内的日期面临时该指令是否可能失败，以及该指令是否是可能的假正向失败指令。分析使用用户可指定的运行控制值以及将每个选定的目标代码指令的轨迹与预定义的指令故障模式进行比较的预定的滤波器规格值。

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