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1. 发明授权

US07387942B2 Substrate isolation in integrated circuits 有权
公开(公告)号：US07387942B2
公开(公告)日：2008-06-17
申请号：US10732616
申请日：2003-12-09
申请人： Daniel Wang , Chunchieh Huang , Dong Jun Kim
发明人： Daniel Wang , Chunchieh Huang , Dong Jun Kim
IPC分类号： H01L21/425 , H01L21/762
CPC分类号： H01L27/11526 , H01L21/76237 , H01L21/823481 , H01L27/105 , H01L27/11539 , H01L27/11546
摘要： Substrate isolation trench (224) are formed in a semiconductor substrate (120). Dopant (e.g. boron) is implanted into the trench sidewalls by ion implantation to suppress the current leakage along the sidewalls. During the ion implantation, the transistor gate dielectric (520) faces the ion stream, but damage to the gate dielectric is annealed in subsequent thermal steps. In some embodiments, the dopant implantation is an angled implant. The implant is performed from the opposite sides of the wafer, and thus from the opposite sides of each active area. Each active area includes a region implanted from one side and a region implanted from the opposite side. The two regions overlap to facilitate threshold voltage adjustment.

2. 发明授权

US07358149B2 Substrate isolation in integrated circuits 有权
标题翻译：集成电路中的基板隔离
公开(公告)号：US07358149B2
公开(公告)日：2008-04-15
申请号：US11193150
申请日：2005-07-29
申请人： Daniel Wang , Chunchieh Huang , Dong Jun Kim
发明人： Daniel Wang , Chunchieh Huang , Dong Jun Kim
IPC分类号： H01L21/425
CPC分类号： H01L27/11526 , H01L21/76237 , H01L21/823481 , H01L27/105 , H01L27/11539 , H01L27/11546
摘要： Substrate isolation trench (224) are formed in a semiconductor substrate (120). Dopant (e.g. boron) is implanted into the trench sidewalls by ion implantation to suppress the current leakage along the sidewalls. During the ion implantation, the transistor gate dielectric (520) faces the ion stream, but damage to the gate dielectric is annealed in subsequent thermal steps. In some embodiments, the dopant implantation is an angled implant. The implant is performed from the opposite sides of the wafer, and thus from the opposite sides of each active area. Each active area includes a region implanted from one side and a region implanted from the opposite side. The two regions overlap to facilitate threshold voltage adjustment.
摘要翻译：衬底隔离沟槽（224）形成在半导体衬底（120）中。通过离子注入将掺杂剂（例如硼）注入到沟槽侧壁中，以抑制沿着侧壁的电流泄漏。在离子注入期间，晶体管栅极电介质（520）面向离子流，但在随后的热步骤中对栅极电介质的损坏退火。在一些实施例中，掺杂剂注入是成角度的植入物。植入物从晶片的相对侧进行，并且因此从每个有效区域的相对侧进行。每个有源区域包括从一侧注入的区域和从相对侧注入的区域。两个区域重叠以便于阈值电压调整。

3. 发明申请

US20050170646A1 Use of multiple etching steps to reduce lateral etch undercut 有权
标题翻译：使用多个蚀刻步骤来减少横向蚀刻底切
公开(公告)号：US20050170646A1
公开(公告)日：2005-08-04
申请号：US10772932
申请日：2004-02-04
申请人： Chunchieh Huang , Chia-Shun Hsiao , Jin-Ho Kim , Kuei-Chang Tsai , Barbara Haselden , Daniel Wang
发明人： Chunchieh Huang , Chia-Shun Hsiao , Jin-Ho Kim , Kuei-Chang Tsai , Barbara Haselden , Daniel Wang
IPC分类号： H01L21/44 , H01L21/8247 , H01L27/105 , H01L27/115
CPC分类号： H01L27/105 , H01L27/115 , H01L27/11526 , H01L27/11539
摘要： In integrated circuit fabrication, an etch is used that has a lateral component. For example, the etch may be isotropic. Before the isotropic etch of a layer (160), another etch of the same layer is performed. This other etch can be anisotropic. This etch attacks a portion (160X2) of the layer adjacent to the feature to be formed by the isotropic etch. That portion is entirely or partially removed by the anisotropic etch. Then the isotropic etch mask (420) is formed to extend beyond the feature over the location of the portion subjected to the anisotropic etch. If that portion was removed entirely, then the isotropic etch mask may completely seal off the feature to be formed on the side of that portion, so the lateral etching will not occur. If that portion was removed only partially, then the lateral undercut will be impeded because the passage to the feature under the isotropic etch mask will be narrowed.
摘要翻译：在集成电路制造中，使用具有侧向分量的蚀刻。例如，蚀刻可以是各向同性的。在层（160）的各向同性蚀刻之前，执行相同层的另一蚀刻。这种其他蚀刻可以是各向异性的。该蚀刻攻击通过各向同性蚀刻形成的与特征相邻的层的部分（160×2）。该部分被各向异性蚀刻完全或部分地去除。然后，各向同性蚀刻掩模（420）被形成为延伸超过经过各向异性蚀刻的部分的位置的特征。如果完全去除该部分，则各向同性蚀刻掩模可以完全密封要在该部分侧面上形成的特征，因此不会发生横向蚀刻。如果该部分仅部分被去除，则横向底切将被阻碍，因为在各向同性蚀刻掩模下的特征的通过将变窄。

4. 发明申请

US20060211255A1 Use of multiple etching steps to reduce lateral etch undercut 审中-公开
标题翻译：使用多个蚀刻步骤来减少横向蚀刻底切
公开(公告)号：US20060211255A1
公开(公告)日：2006-09-21
申请号：US11432222
申请日：2006-05-10
申请人： Chunchieh Huang , Chia-Shun Hsiao , Jin-Ho Kim , Kuei-Chang Tsai , Barbara Haselden , Daniel Wang
发明人： Chunchieh Huang , Chia-Shun Hsiao , Jin-Ho Kim , Kuei-Chang Tsai , Barbara Haselden , Daniel Wang
IPC分类号： H01L21/302
CPC分类号： H01L27/105 , H01L27/115 , H01L27/11526 , H01L27/11539
摘要： In integrated circuit fabrication, an etch is used that has a lateral component. For example, the etch may be isotropic. Before the isotropic etch of a layer (160), another etch of the same layer is performed. This other etch can be anisotropic. This etch attacks a portion (160X2) of the layer adjacent to the feature to be formed by the isotropic etch. That portion is entirely or partially removed by the anisotropic etch. Then the isotropic etch mask (420) is formed to extend beyond the feature over the location of the portion subjected to the anisotropic etch. If that portion was removed entirely, then the isotropic etch mask may completely seal off the feature to be formed on the side of that portion, so the lateral etching will not occur. If that portion was removed only partially, then the lateral undercut will be impeded because the passage to the feature under the isotropic etch mask will be narrowed.
摘要翻译：在集成电路制造中，使用具有侧向分量的蚀刻。例如，蚀刻可以是各向同性的。在层（160）的各向同性蚀刻之前，执行相同层的另一蚀刻。这种其他蚀刻可以是各向异性的。该蚀刻攻击通过各向同性蚀刻形成的与特征相邻的层的部分（160×2）。该部分被各向异性蚀刻完全或部分地去除。然后，各向同性蚀刻掩模（420）被形成为延伸超过经过各向异性蚀刻的部分的位置的特征。如果完全去除该部分，则各向同性蚀刻掩模可以完全密封要在该部分侧面上形成的特征，因此不会发生横向蚀刻。如果该部分仅部分被去除，则横向底切将被阻碍，因为在各向同性蚀刻掩模下的特征的通过将变窄。

5. 发明申请

US20050124102A1 Substrate isolation in integrated circuits 有权
标题翻译：集成电路中的基板隔离
公开(公告)号：US20050124102A1
公开(公告)日：2005-06-09
申请号：US10732616
申请日：2003-12-09
申请人： Daniel Wang , Chunchieh Huang , Dong Kim
发明人： Daniel Wang , Chunchieh Huang , Dong Kim
IPC分类号： H01L21/762 , H01L21/8234 , H01L21/8247 , H01L27/105 , H01L21/336 , H01L21/76
CPC分类号： H01L27/11526 , H01L21/76237 , H01L21/823481 , H01L27/105 , H01L27/11539 , H01L27/11546
摘要： Substrate isolation trench (224) are formed in a semiconductor substrate (120). Dopant (e.g. boron) is implanted into the trench sidewalls by ion implantation to suppress the current leakage along the sidewalls. During the ion implantation, the transistor gate dielectric (520) faces the ion stream, but damage to the gate dielectric is annealed in subsequent thermal steps. In some embodiments, the dopant implantation is an angled implant. The implant is performed from the opposite sides of the wafer, and thus from the opposite sides of each active area. Each active area includes a region implanted from one side and a region implanted from the opposite side. The two regions overlap to facilitate threshold voltage adjustment.
摘要翻译：衬底隔离沟槽（224）形成在半导体衬底（120）中。通过离子注入将掺杂剂（例如硼）注入到沟槽侧壁中，以抑制沿着侧壁的电流泄漏。在离子注入期间，晶体管栅极电介质（520）面向离子流，但在随后的热步骤中对栅极电介质的损坏退火。在一些实施例中，掺杂剂注入是成角度的植入物。植入物从晶片的相对侧进行，并且因此从每个有效区域的相对侧进行。每个有源区域包括从一侧注入的区域和从相对侧注入的区域。两个区域重叠以便于阈值电压调整。

6. 发明申请

US20050266628A1 Substrate isolation in integrated circuits 有权
公开(公告)号：US20050266628A1
公开(公告)日：2005-12-01
申请号：US11193150
申请日：2005-07-29
申请人： Daniel Wang , Chunchieh Huang , Dong Kim
发明人： Daniel Wang , Chunchieh Huang , Dong Kim
IPC分类号： H01L21/762 , H01L21/8234 , H01L21/8247 , H01L27/105 , H01L21/336
CPC分类号： H01L27/11526 , H01L21/76237 , H01L21/823481 , H01L27/105 , H01L27/11539 , H01L27/11546
摘要： Substrate isolation trench (224) are formed in a semiconductor substrate (120). Dopant (e.g. boron) is implanted into the trench sidewalls by ion implantation to suppress the current leakage along the sidewalls. During the ion implantation, the transistor gate dielectric (520) faces the ion stream, but damage to the gate dielectric is annealed in subsequent thermal steps. In some embodiments, the dopant implantation is an angled implant. The implant is performed from the opposite sides of the wafer, and thus from the opposite sides of each active area. Each active area includes a region implanted from one side and a region implanted from the opposite side. The two regions overlap to facilitate threshold voltage adjustment.

7. 发明申请

US20050170578A1 Use of pedestals to fabricate contact openings 失效
标题翻译：使用基座制作接触孔
公开(公告)号：US20050170578A1
公开(公告)日：2005-08-04
申请号：US10772520
申请日：2004-02-04
申请人： Chia-Shun Hsiao , Chunchieh Huang , Jin-Ho Kim , Kuei-Chang Tsai , Barbara Haselden , Daniel Wang
发明人： Chia-Shun Hsiao , Chunchieh Huang , Jin-Ho Kim , Kuei-Chang Tsai , Barbara Haselden , Daniel Wang
IPC分类号： H01L21/76 , H01L21/8238 , H01L21/8247 , H01L27/115
CPC分类号： H01L27/11539 , H01L27/115 , H01L27/11526
摘要： Nonvolatile memory wordlines (160) are formed as sidewall spacers on sidewalls of control gate structures (280). Each control gate structure may contain floating and control gates (120, 140), or some other elements. Pedestals (340) are formed adjacent to the control gate structures before the conductive layer (160) for the wordlines is deposited. The pedestals will facilitate formation of the contact openings (330.1) that will be etched in an overlying dielectric (310) to form contacts to the wordlines. The pedestals can be dummy structures. A pedestal can physically contact two wordlines.
摘要翻译：非易失性存储器字线（160）形成为控制栅极结构（280）的侧壁上的侧壁间隔物。每个控制栅极结构可以包含浮动和控制栅极（120,140）或一些其它元件。在用于字线的导电层（160）被沉积之前，基座（340）形成为与控制栅极结构相邻。基座将有助于形成将在上覆电介质（310）中蚀刻的接触开口（330.1），以形成与字线的接触。基座可以是虚拟结构。基座可以物理接触两个字线。

8. 发明授权

US11126146B2 Wearable electronic device 有权
公开(公告)号：US11126146B2
公开(公告)日：2021-09-21
申请号：US16914857
申请日：2020-06-29
申请人： Daniel Wang , Li-Yuan Wang
发明人： Daniel Wang , Li-Yuan Wang
IPC分类号： G06F1/16 , G04G17/08 , G04G17/04 , H02J50/10 , G06F3/01
摘要： A wearable electronic device includes a body having a first battery and a port electrically connected to the first battery, a band having a connector and a set of first conductors electrically connected to the connector, and a belt having at least one second battery, a set of second conductors and an input port electrically connected to the second battery. The band is connected to the port via the connector so as to be electrically connected to the body. The belt may removably attach to an outer surface of the band, and the second battery may transmit power to the first battery by combining the two sets of conductors. When the belt is removed, the power consumed by the second battery is replenished by an external power source connected to the input port, mastering the information at any time.

9. 发明授权

US09931829B2 Methods and apparatus for hygromorphic shape control 有权
公开(公告)号：US09931829B2
公开(公告)日：2018-04-03
申请号：US14927375
申请日：2015-10-29
申请人： Lining Yao , Wen Wang , Jifei Ou , Chin-Yi Cheng , Guanyun Wang , Hiroshi Ishii , Daniel Wang , Helene Steiner , Clark Della Silva
发明人： Lining Yao , Wen Wang , Jifei Ou , Chin-Yi Cheng , Guanyun Wang , Hiroshi Ishii , Daniel Wang , Helene Steiner , Clark Della Silva
IPC分类号： B33Y80/00 , B33Y10/00 , B33Y30/00 , B29C67/00
CPC分类号： B33Y80/00 , B29C64/106 , B29C64/112 , B29C64/20 , B29C64/386 , B33Y10/00 , B33Y30/00
摘要： A composite film includes a substrate that is not responsive to relative humidity, and also one or more layers of hygromorphic material. The hygromorphic material expands in response to an increase in relative humidity and contracts in response to a decrease in relative humidity. In some cases, the composite film is bi-layer or tri-layer. The composite films are fabricated such that they undergo a desired bending pattern in response to changes in relative humidity. In some cases, these bending patterns are combinations of two bending primitives: a smooth curve and a sharply angled curve. These two primitives are combined to create a variety of shape transformations including 1D linear transformation, 2D surface expansion and contraction, 2.5D texture change and 3D folding. Any type of hygromorphic material may be employed, including living gram positive and gram negative bacterial cells, yeast cells, plant cells, mammalian cells, cell debris, or hydrogel.

10. 发明授权

US08338565B2 Macrocyclic compounds for inhibition of tumor necrosis factor alpha 失效
标题翻译：用于抑制肿瘤坏死因子α的大环化合物
公开(公告)号：US08338565B2
公开(公告)日：2012-12-25
申请号：US12544604
申请日：2009-08-20
申请人： Jinbo Lee , Julian F. Bond , Nicholas Terrett , Frank G. Favaloro, Jr. , Daniel Wang , Timothy F. Briggs , Benjamin Adam Seigal , Wei-Chuan Sun , Stephen P. Hale
发明人： Jinbo Lee , Julian F. Bond , Nicholas Terrett , Frank G. Favaloro, Jr. , Daniel Wang , Timothy F. Briggs , Benjamin Adam Seigal , Wei-Chuan Sun , Stephen P. Hale
IPC分类号： C07K11/02 , A61K38/12
CPC分类号： C07D273/00 , C07D257/02
摘要： Disclosed herein are macrocyclic compounds and methods for their synthesis and use. In particular, macrocyclic compounds are disclosed that modulate the activity of tumor necrosis factor alpha and/or are useful in the treatment of medical conditions, such as, rheumatoid arthritis, psoriasis, and asthma.
摘要翻译：本文公开了大环化合物及其合成和使用的方法。特别地，公开了调节肿瘤坏死因子α的活性和/或可用于治疗诸如类风湿性关节炎，牛皮癣和哮喘等医学病症的大环化合物。

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