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    • 1. 发明申请
    • Digital phase-locked loop
    • 数字锁相环
    • US20050265505A1
    • 2005-12-01
    • US10856447
    • 2004-05-28
    • Dale NelsonParag Parikh
    • Dale NelsonParag Parikh
    • H03D3/24H03L7/089H03L7/099H03L7/18
    • H03L7/089H03L7/0995H03L7/0997H03L7/18H03L2207/50
    • A phase-locked loop includes a variable frequency generator, a comparator and a counter. The variable frequency generator is configurable for generating an output signal having a frequency which varies based at least in part on at least first and second control signals presented thereto. The comparator is configurable for receiving a first signal and a second signal, the first signal being an input signal presented to the phase-locked loop and the second signal being representative of the output signal from the variable frequency generator. The comparator generates a difference signal representative of a difference between a phase and/or a frequency of the first and second signals, the difference signal comprising the first control signal. The counter is configurable for generating an output count based at least in part on the difference signal from the comparator. The output count is a digital representation of the difference signal, the output count comprising the second control signal. The frequency of the output signal from the variable frequency generator is determined as a function of the difference signal and the output count.
    • 锁相环包括可变频率发生器,比较器和计数器。 可变频率发生器可配置用于产生具有至少部分地基于呈现给其的至少第一和第二控制信号而变化的频率的输出信号。 比较器可配置为接收第一信号和第二信号,第一信号是呈现给锁相环的输入信号,第二信号代表来自可变频率发生器的输出信号。 比较器产生表示第一和第二信号的相位和/或频率之间的差的差分信号,差分信号包括第一控制信号。 计数器可配置用于至少部分地基于来自比较器的差分信号来产生输出计数。 输出计数是差分信号的数字表示,输出计数包括第二控制信号。 来自可变频率发生器的输出信号的频率被确定为差分信号和输出计数的函数。
    • 4. 发明授权
    • Enhanced delay matching buffer circuit
    • 增强型延迟匹配缓冲电路
    • US08466728B2
    • 2013-06-18
    • US11360201
    • 2006-02-23
    • Dale Nelson
    • Dale Nelson
    • H03H11/26
    • H03K19/00384H03K5/133H03K19/00323
    • A buffer circuit includes an input stage including at least one MOS device having a first threshold voltage associated therewith, the input stage being adapted to receive an input signal referenced to a first voltage supply. The buffer circuit further includes an output stage including at least one MOS transistor having the first threshold voltage associated therewith, an input of the output stage being connected to an output of the input stage, the output stage being operative to generate an output signal which is indicative of a logic state of the input signal. The buffer circuit includes a delay control circuit adapted for connection between at least one of the first voltage supply and a voltage return of the buffer circuit, and at least one of the input stage and the output stage. The delay control circuit includes at least one MOS device having a second threshold voltage associated therewith. The MOS device in the delay control circuit being adapted to receive, as a control signal, a second voltage supply, a delay of the buffer circuit being at least partially controlled as a function of a process parameter, the second voltage supply and/or a temperature of the MOS device in the delay control circuit.
    • 缓冲电路包括输入级,其包括具有与其相关联的第一阈值电压的至少一个MOS器件,所述输入级适于接收参考第一电压源的输入信号。 缓冲电路还包括输出级,其包括至少一个MOS晶体管,其具有与之相关联的第一阈值电压,输出级的输入端连接到输入级的输出端,输出级用于产生输出信号, 表示输入信号的逻辑状态。 缓冲电路包括适于连接第一电压源和缓冲电路的电压返回中的至少一个以及输入级和输出级中的至少一个的延迟控制电路。 延迟控制电路包括具有与其相关联的第二阈值电压的至少一个MOS器件。 延迟控制电路中的MOS器件适于接收作为控制信号的第二电压源,缓冲电路的延迟至少部分地被控制为处理参数的函数,第二电压源和/或 延迟控制电路中MOS器件的温度。
    • 7. 发明授权
    • Low voltage differential voltage-controlled ring oscillator
    • 低压差分电压控制环形振荡器
    • US06396357B1
    • 2002-05-28
    • US09562305
    • 2000-05-01
    • Lizhong SunDale Nelson
    • Lizhong SunDale Nelson
    • H03B524
    • H03K3/0315H03K3/354
    • A ring oscillator including a voltage-to-current converter for producing at least one control current from at least one control voltage and, a plurality of delay cells coupled to the converter, wherein at least one output of the one of the delay cells is coupled to the input of another of the delay cells, wherein the voltage-to-current converter produces a substantially linear output when the at least one control voltage is varied between zero volts and a rail supply voltage. Since the ring oscillator operates from a low voltage source, it can be used in applications where power supply (e.g., battery size) is small (e.g., pagers, cellular phone applications).
    • 一种环形振荡器,包括用于从至少一个控制电压产生至少一个控制电流的电压 - 电流转换器,以及耦合到转换器的多个延迟单元,其中所述一个延迟单元的至少一个输出耦合 到另一个延迟单元的输入,其中当至少一个控制电压在零伏特和轨道电源电压之间变化时,电压 - 电流转换器产生基本上线性的输出。 由于环形振荡器由低电压源工作,因此可用于电源(例如,电池尺寸)小(例如,寻呼机,蜂窝电话应用)的应用中。