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1. 发明申请

US20050138496A1 Method and apparatus for test and repair of marginally functional SRAM cells 失效
标题翻译：用于边缘功能SRAM单元的测试和修复的方法和装置
公开(公告)号：US20050138496A1
公开(公告)日：2005-06-23
申请号：US10725668
申请日：2003-12-02
申请人： Ciaran Brennan , Steven Eustis , Michael Fragano , Michael Ouellette , Neelesh Pai , Jeremy Rowland , Kevin Tompsett , David Wager
发明人： Ciaran Brennan , Steven Eustis , Michael Fragano , Michael Ouellette , Neelesh Pai , Jeremy Rowland , Kevin Tompsett , David Wager
IPC分类号： G01R31/28 , G11C29/00 , G11C29/44
CPC分类号： G11C29/4401 , G11C11/41 , G11C29/44 , G11C29/70 , G11C2029/0401
摘要： A method of manufacturing a device having embedded memory including a plurality of memory cells. During manufacturing test, a first test stress is applied to selected cells of the plurality of memory cells with a built-in self test. At least one weak memory cell is identified. The at least one weak memory cell is repaired. A second test stress is applied to the selected cells and the repaired cells with the built-in self test.
摘要翻译：一种制造具有包括多个存储单元的嵌入式存储器的装置的方法。在制造测试期间，通过内置的自我测试将第一测试应力施加到多个存储单元的选定单元。识别至少一个弱记忆体单元。至少一个弱记忆体被修复。第二个测试应力应用于所选择的细胞和修复的细胞与内置的自我测试。

2. 发明申请

US20080089116A1 SRAM voltage control for improved operational margins 有权
公开(公告)号：US20080089116A1
公开(公告)日：2008-04-17
申请号：US11998948
申请日：2007-12-03
申请人： Wayne Ellis , Randy Mann , David Wager , Robert Wong
发明人： Wayne Ellis , Randy Mann , David Wager , Robert Wong
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C5/14 , G11C11/413
摘要： A static random access memory (“SRAM”) is provided which includes a plurality of SRAM cells arranged in an array having a plurality of portions. The SRAM includes a plurality of voltage control circuits corresponding to respective ones of the plurality of portions of the array. Each of the plurality of voltage control circuits is coupled to an output of a power supply, each voltage control circuit having a function to temporarily reduce a voltage provided to power supply inputs of a plurality of SRAM cells that belong to a selected one of the plurality of portions of the SRAM. The power supply voltage to the selected portion is reduced during a write operation in which a bit is written to one of the SRAM cells belonging to the selected portion.

3. 发明申请

US20070121370A1 SRAM VOLTAGE CONTROL FOR IMPROVED OPERATIONAL MARGINS 有权
标题翻译：用于改进操作标准的SRAM电压控制
公开(公告)号：US20070121370A1
公开(公告)日：2007-05-31
申请号：US11164556
申请日：2005-11-29
申请人： Wayne Ellis , Randy Mann , David Wager , Robert Wong
发明人： Wayne Ellis , Randy Mann , David Wager , Robert Wong
IPC分类号： G11C11/00
CPC分类号： G11C5/14 , G11C11/413
摘要： A static random access memory (“SRAM”) is provided which includes a plurality of SRAM cells arranged in an array. The array includes a plurality of rows and a plurality of columns. The SRAM includes a plurality of voltage control corresponding to respective ones of the plurality of columns of the array. Each of the plurality of voltage control circuits are coupled to an output of a power supply, each voltage control circuit having a function to temporarily reduce a voltage provided to power supply inputs of a plurality of SRAM cells that belong to a selected column of columns of the SRAM. The selected column is selected and the power supply voltage to that column is reduced during a write operation in which a bit is written to one of the SRAM cells belonging to the selected column.
摘要翻译：提供了包括以阵列布置的多个SRAM单元的静态随机存取存储器（“SRAM”）。阵列包括多个行和多个列。 SRAM包括对应于阵列的多个列中的相应列的多个电压控制。多个电压控制电路中的每一个耦合到电源的输出，每个电压控制电路具有临时降低提供给属于所选列列的多个SRAM单元的电源输入的电压的功能 SRAM。选择的列被选择，并且在将位写入属于所选列的SRAM单元之一的写操作期间，该列的电源电压减小。

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