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1. 发明授权

US11291196B2 Outrigger kit for fishing 有权
公开(公告)号：US11291196B2
公开(公告)日：2022-04-05
申请号：US15998281
申请日：2018-07-30
申请人： Michael Ouellette
发明人： Michael Ouellette
IPC分类号： A01K91/08 , A01K87/02 , A01K97/08 , A01K87/04
摘要： This invention provides an outrigger assembly for fishing that can be quickly deployed from a portable bag about 1 meter long into a fully rigged outrigger in a selected length of 4 meters, 5 meters or 6 meters. Variable length is obtained by adding sections of telescoping pole. Quick deployment is obtained by using detachable line guides that are radially (or side) threadable in conjunction with a separate preassembled outrigger line loop for each deployed length. Different length outrigger line loop assemblies are color coded for quick identification. Stowed length and volume of the collapsed telescoping pole is minimized by the use of outrigger line guides that are removable from the outrigger pole. Threading and unthreading of an outrigger line loop without opening the loop is enabled by the radially threadable line guides. The invention also provides an outrigger holder having two sockets, one for the outrigger and one for a fishing pole.

2. 发明申请

US20080037340A1 APPARATUS FOR TESTING A MEMORY OF AN INTEGRATED CIRCUIT 失效
标题翻译：用于测试集成电路存储器的装置
公开(公告)号：US20080037340A1
公开(公告)日：2008-02-14
申请号：US11875009
申请日：2007-10-19
申请人： Michael Ouellette , Jeremy Rowland
发明人： Michael Ouellette , Jeremy Rowland
IPC分类号： G11C29/00
CPC分类号： G11C29/4401 , G11C29/14 , G11C29/24 , G11C29/44
摘要： An apparatus for testing a memory of an integrated circuit for a defect. The apparatus includes a test unit for testing a redundant memory element only when the redundant memory element has been enabled to replace a failed memory element.
摘要翻译：一种用于测试用于缺陷的集成电路的存储器的装置。该装置包括仅当冗余存储元件已被使能以替换故障存储器元件时才用于测试冗余存储器元件的测试单元。

3. 外观设计

USD558447S1 Bag for powered ice auger 有权
标题翻译：用于动力式冰铲的袋子
公开(公告)号：USD558447S1
公开(公告)日：2008-01-01
申请号：US29258632
申请日：2006-04-25
申请人： Michael Ouellette
设计人： Michael Ouellette

4. 发明申请

US20070033458A1 Diagnostic Method and Apparatus For Non-Destructively Observing Latch Data 失效
标题翻译：用于非破坏性观察锁存数据的诊断方法和装置
公开(公告)号：US20070033458A1
公开(公告)日：2007-02-08
申请号：US11533907
申请日：2006-09-21
申请人： Darren Anand , John Goss , Peter Jacobsen , Michael Ouellette , Thomas Sopchak , Donald Wheater
发明人： Darren Anand , John Goss , Peter Jacobsen , Michael Ouellette , Thomas Sopchak , Donald Wheater
IPC分类号： G01R31/28
CPC分类号： G11C19/00 , G11C29/003
摘要： The invention provides a circuit that can observe data within shift registers without altering the data. The circuit includes selectors connected to the inputs and outputs of the shift registers. The selectors selectively connect the input with the output of a selected shift register to form a wiring loop for the selected shift register. A control device connected to the wiring loop uses the wiring loop to cause the data to be continually transferred from the output of the selected shift register to the input of the selected shift register and back through the selected shift register in a circular manner. The control device includes a counter used for determining the length of a selected shift register and a set of registers to store, for future use when rotating data in the shift registers, the length of each shift register. The control device also includes a data output accessible from outside the circuit. An observation wire is connected to the wiring loop, and the data passes from the wiring loop to the control device through the observation wire. The control device outputs data appearing on the wiring loop as the data is circulated through the selected shift register to permit data within the selected shift register to be observed outside the circuit without altering the data within the selected shift register.
摘要翻译：本发明提供一种可以观察移位寄存器内的数据而不改变数据的电路。该电路包括连接到移位寄存器的输入和输出的选择器。选择器选择性地将输入与所选移位寄存器的输出连接，以形成所选移位寄存器的布线回路。连接到布线回路的控制装置使用布线回路使得数据从所选择的移位寄存器的输出连续地传送到所选择的移位寄存器的输入端并循环地返回所选择的移位寄存器。控制装置包括用于确定所选择的移位寄存器的长度的计数器和一组寄存器，用于存储当在移位寄存器中旋转数据时将来使用的每个移位寄存器的长度。控制装置还包括从电路外部可访问的数据输出。观察线连接到布线回路，数据通过观察线从布线回路传递给控制装置。当数据通过选定的移位寄存器循环时，控制装置输出出现在布线环路上的数据，以允许在电路外观察所选移位寄存器内的数据，而不改变所选移位寄存器内的数据。

5. 发明申请

US20060176745A1 COMPILABLE MEMORY STRUCTURE AND TEST METHODOLOGY FOR BOTH ASIC AND FOUNDRY TEST ENVIRONMENTS 有权
标题翻译：可编程存储器结构和测试方法用于两个ASIC和基准测试环境
公开(公告)号：US20060176745A1
公开(公告)日：2006-08-10
申请号：US10906147
申请日：2005-02-04
申请人： Steven Eustis , James Monzel , Steven Oakland , Michael Ouellette
发明人： Steven Eustis , James Monzel , Steven Oakland , Michael Ouellette
IPC分类号： G11C29/00
CPC分类号： G11C29/48 , G11C29/1201 , G11C2029/3202
摘要： A memory structure configured for supporting multiple test methodologies includes a first plurality of multiplexers configured for selectively coupling at least one data input path and at least one address path between an external customer connection and a corresponding internal memory connection associated therewith. A second multiplexer is configured for selectively coupling an input of a test latch between a functional memory array connection and a memory logic connection coupled to the at least one data input path, with an output of the test latch defining a data out customer connection. Flush logic is further configured to direct data from the memory logic connection to the data out customer connection during a test of logic associated with a customer chip, thereby facilitating observation of the memory logic connection at the customer chip, wherein test elements of the memory structure comprise a scan architecture of a first type, and test elements of the customer chip comprise a scan architecture of a second type.
摘要翻译：配置用于支持多种测试方法的存储器结构包括：第一多个复用器，被配置为选择性地耦合至少一个数据输入路径和外部客户连接与与其相关联的对应的内部存储器连接之间的至少一个地址路径。第二多路复用器被配置用于在功能存储器阵列连接和耦合到所述至少一个数据输入路径的存储器逻辑连接之间选择性地耦合测试锁存器的输入，测试锁存器的输出定义数据输出客户连接。冲洗逻辑还被配置为在与客户芯片相关联的逻辑的测试期间将数据从存储器逻辑连接引导到数据输出客户连接，从而有助于观察客户芯片处的存储器逻辑连接，其中存储器结构的测试元件包括第一类型的扫描架构，并且客户芯片的测试元件包括第二类型的扫描架构。

6. 发明申请

US20060094763A1 Polymorphic forms of 6-[2-(methylcarbomoyl) phenyl sulfanyl]-3-E-[2-(pyridin-2-yl)ethenyl]indazole 审中-公开
标题翻译： 3-E- [2-（吡啶-2-基）乙烯基]吲唑的6- [2-（甲基羰基甲酰基）苯基硫烷基]
公开(公告)号：US20060094763A1
公开(公告)日：2006-05-04
申请号：US11264493
申请日：2005-10-31
申请人： Qiang Ye , Ryan Hart , Robert Kania , Michael Ouellette , Zhen Wu , Scott Zook
发明人： Qiang Ye , Ryan Hart , Robert Kania , Michael Ouellette , Zhen Wu , Scott Zook
IPC分类号： A61K31/4439 , C07D403/02
CPC分类号： C07D401/06
摘要： The present invention relates to novel polymorphic forms of 6-[2-(methylcarbamoyl)phenylsulfanyl]-3-E-[2-(pyridin-2-yl)ethenyl]indazole, and to processes for their preparation. Such polymorphic forms may be a component of a pharmaceutical composition and may be used to treat a hyperproliferative disorder or a mammalian disease condition mediated by protein kinase activity.
摘要翻译：本发明涉及6- [2-（甲基氨基甲酰基）苯基硫烷基] -3-E- [2-（吡啶-2-基）乙烯基]吲唑的新型多晶型物及其制备方法。这种多晶型物可以是药物组合物的组分，并且可以用于治疗由蛋白激酶活性介导的过度增殖性疾病或哺乳动物疾病状况。

7. 发明申请

US20060044049A1 LOW VOLTAGE PROGRAMMABLE eFUSE WITH DIFFERENTIAL SENSING SCHEME 有权
标题翻译：具有差分感应方案的低电压可编程电源
公开(公告)号：US20060044049A1
公开(公告)日：2006-03-02
申请号：US10711205
申请日：2004-09-01
申请人： Michael Ouellette , Larry Wissel
发明人： Michael Ouellette , Larry Wissel
IPC分类号： H01H37/76
CPC分类号： G11C29/027 , G11C17/14 , G11C17/16 , G11C17/18 , G11C29/02 , G11C29/50 , H01L2924/0002 , H01L2924/00
摘要： An electronic fuse structure is disclosed for integrated circuits that is programmable with low voltage and incorporates a differential sensing scheme. The programming step is performed at about 1.5 times Vdd while the sense operation is performed at Vdd, which limits the resistance variation through the electronic fuse caused by the sense operation. During the sense operation a gating transistor emulates the voltage drop across a fuse select transistor for the case of an intact fuse. A circuit and method for characterizing the resistance of the electronic fuse is also disclosed.
摘要翻译：公开了一种用于低电压编程的集成电路的电子熔丝结构，并结合了差分感测方案。在Vdd执行感测操作时，以大约1.5倍的Vdd执行编程步骤，这限制了由感测操作引起的电子熔断器的电阻变化。在感测操作期间，门控晶体管模拟保险丝选择晶体管上的电压降，用于完整的熔丝的情况。还公开了用于表征电子熔断器的电阻的电路和方法。

8. 发明申请

US20050267158A1 Polymorphic and amorphous forms of 2,5-dimethyl-2H-pyrazole-3-carboxylic acid {2-fluoro-5-[3-((E)-2 pyridin-2-YL-vinyl)-1H-indazol-6-ylamino]-phenyl}-amide 审中-公开
标题翻译： 2,5-二甲基-2H-吡唑-3-羧酸{2-氟-5- [3 - （（E）-2-吡啶-2-基） - 乙烯基）-1H-吲唑-6-羧酸的多晶型和无定形形式，吡啶-2-基氨基] - 苯基} - 酰胺
公开(公告)号：US20050267158A1
公开(公告)日：2005-12-01
申请号：US11081708
申请日：2005-03-15
申请人： Qiang Ye , Scott Zook , Michael Ouellette , Don Hettinger , Jayaram Srirangam , Robert Kania , Nabil Saeed , Matthew Wightlin , Mark Mitchell
发明人： Qiang Ye , Scott Zook , Michael Ouellette , Don Hettinger , Jayaram Srirangam , Robert Kania , Nabil Saeed , Matthew Wightlin , Mark Mitchell
IPC分类号： A61K31/4439 , C07D401/14 , C07D43/14
CPC分类号： C07D401/14
摘要： The invention provides several polymorphic forms and an amorphous form of 2,5-Dimethyl-2H-pyrazole-3-carboxylic acid {2-fluoro-5-[3-((E)-2-pyridin-2-yl-vinyl)-1H-indazol-6-ylamino]-phenyl}-amide, pharmaceutical compositions containing such polymorphic or amorphous forms, and methods of using such pharmaceutical compositions to treat disease states mediated by protein kinases, such as cancer and other disease states associated with unwanted angiogenesis and/or cellular proliferation.
摘要翻译：本发明提供了几种多晶型和无定形形式的2,5-二甲基-2H-吡唑-3-羧酸{2-氟-5- [3 - （（E）-2-吡啶-2-基 - 乙烯基） -1H-吲唑-6-基氨基] - 苯基} - 酰胺，含有这种多晶型或无定形形式的药物组合物，以及使用这种药物组合物治疗由蛋白激酶介导的疾病状态的方法，例如与不想要的血管生成和/或细胞增殖。

9. 发明申请

US20200029542A1 Outrigger kit for fishing 审中-公开
公开(公告)号：US20200029542A1
公开(公告)日：2020-01-30
申请号：US15998281
申请日：2018-07-30
申请人： Michael Ouellette
发明人： Michael Ouellette
IPC分类号： A01K97/08 , A01K87/02 , A01K87/04
摘要： This invention provides an outrigger assembly for fishing that can be quickly deployed from a portable bag about 1 meter long into a fully rigged outrigger in a selected length of 4 meters, 5 meters or 6 meters. Variable length is obtained by adding sections of telescoping pole. Quick deployment is obtained by using detachable line guides that are radially (or side) threadable in conjunction with a separate preassembled outrigger line loop for each deployed length. Different length outrigger line loop assemblies are color coded for quick identification. Stowed length and volume of the collapsed telescoping pole is minimized by the use of outrigger line guides that are removable from the outrigger pole. Threading and unthreading of an outrigger line loop without opening the loop is enabled by the radially threadable line guides. The invention also provides an outrigger holder having two sockets, one for the outrigger and one for a fishing pole.

10. 发明申请

US20080037341A1 ENABLING MEMORY REDUNDANCY DURING TESTING 有权
标题翻译：在测试期间启用记忆冗余
公开(公告)号：US20080037341A1
公开(公告)日：2008-02-14
申请号：US11875011
申请日：2007-10-19
申请人： Michael Ouellette , Jeremy Rowland
发明人： Michael Ouellette , Jeremy Rowland
IPC分类号： G11C29/00
CPC分类号： G11C29/4401 , G11C29/14 , G11C29/24 , G11C29/44
摘要： Methods and apparatuses for enabling a redundant memory element (20) during testing of a memory array (14). The memory array (14) includes general memory elements (18) and redundant memory elements (20). The general memory elements (18) are tested and any defective general memory elements (18) are replaced with redundant memory elements (20). The redundant memory elements (20) are tested only when they are enabled.
摘要翻译：用于在存储器阵列（14）的测试期间启用冗余存储元件（20）的方法和装置。存储器阵列（14）包括通用存储元件（18）和冗余存储元件（20）。一般存储器元件（18）被测试，并且任何有缺陷的通用存储器元件（18）被替换为冗余存储元件（20）。冗余存储器元件（20）仅在使能时被测试。

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