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1. 发明授权

US07084475B2 Lateral conduction Schottky diode with plural mesas 有权
标题翻译：具有多个台面的横向导通肖特基二极管
公开(公告)号：US07084475B2
公开(公告)日：2006-08-01
申请号：US10780363
申请日：2004-02-17
申请人： Bryan S. Shelton , Linlin Liu , Alex D. Ceruzzi , Michael Murphy , Milan Pophristic , Boris Peres , Richard A. Stall , Xiang Gao , Ivan Eliashevich
发明人： Bryan S. Shelton , Linlin Liu , Alex D. Ceruzzi , Michael Murphy , Milan Pophristic , Boris Peres , Richard A. Stall , Xiang Gao , Ivan Eliashevich
IPC分类号： H01L29/47
CPC分类号： H01L24/81 , H01L29/0692 , H01L29/2003 , H01L29/872 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01023 , H01L2924/0103 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01078 , H01L2924/01079 , H01L2924/01087 , H01L2924/014 , H01L2924/12032 , H01L2924/00
摘要： A lateral conduction Schottky diode includes multiple mesa regions upon which Schottky contacts are formed and which are at least separated by ohmic contacts to reduce the current path length and reduce current crowding in the Schottky contact, thereby reducing the forward resistance of a device. The multiple mesas may be isolated from one another and have sizes and shapes optimized for reducing the forward resistance. Alternatively, some of the mesas may be finger-shaped and intersect with a central mesa or a bridge mesa, and some or all of the ohmic contacts are interdigitated with the finger-shaped mesas. The dimensions of the finger-shaped mesas and the perimeter of the intersecting structure may be optimized to reduce the forward resistance. The Schottky diodes may be mounted to a submount in a flip chip arrangement that further reduces the forward voltage as well as improves power dissertation and reduces heat generation.
摘要翻译：横向导通肖特基二极管包括形成肖特基接触的多个台面区域，其至少由欧姆接触分开，以减小电流路径长度并减少肖特基接触中的电流拥挤，从而降低器件的正向电阻。多个台面可以彼此隔离并且具有优化的尺寸和形状以减少前向阻力。或者，一些台面可以是手指形状并与中央台面或桥台面相交，并且部分或全部欧姆接触件与指状台面相互交错。指状台面的尺寸和相交结构的周长可以被优化以减小正向阻力。肖特基二极管可以以倒装芯片布置的方式安装到基座上，这进一步降低了正向电压，并且改善了功率论文并减少了发热。

2. 发明授权

US07115896B2 Semiconductor structures for gallium nitride-based devices 有权
标题翻译：用于氮化镓基器件的半导体结构
公开(公告)号：US07115896B2
公开(公告)日：2006-10-03
申请号：US10721488
申请日：2003-11-25
申请人： Shiping Guo , David Gotthold , Milan Pophristic , Boris Peres , Ivan Eliashevich , Bryan S. Shelton , Alex D. Ceruzzi , Michael Murphy , Richard A. Stall
发明人： Shiping Guo , David Gotthold , Milan Pophristic , Boris Peres , Ivan Eliashevich , Bryan S. Shelton , Alex D. Ceruzzi , Michael Murphy , Richard A. Stall
IPC分类号： H01L29/06
CPC分类号： H01L29/155 , C30B29/68 , H01L21/02381 , H01L21/02458 , H01L21/02491 , H01L21/02507 , H01L21/0254 , H01L29/2003 , H01L33/007
摘要： A nitride semiconductor is grown on a silicon substrate by depositing a few mono-layers of aluminum to protect the silicon substrate from ammonia used during the growth process, and then forming a nucleation layer from aluminum nitride and a buffer structure including multiple superlattices of AlRGa(1-R)N semiconductors having different compositions and an intermediate layer of GaN or other Ga-rich nitride semiconductor. The resulting structure has superior crystal quality. The silicon substrate used in epitaxial growth is removed before completion of the device so as to provide superior electrical properties in devices such as high-electron mobility transistors.
摘要翻译：在硅衬底上生长氮化物半导体，通过沉积几个单层铝，以保护硅衬底免受生长过程中使用的氨的影响，然后从氮化铝形成成核层，并形成包含多个超晶格Al 具有不同组成的半导体和GaN或其它富镓氮化物半导体的中间层的半导体。所得结构具有优异的晶体质量。在器件完成之前除去用于外延生长的硅衬底，以便在诸如高电子迁移率晶体管的器件中提供优异的电性能。

3. 发明授权

US07253015B2 Low doped layer for nitride-based semiconductor device 失效
标题翻译：用于氮化物基半导体器件的低掺杂层
公开(公告)号：US07253015B2
公开(公告)日：2007-08-07
申请号：US10780526
申请日：2004-02-17
申请人： Milan Pophristic , Michael Murphy , Richard A. Stall , Bryan S. Shelton , Linlin Liu , Alex D. Ceruzzi
发明人： Milan Pophristic , Michael Murphy , Richard A. Stall , Bryan S. Shelton , Linlin Liu , Alex D. Ceruzzi
IPC分类号： H01L21/00 , H01L33/00 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L29/452 , H01L29/157 , H01L29/2003 , H01L29/475 , H01L29/7787 , H01L29/872
摘要： A repeatable and uniform low doped layer is formed using modulation doping by forming alternating sub-layers of doped and undoped nitride semiconductor material atop another layer. A Schottky diode is formed of such a low doped nitride semiconductor layer disposed atop a much more highly doped nitride semiconductor layer. The resulting device has both a low on-resistance when the device is forward biased and a high breakdown voltage when the device is reverse biased.
摘要翻译：通过在另一层上形成掺杂和未掺杂的氮化物半导体材料的交替子层，通过调制掺杂形成可重复且均匀的低掺杂层。肖特基二极管由设置在更高掺杂的氮化物半导体层顶上的这种低掺杂氮化物半导体层形成。当器件正向偏置时，所得器件具有低导通电阻，器件反向偏置时具有高击穿电压。

4. 发明授权

US07863172B2 Gallium nitride semiconductor device 有权
标题翻译：氮化镓半导体器件
公开(公告)号：US07863172B2
公开(公告)日：2011-01-04
申请号：US12249099
申请日：2008-10-10
申请人： TingGang Zhu , Bryan S. Shelton , Marek K. Pabisz , Mark Gottfried , Linlin Liu , Milan Pophristic , Michael Murphy , Richard A. Stall
发明人： TingGang Zhu , Bryan S. Shelton , Marek K. Pabisz , Mark Gottfried , Linlin Liu , Milan Pophristic , Michael Murphy , Richard A. Stall
IPC分类号： H01L29/872 , H01L29/47
CPC分类号： H01L29/872 , H01L29/2003 , H01L29/475
摘要： A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n− doped GaN layer having a thickness greater than one micron disposed on said n+ GaN layer patterned into a plurality of elongated fingers and a metal layer disposed on the n− doped GaN layer and forming a Schottky junction therewith. The layer thicknesses and the length and width of the elongated fingers are optimized to achieve a device with breakdown voltage of greater than 500 volts, current capacity in excess of one ampere, and a forward voltage of less than three volts.
摘要翻译：由氮化镓基半导体肖特基二极管制成的n +掺杂GaN层，其厚度介于1微米与6微米之间，设置在蓝宝石衬底上; 设置在图案化成多个细长指状物的所述n + GaN层上的厚度大于1微米的n掺杂GaN层和设置在n掺杂GaN层上并与其形成肖特基结的金属层。优化了层厚度和细长指状物的长度和宽度，以实现具有大于500伏特的击穿电压，超过1安培的电流容量和小于3伏特的正向电压的器件。

5. 发明授权

US07436039B2 Gallium nitride semiconductor device 失效
标题翻译：氮化镓半导体器件
公开(公告)号：US07436039B2
公开(公告)日：2008-10-14
申请号：US11030554
申请日：2005-01-06
申请人： TingGang Zhu , Bryan S. Shelton , Marek K. Pabisz , Mark Gottfried , Linlin Liu , Milan Pophristic , Michael Murphy , Richard A. Stall
发明人： TingGang Zhu , Bryan S. Shelton , Marek K. Pabisz , Mark Gottfried , Linlin Liu , Milan Pophristic , Michael Murphy , Richard A. Stall
IPC分类号： H01L23/58
CPC分类号： H01L29/872 , H01L29/2003 , H01L29/475
摘要： A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n− doped GaN layer having a thickness greater than one micron disposed on said n+ GaN layer patterned into a plurality of elongated fingers and a metal layer disposed on the n− doped GaN layer and forming a Schottky junction therewith. The layer thicknesses and the length and width of the elongated fingers are optimized to achieve a device with breakdown voltage of greater than 500 volts, current capacity in excess of one ampere, and a forward voltage of less than three volts.
摘要翻译：由氮化镓基半导体肖特基二极管制成的n +掺杂GaN层，其厚度介于1微米与6微米之间，设置在蓝宝石衬底上; 设置在图案化成多个细长指状物的所述n + GaN层上的厚度大于1微米的n掺杂GaN层和设置在n掺杂GaN层上并与其形成肖特基结的金属层。优化了层厚度和细长指状物的长度和宽度，以实现具有大于500伏特的击穿电压，超过1安培的电流容量和小于3伏特的正向电压的器件。

6. 发明申请

US20090035925A1 Gallium Nitride Semiconductor Device 有权
标题翻译：氮化镓半导体器件
公开(公告)号：US20090035925A1
公开(公告)日：2009-02-05
申请号：US12249099
申请日：2008-10-10
申请人： TingGang Zhu , Bryan S. Shelton , Marek K. Pabisz , Mark Gottfried , Linlin Liu , Milan Pophristic , Michael Murphy , Richard A. Stall
发明人： TingGang Zhu , Bryan S. Shelton , Marek K. Pabisz , Mark Gottfried , Linlin Liu , Milan Pophristic , Michael Murphy , Richard A. Stall
IPC分类号： H01L21/425
CPC分类号： H01L29/872 , H01L29/2003 , H01L29/475
摘要： A gallium nitride based semiconductor Schottky diode fabricated from a n+ doped GaN layer having a thickness between one and six microns disposed on a sapphire substrate; an n− doped GaN layer having a thickness greater than one micron disposed on said n+ GaN layer patterned into a plurality of elongated fingers and a metal layer disposed on the n− doped GaN layer and forming a Schottky junction therewith. The layer thicknesses and the length and width of the elongated fingers are optimized to achieve a device with breakdown voltage of greater than 500 volts, current capacity in excess of one ampere, and a forward voltage of less than three volts.
摘要翻译：由氮化镓基半导体肖特基二极管制成的n +掺杂GaN层，其厚度介于1微米与6微米之间，设置在蓝宝石衬底上; 设置在图案化成多个细长指状物的所述n + GaN层上的厚度大于1微米的n掺杂GaN层和设置在n掺杂GaN层上并与其形成肖特基结的金属层。优化了层厚度和细长指状物的长度和宽度，以实现具有大于500伏特的击穿电压，超过1安培的电流容量和小于3伏特的正向电压的器件。

7. 发明授权

US6001183A Wafer carriers for epitaxial growth processes 失效
标题翻译：用于外延生长工艺的晶圆载体
公开(公告)号：US6001183A
公开(公告)日：1999-12-14
申请号：US723682
申请日：1996-09-30
申请人： Alexander I. Gurary , Eric A. Armour , Douglas A. Collins , Richard A. Stall
发明人： Alexander I. Gurary , Eric A. Armour , Douglas A. Collins , Richard A. Stall
IPC分类号： C23C16/458 , C23C16/46 , C30B25/12 , C23C16/00
CPC分类号： C23C16/4584 , C23C16/46 , C30B25/12
摘要： A wafer carrier/susceptor combination for use in an epitaxial deposition process has a configuration which provides greater thermal conductivity between the susceptor and the wafer carrier in regions substantially underlying the wafers than in regions not underlying the wafers. This difference in thermal conductivity is produced by configuring the wafer carrier or susceptor so that the lower surface of the wafer carrier is disposed closer to the susceptor in regions substantially underlying the wafers than in at least some regions not underlying the wafers. By controlling the thermal conductivity so that it is greater in certain regions than in other regions, the temperature difference between the wafers and the surface of the wafer carrier can be reduced, and a more uniform temperature distribution across the surface of the wafer can be achieved. As a result, the combination may be used to deposit a more uniform coating across the entire surface of each wafer.
摘要翻译：在外延沉积工艺中使用的晶片载体/基座组合具有这样一种构造，其在基底在晶片下方的区域中在不在晶片下方的区域中在基座和晶片载体之间提供更大的导热性。通过配置晶片载体或基座来产生这种热导率的差异，使得晶片载体的下表面在不在晶片下方的至少一些区域内的基本上位于晶片下方的区域中更靠近基座。通过控制热导率使其在某些区域比其他区域更大，可以减小晶片和晶片载体表面之间的温度差，并且可以实现跨晶片表面的更均匀的温度分布。结果，该组合可用于在每个晶片的整个表面上沉积更均匀的涂层。

8. 发明授权

US4592927A Growth of oxide thin films using solid oxygen sources 失效
标题翻译：使用固体氧源生长氧化物薄膜
公开(公告)号：US4592927A
公开(公告)日：1986-06-03
申请号：US585014
申请日：1984-03-02
申请人： Richard A. Stall
发明人： Richard A. Stall
IPC分类号： C23C14/08 , H01L21/316 , C23C16/40
CPC分类号： H01L21/02178 , C23C14/08 , H01L21/02164 , H01L21/02175 , H01L21/02194 , H01L21/02205 , H01L21/02269 , H01L21/31608 , H01L21/31612 , H01L21/31616 , H01L21/3162
摘要： Oxide (R.sub.m O.sub.n) films are grown by evaporation from separate sources of element (R) and an oxide (M.sub.r O.sub.s) which serves as the oxygen source. The oxide (M.sub.r O.sub.s) should sublimate congruently; i.e., without decomposing into oxygen and its constituent element (M). On the growth surface this oxide (M.sub.r O.sub.s) can react with the element (R) to form another oxide (R.sub.m O.sub.n) that is thermodynamically more stable:mR+M.sub.r O.sub.s .fwdarw.R.sub.m O.sub.n +M.sub.r O.sub.s-nUsing this technique, films of Al.sub.2 O.sub.3, MgO, SiO.sub.2, and MgAl.sub.2 O.sub.4 have been grown using As.sub.2 O.sub.3 or Sb.sub.2 O.sub.3 as the oxygen source.
摘要翻译：通过从作为氧源的元素（R）和氧化物（MrOs）的不同来源蒸发生长氧化物（RmOn）膜。氧化物（MrOs）应该一致地升华; 即不分解成氧及其组分元素（M）。在生长表面上，该氧化物（MrOs）可以与元素（R）反应形成热力学上更稳定的另一种氧化物（RmOn）：mR + MrOs-> RmOn + MrOs-n使用这种技术，Al2O3，MgO，使用As2O3或Sb2O3作为氧源生长SiO 2和MgAl 2 O 4。

9. 发明授权

US4838983A Gas treatment apparatus and method 失效
标题翻译：气体处理装置及方法
公开(公告)号：US4838983A
公开(公告)日：1989-06-13
申请号：US169621
申请日：1988-03-18
申请人： Norman E. Schumaker , Richard A. Stall , Craig R. Nelson , Wilfried R. Wagner
发明人： Norman E. Schumaker , Richard A. Stall , Craig R. Nelson , Wilfried R. Wagner
IPC分类号： C23C16/44 , C23C16/455 , C30B25/14
CPC分类号： C23C16/45502 , C23C16/455 , C30B25/14
摘要： Substrates such as semiconductor wafers are treated with a gas by advancing the substrate along a path, preferably a circular path through the gas while maintaining a face of the substrate transverse, preferably oblique, to the path so taht the gas contacts be exposed from the face of the substrate. Preferably, a plurality of substrates are treated simultaneously, and the substrates serve as vanes to impel the gas into rotational motion, thereby pumping the gas through the process chamber. Preferably, the substrates are carried on susceptors having generally planar faces, the susceptors also serving as vanes impelling the gas into rotational motion. The gas may be a depositing gas for forming epitaxial layers on the faces of the substrates, or an etching gas.
摘要翻译：诸如半导体晶片的衬底通过使衬底沿着路径，优选地通过气体的圆形路径前进，同时将衬底的表面优选地倾斜地保持横向，优选地倾斜于路径，从而使气体触点暴露于面部的基底。优选地，同时处理多个基板，并且基板用作叶片以推动气体旋转运动，从而将气体泵送通过处理室。优选地，基板承载在具有大致平面的基座上，基座也用作将气体推动到旋转运动中的叶片。气体可以是用于在基板的表面上形成外延层的沉积气体或蚀刻气体。

10. 发明授权

US07235139B2 Wafer carrier for growing GaN wafers 失效
标题翻译：用于生长GaN晶圆的晶圆载体
公开(公告)号：US07235139B2
公开(公告)日：2007-06-26
申请号：US10975902
申请日：2004-10-28
申请人： Vadim Boguslavskiy , Alex Gurary , Richard A. Stall
发明人： Vadim Boguslavskiy , Alex Gurary , Richard A. Stall
IPC分类号： C23C16/00
CPC分类号： C23C16/4585 , C30B25/12 , C30B31/14
摘要： A wafer carrier for growing wafers includes a plate having a first surface and a second surface, a plurality of openings extending from the first surface to the second surface of the plate, and a porous element disposed in each of the plurality of openings, each porous element being adapted to support one or more wafers. The wafer carrier also has a blind central opening extending from the second surface toward the first surface of the plate, and a plurality of shafts extending outwardly from the blind central opening. Each shaft has a first end in communication with the blind central opening and a second end in communication with one of the porous elements for providing fluid communication between the blind central opening and one of the porous elements. Suction is formed at a surface of each porous element by drawing vacuum through the blind central opening and the shafts.
摘要翻译：用于生长晶片的晶片载体包括具有第一表面和第二表面的板，从板的第一表面延伸到第二表面的多个开口和设置在多个开口中的每一个中的多孔元件，每个多孔元件适于支撑一个或多个晶片。晶片载体还具有从第二表面朝向板的第一表面延伸的盲中心开口，以及从盲中心开口向外延伸的多个轴。每个轴具有与盲中心开口连通的第一端和与多孔元件之一连通的第二端，用于在盲中心开口和多孔元件之一之间提供流体连通。通过盲孔中心开口和轴抽真空，在每个多孔元件的表面上形成吸力。

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