专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06843881B2 Detecting chemiluminescent radiation in the cleaning of a substrate processing chamber 失效
标题翻译：在衬底处理室的清洁中检测化学发光辐射
公开(公告)号：US06843881B2
公开(公告)日：2005-01-18
申请号：US10115526
申请日：2002-04-02
申请人： Bok Hoen Kim , Nam Le , Martin Seamons , Ameeta Madhava , Michael P. Nault , Thomas Nowak , Tsutomu Tanaka , Moshe Sarfaty
发明人： Bok Hoen Kim , Nam Le , Martin Seamons , Ameeta Madhava , Michael P. Nault , Thomas Nowak , Tsutomu Tanaka , Moshe Sarfaty
IPC分类号： B08B7/00 , C23C16/44 , C23C16/52 , G01N21/76 , G05D27/02 , H01L21/306
CPC分类号： G05D27/02 , B08B7/0035 , C23C16/4405 , C23C16/52 , G01N21/76
摘要： In a substrate processing apparatus, a substrate processing chamber has a substrate support to support a substrate, a gas delivery system to provide an energized cleaning gas to the chamber to clean process residues formed on surfaces in the chamber during processing of the substrate, and an exhaust to exhaust the cleaning gas. A detector monitors a chemiluminescent radiation emitted from about a surface during cleaning of the process residues by the energized cleaning gas and generates a signal in relation to the monitored chemiluminescent radiation. A controller receives the signal and evaluates the signal to determine an endpoint of the cleaning process.
摘要翻译：在基板处理装置中，基板处理室具有用于支撑基板的基板支撑件，气体输送系统，用于向所述室提供通电的清洁气体，以清洁在所述基板的处理期间在所述室中形成的工艺残留物，以及排气以排出清洁气体。检测器在通过通电的清洁气体清洁过程残留物期间监测从表面周围发射的化学发光辐射，并产生与被监测的化学发光辐射有关的信号。控制器接收信号并评估信号以确定清洁过程的端点。

2. 发明授权

US06868856B2 Enhanced remote plasma cleaning 失效
标题翻译：增强远程等离子清洗
公开(公告)号：US06868856B2
公开(公告)日：2005-03-22
申请号：US09905515
申请日：2001-07-13
申请人： Thomas Nowak , Ian Latchford , Tsutomu Tanaka , Bok Heon Kim , Ping Xu , Jason Foster , Heath B. DeShong , Martin Seamons
发明人： Thomas Nowak , Ian Latchford , Tsutomu Tanaka , Bok Heon Kim , Ping Xu , Jason Foster , Heath B. DeShong , Martin Seamons
IPC分类号： B08B7/00 , C23C16/44 , C23C16/52 , H01J37/32 , B08B6/00 , H01L21/306
CPC分类号： H01J37/32862 , B08B7/00 , C23C16/4405 , C23C16/52 , Y10S134/902
摘要： Methods and apparatus for cleaning semiconductor processing equipment. The apparatus include both local and remote gas dissociators coupled to a semiconductor processing chamber to be cleaned. The methods include introducing a precursor gas into the remote dissociator where the gas is dissociated and introducing a portion of the dissociated gas into the chamber. Another portion of the dissociated gas which re-associates before introduction into the chamber is also introduced into the chamber where it is again dissociated. The dissociated gas combines with contaminants in the chamber and is exhausted from the chamber along with the contaminants.
摘要翻译：半导体加工设备清洗方法及装置。该装置包括耦合到待清洁的半导体处理室的局部和远程气体离解器。所述方法包括将前体气体引入到远离解离器中，其中气体被解离并将一部分解离的气体引入室中。在引入室之前重新结合的解离气体的另一部分也被引入室中，在那里再次解离。解离的气体与室内的污染物结合，并与污染物一起从室中排出。

3. 发明申请

US20120164829A1 FABRICATION OF THROUGH-SILICON VIAS ON SILICON WAFERS 有权
标题翻译：在硅陶瓷上制造通孔硅
公开(公告)号：US20120164829A1
公开(公告)日：2012-06-28
申请号：US12977060
申请日：2010-12-22
申请人： Nagarajan Rajagopalan , Ji Ae Park , Ryan Yamase , Shamik Patel , Thomas Nowak , Li-Qun Xia , Bok Hoen Kim , Ran Ding , Jim Baldino , Mehul Naik , Sesh Ramaswami
发明人： Nagarajan Rajagopalan , Ji Ae Park , Ryan Yamase , Shamik Patel , Thomas Nowak , Li-Qun Xia , Bok Hoen Kim , Ran Ding , Jim Baldino , Mehul Naik , Sesh Ramaswami
IPC分类号： H01L21/28
CPC分类号： H01L24/13 , H01L21/02074 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L21/3065 , H01L21/31116 , H01L21/67103 , H01L21/67109 , H01L21/6719 , H01L21/6835 , H01L21/68792 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76898 , H01L24/11 , H01L24/742 , H01L2221/68372 , H01L2221/68381 , H01L2224/11002 , H01L2224/11452 , H01L2224/1182 , H01L2224/13562 , H01L2224/1357 , H01L2224/13687 , H01L2224/742 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/351 , H01L2924/05042 , H01L2924/00
摘要： A through-silicon via fabrication method includes etching a plurality of through holes in a silicon plate. An oxide liner is deposited on the surface of the silicon plate and on the sidewalls and bottom wall of the through holes. A metallic conductor is then deposited in the through holes. In another version, which may be used concurrently with the oxide liner, a silicon nitride passivation layer is deposited on the exposed back surface of the silicon plate of the substrate.
摘要翻译：一种硅通孔制造方法包括蚀刻硅板中的多个通孔。在硅板的表面和通孔的侧壁和底壁上沉积氧化物衬垫。然后将金属导体沉积在通孔中。在可与氧化物衬垫同时使用的另一种方案中，氮化硅钝化层沉积在衬底的硅板的暴露后表面上。

4. 发明授权

US07572337B2 Blocker plate bypass to distribute gases in a chemical vapor deposition system 有权
标题翻译：阻挡板旁路以在化学气相沉积系统中分配气体
公开(公告)号：US07572337B2
公开(公告)日：2009-08-11
申请号：US11131010
申请日：2005-05-16
申请人： Juan Carlos Rocha-Alvarez , Ganesh Balasubramanian , Tom K. Cho , Deenesh Padhi , Thomas Nowak , Bok Hoen Kim , Hichem M'Saad , Daemian Raj
发明人： Juan Carlos Rocha-Alvarez , Ganesh Balasubramanian , Tom K. Cho , Deenesh Padhi , Thomas Nowak , Bok Hoen Kim , Hichem M'Saad , Daemian Raj
IPC分类号： C23C16/455 , C23F1/00 , H01L21/306 , C23C16/06 , C23C16/22
CPC分类号： C23C16/45574 , C23C16/4405 , C23C16/45565 , H01J37/3244 , H01J37/32449
摘要： Apparatus and methods for distributing gases into a processing chamber are disclosed. In one embodiment, the apparatus includes a gas distribution plate having a plurality of apertures disposed therethrough and a blocker plate having both a plurality of apertures disposed therethrough and a plurality of feed through passageways disposed therein. A first gas pathway delivers a first gas through the plurality of apertures in the blocker plate and the gas distribution plate. A bypass gas pathway delivers a second gas through the plurality of feed through passageways in the blocker plate and to areas around the blocker plate prior to the second gas passing through the gas distribution plate.
摘要翻译：公开了将气体分配到处理室中的装置和方法。在一个实施例中，该装置包括一个气体分配板，该气体分配板具有穿过其中的多个孔，以及一个阻挡板，其具有设置在其间的多个孔和设置在其中的多个进给通道。第一气体通道通过阻挡板和气体分配板中的多个孔传送第一气体。旁路气体通道在第二气体通过气体分配板之前，通过多个进料通过阻挡板中的通道和阻塞板周围的区域输送第二气体。

5. 发明申请

US20090068356A1 HIGH PRODUCTIVITY PLASMA PROCESSING CHAMBER 审中-公开
标题翻译：高生产力等离子体加工室
公开(公告)号：US20090068356A1
公开(公告)日：2009-03-12
申请号：US12255884
申请日：2008-10-22
申请人： MARIO David SILVETTI , David H. Quach , Bok Hoen Kim , Thomas Nowak , Thomas K. Cho , Fred H. Hariz , Robert B. Moore
发明人： MARIO David SILVETTI , David H. Quach , Bok Hoen Kim , Thomas Nowak , Thomas K. Cho , Fred H. Hariz , Robert B. Moore
IPC分类号： C23C16/00 , H01L21/3065
CPC分类号： C23C16/4404 , C23C16/4586 , H01J37/32522 , H01J2237/022
摘要： Embodiments of the present invention are generally directed to apparatus and methods for a plasma-processing chamber requiring less maintenance and downtime and possessing improved reliability over the prior art. In one embodiment, the apparatus includes a substrate support resting on a ceramic shaft, an inner shaft allowing for electrical connections to the substrate support at atmospheric pressure, an aluminum substrate support resting on but not fixed to a ceramic support structure, sapphire rest points swaged into the substrate support, and a heating element inside the substrate support arranged in an Archimedes spiral to reduce warping of the substrate support and to increase its lifetime. Methods include increasing time between in-situ cleans of the chamber by reducing particle generation from chamber surfaces. Reduced particle generation occurs via temperature control of chamber components and pressurization of non-processing regions of the chamber relative to the processing region with a purge gas.
摘要翻译：本发明的实施例一般涉及等离子体处理室的装置和方法，其需要较少的维护和停机时间，并且比现有技术具有更高的可靠性。在一个实施例中，该设备包括搁置在陶瓷轴上的基板支撑件，允许在大气压下与基板支撑件电连接的内轴，支撑在陶瓷支撑结构上但不固定到陶瓷支撑结构的铝基板支撑件，模锻的蓝宝石支架衬底支撑件内部的加热元件和布置在阿基米德螺旋中的衬底支撑件内的加热元件，以减少衬底支撑件的翘曲并增加其寿命。方法包括通过减少从室表面产生颗粒来增加室内原位清洗之间的时间。通过腔室部件的温度控制和腔室相对于处理区域的吹扫气体的非处理区域的加压而发生减少的颗粒产生。

6. 发明授权

US07371427B2 Reduction of hillocks prior to dielectric barrier deposition in Cu damascene 失效
标题翻译：在Cu大马士革的介电阻挡层沉积之前减少小丘
公开(公告)号：US07371427B2
公开(公告)日：2008-05-13
申请号：US10442579
申请日：2003-05-20
申请人： Nagarajan Rajagopalan , Meiyee Shek , Kegang Huang , Bok Hoen Kim , Hichem M'saad , Thomas Nowak
发明人： Nagarajan Rajagopalan , Meiyee Shek , Kegang Huang , Bok Hoen Kim , Hichem M'saad , Thomas Nowak
IPC分类号： B08B9/00 , B05D7/22
CPC分类号： H01L21/7684 , C23C16/4404 , C23G5/00 , H01L21/3212 , H01L21/76828 , H01L21/76838
摘要： Unwanted hillocks arising in copper layers due to formation of overlying barrier layers may be significantly reduced by optimizing various process parameters, alone or in combination. A first set of process parameters may be controlled to pre-condition the processing chamber in which the barrier layer is deposited. A second set of process parameters may be controlled to minimize energy to which a copper layer is exposed during removal of CuO prior to barrier deposition. A third set of process parameters may be controlled to minimize the thermal budget after removal of the copper oxide.
摘要翻译：由于形成覆盖势垒层而在铜层中产生的不希望的小丘可以通过单独或组合优化各种工艺参数而显着降低。可以控制第一组工艺参数以对其中沉积阻挡层的处理室进行预处理。可以控制第二组工艺参数，以在阻挡层沉积之前最小化去除CuO期间铜层暴露的能量。可以控制第三组工艺参数以最小化除去氧化铜后的热预算。

7. 发明授权

US08563095B2 Silicon nitride passivation layer for covering high aspect ratio features 有权
标题翻译：用于覆盖高纵横比特征的氮化硅钝化层
公开(公告)号：US08563095B2
公开(公告)日：2013-10-22
申请号：US12724396
申请日：2010-03-15
申请人： Nagarajan Rajagopalan , Xinhai Han , Ryan Yamase , Ji Ae Park , Shamik Patel , Thomas Nowak , Zhengjiang “David” Cui , Mehul Naik , Heung Lak Park , Ran Ding , Bok Hoen Kim
发明人： Nagarajan Rajagopalan , Xinhai Han , Ryan Yamase , Ji Ae Park , Shamik Patel , Thomas Nowak , Zhengjiang “David” Cui , Mehul Naik , Heung Lak Park , Ran Ding , Bok Hoen Kim
IPC分类号： H05H1/24 , C23C16/34
CPC分类号： H01L21/02068 , C23C16/345 , C23C16/45523 , H01L21/0217 , H01L21/02271 , H01L21/02274 , H01L21/0234 , H01L21/56 , H01L21/76832 , H01L21/76834 , H01L23/291 , H01L23/3171 , H01L24/11 , H01L24/13 , H01L24/742 , H01L2224/1181 , H01L2224/1182 , H01L2224/11827 , H01L2224/11831 , H01L2224/119 , H01L2224/11901 , H01L2224/13025 , H01L2224/131 , H01L2224/13147 , H01L2224/13562 , H01L2224/1358 , H01L2224/13583 , H01L2224/13687 , H01L2224/742 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01074 , H01L2924/01075 , H01L2924/014 , H01L2924/14 , H01L2924/351 , H01L2924/05042 , H01L2924/00014 , H01L2224/13099 , H01L2924/00
摘要： A method of forming a passivation layer comprising silicon nitride on features of a substrate is described. In a first stage of the deposition method, a dielectric deposition gas, comprising a silicon-containing gas and a nitrogen-containing gas, is introduced into the process zone and energized to deposit a silicon nitride layer. In a second stage, a treatment gas, having a different composition than that of the dielectric deposition gas, is introduced into the process zone and energized to treat the silicon nitride layer. The first and second stages can be performed a plurality of times.
摘要翻译：描述了在衬底的特征上形成包括氮化硅的钝化层的方法。在沉积方法的第一阶段中，将包含含硅气体和含氮气体的介电沉积气体引入工艺区域并通电以沉积氮化硅层。在第二阶段中，将具有不同于介电沉积气体的组成不同的处理气体引入处理区并通电以处理氮化硅层。第一和第二阶段可以执行多次。

8. 发明授权

US08329575B2 Fabrication of through-silicon vias on silicon wafers 有权
标题翻译：在硅晶片上制造通硅通孔
公开(公告)号：US08329575B2
公开(公告)日：2012-12-11
申请号：US12977060
申请日：2010-12-22
申请人： Nagarajan Rajagopalan , Ji Ae Park , Ryan Yamase , Shamik Patel , Thomas Nowak , Li-Qun Xia , Bok Hoen Kim , Ran Ding , Jim Baldino , Mehul Naik , Sesh Ramaswami
发明人： Nagarajan Rajagopalan , Ji Ae Park , Ryan Yamase , Shamik Patel , Thomas Nowak , Li-Qun Xia , Bok Hoen Kim , Ran Ding , Jim Baldino , Mehul Naik , Sesh Ramaswami
IPC分类号： H01L21/4763 , H01L21/44 , H01L21/31
CPC分类号： H01L24/13 , H01L21/02074 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L21/3065 , H01L21/31116 , H01L21/67103 , H01L21/67109 , H01L21/6719 , H01L21/6835 , H01L21/68792 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76898 , H01L24/11 , H01L24/742 , H01L2221/68372 , H01L2221/68381 , H01L2224/11002 , H01L2224/11452 , H01L2224/1182 , H01L2224/13562 , H01L2224/1357 , H01L2224/13687 , H01L2224/742 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/351 , H01L2924/05042 , H01L2924/00
摘要： A through-silicon via fabrication method includes etching a plurality of through holes in a silicon plate. An oxide liner is deposited on the surface of the silicon plate and on the sidewalls and bottom wall of the through holes. A metallic conductor is then deposited in the through holes. In another version, which may be used concurrently with the oxide liner, a silicon nitride passivation layer is deposited on the exposed back surface of the silicon plate of the substrate.
摘要翻译：一种硅通孔制造方法包括蚀刻硅板中的多个通孔。在硅板的表面和通孔的侧壁和底壁上沉积氧化物衬垫。然后将金属导体沉积在通孔中。在可与氧化物衬垫同时使用的另一种方案中，氮化硅钝化层沉积在衬底的硅板的暴露后表面上。

9. 发明授权

US07723228B2 Reduction of hillocks prior to dielectric barrier deposition in Cu damascene 有权
标题翻译：在Cu大马士革的介电阻挡层沉积之前减少小丘
公开(公告)号：US07723228B2
公开(公告)日：2010-05-25
申请号：US10442359
申请日：2003-05-20
申请人： Nagarajan Rajagopalan , Meiyee Shek , Kegang Huang , Bok Hoen Kim , Hichem M'saad , Thomas Nowak
发明人： Nagarajan Rajagopalan , Meiyee Shek , Kegang Huang , Bok Hoen Kim , Hichem M'saad , Thomas Nowak
IPC分类号： H01L21/4763
CPC分类号： H01L21/76838 , H01L21/02074 , H01L21/3185 , H01L21/32136 , H01L21/76828 , H01L21/7684
摘要： Unwanted hillocks arising in copper layers due to formation of overlying barrier layers may be significantly reduced by optimizing various process parameters, alone or in combination. A first set of process parameters may be controlled to pre-condition the processing chamber in which the barrier layer is deposited. A second set of process parameters may be controlled to minimize energy to which a copper layer is exposed during removal of CuO prior to barrier deposition. A third set of process parameters may be controlled to minimize the thermal budget after removal of the copper oxide.
摘要翻译：由于形成覆盖势垒层而在铜层中产生的不希望的小丘可以通过单独或组合优化各种工艺参数而显着降低。可以控制第一组工艺参数以对其中沉积阻挡层的处理室进行预处理。可以控制第二组工艺参数，以在阻挡层沉积之前最小化去除CuO期间铜层暴露的能量。可以控制第三组工艺参数以最小化除去氧化铜后的热预算。

10. 发明授权

US08283237B2 Fabrication of through-silicon vias on silicon wafers 有权
标题翻译：在硅晶片上制造通硅通孔
公开(公告)号：US08283237B2
公开(公告)日：2012-10-09
申请号：US12978129
申请日：2010-12-23
申请人： Nagarajan Rajagopalan , Ji Ae Park , Ryan Yamase , Shamik Patel , Thomas Nowak , Li-Qun Xia , Bok Hoen Kim , Ran Ding , Jim Baldino , Mehul Naik , Sesh Ramaswami
发明人： Nagarajan Rajagopalan , Ji Ae Park , Ryan Yamase , Shamik Patel , Thomas Nowak , Li-Qun Xia , Bok Hoen Kim , Ran Ding , Jim Baldino , Mehul Naik , Sesh Ramaswami
IPC分类号： H01L21/30 , H01L21/4763 , H01L21/44 , H01L21/31
CPC分类号： H01L24/13 , H01L21/02074 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L21/3065 , H01L21/31116 , H01L21/67103 , H01L21/67109 , H01L21/6719 , H01L21/6835 , H01L21/68792 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76898 , H01L24/11 , H01L24/742 , H01L2221/68372 , H01L2221/68381 , H01L2224/11002 , H01L2224/11452 , H01L2224/1182 , H01L2224/13562 , H01L2224/1357 , H01L2224/13687 , H01L2224/742 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01068 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/351 , H01L2924/05042 , H01L2924/00
摘要： A through-silicon via fabrication method comprises forming a substrate by bonding the front surface of a silicon plate to a carrier using an adhesive layer therebetween to expose the back surface of the silicon plate. A silicon nitride passivation layer is deposited on the exposed back surface of the silicon plate of the substrate. A plurality of through holes are etched in the silicon plate, the through holes comprising sidewalls and bottom walls. A metallic conductor is deposited in the through holes to form a plurality of through-silicon vias.
摘要翻译：通过硅通孔的制造方法包括通过使用其间的粘合剂层将硅板的前表面粘合到载体上来形成基板，以暴露硅板的背面。氮化硅钝化层沉积在衬底的硅板的暴露的背面上。在硅板中蚀刻多个通孔，通孔包括侧壁和底壁。金属导体沉积在通孔中以形成多个通硅通孔。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式