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    • 3. 发明授权
    • Method and system for simulating a communications bus
    • 用于模拟通信总线的方法和系统
    • US06442514B1
    • 2002-08-27
    • US09205328
    • 1998-12-04
    • Tony Viet Nam Le
    • Tony Viet Nam Le
    • G06F944
    • G06F11/261G06F17/5022
    • A method and system for simulation of a communications bus. A simulation arrangement is configured with a behavioral agent and an application agent coupled to the bus. Bus commands are selectively loaded in the behavioral and application agent in accordance with a desired simulation sequence. The behavioral agent is configurable with phase behavior instructions that specify assertion and deassertion times for selected signals by the behavioral agent. Compliant and non-compliant bus behavior can be simulated with the phase behavior instructions.
    • 一种用于模拟通信总线的方法和系统。 模拟布置被配置有与总线耦合的行为代理和应用代理。 总线命令根据期望的模拟序列选择性地加载到行为和应用代理中。 行为代理可配置相位行为指令,其指定行为代理对所选信号的断言和解除停机时间。 可以使用相位行为指令来模拟符合标准和不符合标准的总线行为。
    • 4. 发明授权
    • Method and apparatus for reducing particle contamination on wafer backside during CVD process
    • 用于在CVD工艺期间减少晶片背面上的颗粒污染的方法和装置
    • US06413321B1
    • 2002-07-02
    • US09731601
    • 2000-12-07
    • Bok Hoen KimMario Dave SilvettiAmeeta MadhavaDavood KhaliliMartin SeamonsEmanuele CappelloNam LeLloyd Berken
    • Bok Hoen KimMario Dave SilvettiAmeeta MadhavaDavood KhaliliMartin SeamonsEmanuele CappelloNam LeLloyd Berken
    • C23C1600
    • C23C16/4405C23C16/0209C23C16/4401C23C16/4404C23C16/4583
    • Backside particle contamination of semiconductor wafers subjected to chemical vapor deposition is significantly reduced by optimizing various process parameters, alone or in combination. A high quality oxide seasoning layer is deposited to improve adhesion and trapping of contaminants remaining after a prior chamber cleaning step. Second, wafer pre-heating reduces thermal stress on the wafer during physical contact between the wafer and heater. Third, the duration of the gas stabilization flow of thermally reactive process gas species prior to CVD reaction is reduced, thereby preventing side products produced during this stabilization flow from affecting the wafer backside. Fourth, the wafer heater is redesigned to minimize physical contact between the heater surface and the wafer backside. Redesign of the wafer heater may include providing only a few, small projections from the top wafer surface, and also may include providing a continuous circumferential rim supporting the edge of the wafer to interfere with the flow of process gases to the wafer backside during processing.
    • 经过化学气相沉积的半导体晶片的背面颗粒污染通过单独或组合优化各种工艺参数而显着降低。 沉积高质量的氧化物调味剂层以改善在先前的室清洁步骤之后残留的污染物的粘附和捕获。 其次,晶片预热在晶片和加热器之间的物理接触期间降低了晶片上的热应力。 第三,CVD反应之前的热反应过程气体种类的气体稳定化流程的持续时间减少,从而防止在该稳定化流程期间产生的副产物影响晶片背面。 第四,重新设计晶片加热器以最小化加热器表面和晶片背面之间的物理接触。 晶片加热器的重新设计可以包括仅从顶部晶片表面提供几个小的突起,并且还可以包括提供支撑晶片边缘的连续圆周边缘,以干扰处理期间晶片背面的工艺气体流。
    • 6. 发明授权
    • Method for preparing an N+PP+ or P+NN+ structure on silicon wafers
    • 在硅晶片上制备N + PP +或P + NN +结构的方法
    • US09082924B2
    • 2015-07-14
    • US13643641
    • 2011-04-26
    • Barbara Bazer-BachiMustapha LemitiNam Le QuangYvon Pellegrin
    • Barbara Bazer-BachiMustapha LemitiNam Le QuangYvon Pellegrin
    • H01L21/00H01L21/22H01L21/38H01L31/18H01L21/225H01L31/0224H01L31/068H01L29/12H01L31/0232
    • H01L31/18H01L21/225H01L21/2255H01L29/12H01L31/022425H01L31/02327H01L31/068H01L31/1804Y02E10/547Y02P70/521
    • The present invention relates to a method for preparing, on a silicon wafer, an n+pp+ or p+nn+ structure which includes the following consecutive steps: a) on a p or n silicon wafer (1), which includes a front surface (8) and a rear surface (9), a layer of boron-doped silicon oxide (BSG) (2) is formed on the rear surface (9) by PECVD, followed by a SiOx diffusion barrier (3); b) a source of phosphorus is diffused such that the phosphorus and the boron co-diffuse and in order also to form: on the front surface (8) of the wafer obtained at the end of step a), a layer of phosphorus-doped silicon oxide (PSG) (4) and an n+ doped area (5); and on the rear surface of the wafer obtained at the end of step a), a boron-rich area (BRL) (6), as well as a p+ doped area (7); c) the layers of BSG (2) and PSG (4) oxides and SiOx (3) are removed, the BRL (6) is oxidized and the layer resulting from said oxidation is removed. The invention also relates to a silicon wafer having an n+pp+ or p+nn+ structure, which can be obtained by said preparation method, as well as to a photovoltaic panel manufactured from such a silicon wafer.
    • 本发明涉及一种在硅晶片上制备n + pp +或p + nn +结构的方法,其包括以下连续步骤:a)在一个或多个硅晶片(1)上,其包括前表面(8) )和后表面(9),通过PECVD在后表面(9)上形成硼掺杂氧化硅层(BSG)(2),随后是SiO x扩散阻挡层(3); b)磷源扩散,使得磷和硼共扩散,并且还可以在步骤a)末端获得的晶片的前表面(8)上形成磷掺杂层 氧化硅(PSG)(4)和n +掺杂区域(5); 并且在步骤a)结束时获得的晶片的背面,富硼区(BRL)(6)以及p +掺杂区(7)上; c)除去BSG(2)和PSG(4)氧化物和SiO x(3)的层,BRL(6)被氧化,并且除去由所述氧化产生的层。 本发明还涉及可以通过所述制备方法获得的具有n + pp +或p + nn +结构的硅晶片以及由这种硅晶片制造的光伏面板。
    • 7. 发明授权
    • Film removal employing a remote plasma source
    • 使用远程等离子体源的膜去除
    • US06436303B1
    • 2002-08-20
    • US09359148
    • 1999-07-21
    • Bok Heon KimNam LeJoseph V. D'SouzaAshish Shrotriya
    • Bok Heon KimNam LeJoseph V. D'SouzaAshish Shrotriya
    • H01L2100
    • H01L21/67069C23C16/0245C23C16/4581C23C16/4585C30B25/12C30B25/14C30B33/00C30B33/12H01L21/31116
    • A method and device for removing film from a substrate are provided that take advantage of a remote plasma source to etch away undesired portions of films, such as dielectric films formed on a substrate. To that end, the method includes forming a plasma remotely with respect to the process chamber, from which a flow is created that is directed toward the substrate. The substrate is of a type having opposed major surfaces with a peripheral surface extending therebetween. A film, such as a dielectric film, is disposed on one of the opposed major surfaces and on the peripheral surface. The opposed major surface having the film thereon is shielded from the flow of reactive radicals while the peripheral surface is left exposed. In this fashion, the flow is maintained for a sufficient amount of time to remove film present on the peripheral surface.
    • 提供了从基板去除膜的方法和装置,其利用远程等离子体源来蚀刻诸如形成在基板上的电介质膜等不期望的部分的膜。 为此,该方法包括相对于处理室远程形成等离子体,产生朝向衬底的流动。 衬底是具有相对的主表面的类型,其周边表面在它们之间延伸。 诸如电介质膜的膜被设置在相对的主表面之一和外围表面上的一个上。 当其周围表面露出时,具有其上的膜的相对的主表面与反应性基团的流动被屏蔽。 以这种方式,保持流动足够的时间以除去存在于外围表面上的膜。