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    • 9. 发明授权
    • Compensated method to implement a high voltage discharge phase after erase pulse in a flash memory device
    • 补偿方法在闪存器件中擦除脉冲后实现高电压放电相位
    • US07177198B2
    • 2007-02-13
    • US11123979
    • 2005-05-06
    • Lorenzo BedaridaSimone BartoliGiorgio OddoneDavide Manfre′
    • Lorenzo BedaridaSimone BartoliGiorgio OddoneDavide Manfre′
    • G11C11/34
    • G11C16/14
    • A method for discharge in a flash memory device includes: initiating a discharge of a memory cell after an erase operation; coupling a first discharge circuit to a first plate of a gate-bulk capacitor, and a second discharge circuit to a second plate of the gate-bulk capacitor, where the first plate represents the common gate node of the memory cell and the second plate represents the bulk-source node of the memory cell; and coupling the common gate node and the bulk-source node to ground to provide for a complete discharge. The current injected into the first plate approximately equals the current extracted from the second plate. In this manner, dangerous oscillations of the gate and bulk-source voltages as they go to ground are eliminated without complicated designs or voltage limitators, and without sacrificing the fast discharge after the erase operation. The reliability of the discharge operation is thus significantly improved.
    • 一种闪速存储装置中的放电方法包括:在擦除操作之后启动存储单元的放电; 将第一放电电路耦合到栅极 - 体积电容器的第一板,以及将第二放电电路耦合到栅极 - 体积电容器的第二板,其中第一板表示存储单元的公共栅极节点,第二板表示 存储器单元的批量源节点; 并将公共栅极节点和体源节点耦合到地,以提供完全放电。 注入第一板的电流大约等于从第二板提取的电流。 以这种方式,在没有复杂设计或限压器的情况下,栅极和体源电压的危险振荡消除,而不会在擦除操作之后不牺牲快速放电。 因此,放电操作的可靠性显着提高。
    • 10. 发明申请
    • Compensated method to implement a high voltage discharge phase after erase pulse in a flash memory device
    • 补偿方法在闪存器件中擦除脉冲后实现高电压放电相位
    • US20060062063A1
    • 2006-03-23
    • US11123979
    • 2005-05-06
    • Lorenzo BedaridaSimone BartoliGiorgio OddoneDavide Manfre'
    • Lorenzo BedaridaSimone BartoliGiorgio OddoneDavide Manfre'
    • G11C16/04G11C7/00
    • G11C16/14
    • A method for discharge in a flash memory device includes: initiating a discharge of a memory cell after an erase operation; coupling a first discharge circuit to a first plate of a gate-bulk capacitor, and a second discharge circuit to a second plate of the gate-bulk capacitor, where the first plate represents the common gate node of the memory cell and the second plate represents the bulk-source node of the memory cell; and coupling the common gate node and the bulk-source node to ground to provide for a complete discharge. The current injected into the first plate approximately equals the current extracted from the second plate. In this manner, dangerous oscillations of the gate and bulk-source voltages as they go to ground are eliminated without complicated designs or voltage limitators, and without sacrificing the fast discharge after the erase operation. The reliability of the discharge operation is thus significantly improved.
    • 一种闪速存储装置中的放电方法包括:在擦除操作之后启动存储单元的放电; 将第一放电电路耦合到栅极 - 体积电容器的第一板,以及将第二放电电路耦合到栅极 - 体积电容器的第二板,其中第一板表示存储单元的公共栅极节点,第二板表示 存储器单元的批量源节点; 并将公共栅极节点和体源节点耦合到地,以提供完全放电。 注入第一板的电流大约等于从第二板提取的电流。 以这种方式,在没有复杂设计或限压器的情况下,栅极和体源电压的危险振荡消除,而不会在擦除操作之后不牺牲快速放电。 因此,放电操作的可靠性显着提高。