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1. 发明授权

US5012343A CCD delta-modulation focal plane 失效
标题翻译： CCD增量调制焦平面
公开(公告)号：US5012343A
公开(公告)日：1991-04-30
申请号：US461516
申请日：1989-12-29
申请人： William E. Jensen
发明人： William E. Jensen
IPC分类号： H04N5/355 , H04N5/372
CPC分类号： H04N3/1575 , H04N3/1568
摘要： A focal plane array for scanned imaging systems provides an increased dynamic range by encoding analog differences between scene pixel amplitudes at a detector unit cell. Charge Coupled Device (CCD) differentiators are utilized to encode the pixel deltas at the unit cell. These deltas are summed and transmitted in time delay and integration fashion with a CCD readout register. DC sense edge detector information is read out independently of the register AC signals, and thus provides a level from which to begin integration of the pixel deltas. The DC and AC scene information are contained in the reconstructed video.
摘要翻译：用于扫描成像系统的焦平面阵列通过在检测器单元单元处编码场景像素幅度之间的模拟差异来提供增加的动态范围。电荷耦合器件（CCD）微分器用于对单位晶胞的像素三角形进行编码。这些三角形以时间延迟和集成方式与CCD读出寄存器进行求和和传输。直流读出边缘检测器信息独立于寄存器AC信号读出，从而提供开始积分像素三角形的电平。 DC和AC场景信息包含在重建的视频中。

2. 发明授权

US4377755A Signal compressor apparatus 失效
标题翻译：信号压缩机装置
公开(公告)号：US4377755A
公开(公告)日：1983-03-22
申请号：US169231
申请日：1980-07-15
申请人： William E. Jensen
发明人： William E. Jensen
IPC分类号： G11C19/28 , H01L29/768 , H01L29/78 , H03K3/42
CPC分类号： G11C19/285 , H01L29/76875
摘要： A signal compressor apparatus utilizing a charge coupled device having a charge storage well wherein the charge storage capacity is variable over the integration time of the device. During the minimum charge storage period, the input charge which exceeds an established limit is dumped, thereby providing compression of the input signal.
摘要翻译：一种利用具有电荷存储阱的电荷耦合器件的信号压缩机装置，其中所述电荷存储容量在所述器件的积分时间上是可变的。在最小电荷存储期间，超过建立限制的输入电荷被转储，从而提供输入信号的压缩。

3. 发明授权

US4150304A CCD Comparator 失效
标题翻译： CCD比较器
公开(公告)号：US4150304A
公开(公告)日：1979-04-17
申请号：US886361
申请日：1978-03-14
申请人： William E. Jensen
发明人： William E. Jensen
IPC分类号： G11C19/28 , H01L29/768 , H01L29/78
CPC分类号： H01L29/76808 , G11C19/285
摘要： A charge transfer device is provided having a first group of electrodes embedded in a semiconductor material and a second group of electrodes embedded in a contiguous overlying layer electrically insulating material. An improvement in this device includes means for injecting charge into such device having a number of additional components consisting of a first additional electrode which is embedded in-part in the semiconductor material, and a second additional electrode which is embedded in the insulating material. The first additional electrode is energized by a bias voltage and the second additional electrode is energized by a clock signal. In addition, a group of three electrodes, spaced apart from each other are embedded in the insulating material, and different voltages are applied to these three electrodes so as to create surface potentials and charge wells under certain of the electrodes at the interface of the semiconductor and insulating materials, and also to create potential barriers at each side of the charge wells.
摘要翻译：提供电荷转移装置，其具有嵌入在半导体材料中的第一组电极和嵌入在连续的上层电绝缘材料中的第二组电极。该装置的改进包括用于将电荷注入这样的装置中的装置，该装置具有由第一附加电极组成的附加部件，该第一附加电极嵌入到半导体材料中，部分地嵌入绝缘材料中的第二附加电极。第一附加电极由偏置电压激励，第二附加电极由时钟信号激励。此外，将彼此间隔开的一组三个电极嵌入绝缘材料中，并且向这三个电极施加不同的电压，以便在半导体的界面处的某些电极处产生表面电位和电荷阱和绝缘材料，并且还在电荷阱的每一侧产生潜在的屏障。

4. 发明授权

US6078356A Frequency multiplexed data from detector array 失效
标题翻译：来自检测器阵列的多路复用数据
公开(公告)号：US6078356A
公开(公告)日：2000-06-20
申请号：US895070
申请日：1992-06-08
申请人： William E. Jensen
发明人： William E. Jensen
IPC分类号： H04N5/33 , H04N7/22 , H04J14/02
CPC分类号： H04N5/33 , H04N7/22
摘要： A two-dimensional imaging system employs a multiplicity of radiation sensors disposed in an array of rows and columns. In order to couple signals from each of the sensors from an inaccessible location to an accessible location for processing of the sensor signals to produce an image of a subject viewed by the sensors, a fiber optic link employing both frequency multiplexing and frequency modulation of sensor data connects the sensor array with the signal processing equipment. In each column of the array, the sensors produce electrical signals which are coupled via a multiplexer to modulate the frequency of a voltage-controlled oscillator. A plurality of oscillators are provided for the concurrent generation of frequency-modulated signals which are then summed together to produce a composite signal. The composite signal is transmitted via a fiber-optic link to the signal processing equipment wherein the composite signal is demodulated and the frequency contributions of the various sensors are identified. A bank of phase-locked loops may be employed to extract the various frequency components of the composite signal.
摘要翻译：二维成像系统采用排列成行和列阵列的多个辐射传感器。为了将来自每个传感器的信号从不可访问的位置耦合到可访问位置，用于处理传感器信号以产生由传感器观察的对象的图像，采用传感器数据的频率复用和频率调制的光纤链路将传感器阵列与信号处理设备连接。在阵列的每列中，传感器产生通过多路复用器耦合的电信号，以调制压控振荡器的频率。提供多个振荡器用于同时产生频率调制信号，然后将它们相加在一起以产生复合信号。复合信号通过光纤链路传输到信号处理设备，其中复合信号被解调，并且识别各种传感器的频率贡献。可以使用一组锁相环来提取复合信号的各种频率分量。

5. 发明授权

US4277694A Charge coupled device variable divider with integrating well 失效
标题翻译：电荷耦合器件可变分压器集成良好
公开(公告)号：US4277694A
公开(公告)日：1981-07-07
申请号：US80848
申请日：1979-10-01
申请人： William E. Jensen
发明人： William E. Jensen
IPC分类号： G11C19/28 , H01L29/768 , H01L29/78
CPC分类号： H01L29/76866 , G11C19/285
摘要： A charge injection means periodically introduces a charge packet into a charge flow channel in a semiconductive substrate surface under the control of a clock signal. The charge packets are accumulated beneath an integrating electrode in the charge flow channel until the amount of charge stored beneath the integrating electrode reaches a predetermined amount. Upon this occurrence, the charge subsequently injected spills over a potential barrier and into charge sensing means near the integrating electrode. The charge sensing means responds to the spilled charge by causing substantially the entire accumulated charge to be spilled over the barrier into the charge sensing means in a regenerative feedback loop. Operation of the regenerative feedback loop accelerates a change in potential of the integrating electrode, causing an electrical output pulse to be generated at the integrating electrode. The dividing ratio of the device is the ratio between the pulse rate of the output pulses on the integrating electrode and the pulse rate of the clock signal applied to the charge injection means, and this ratio may be altered merely by changing the size of each charge packet injected by the charge injection means.
摘要翻译：电荷注入装置在时钟信号的控制下周期性地将电荷分组引入到半导体衬底表面中的电荷流动通道中。电荷包被积聚在充电流路中的积分电极下方，直到积分电极下方的电荷量达到规定量。在这种情况下，随后注入的电荷溢出潜在的势垒并进入积分电极附近的电荷感测装置。充电感测装置通过使再生反馈回路中的基本上整个累积电荷在阻挡层上溢出到电荷感测装置中来响应溢出电荷。再生反馈回路的动作加速积分电极的电位变化，导致在积分电极产生电输出脉冲。器件的分频比是积分电极上的输出脉冲的脉冲频率与施加到电荷注入装置的时钟信号的脉冲率之间的比率，并且该比率可以仅通过改变每个电荷的大小来改变分组由电荷注入装置注入。

6. 发明授权

US4164734A Charge transfer multiplying feedback A/D converter 失效
标题翻译：电荷传输乘法反馈A / D转换器
公开(公告)号：US4164734A
公开(公告)日：1979-08-14
申请号：US918993
申请日：1978-06-26
申请人： William E. Jensen
发明人： William E. Jensen
IPC分类号： H03M1/00 , H03K13/02
CPC分类号： H03M1/186
摘要： A charge transfer multiplying feedback A/D converter is provided wherein a CCD component is part of the converter and feeding a source follower and a comparator to provide a charge feedback path into the CCD converter and also to provide a resetting signal to a primary charge storage well within the CCD component. The primary charge storage well has a charge capacity corresponding to one-half of the full scale value of the converter. A charge applied to the converter is indicative of the instantaneous value of an analog input signal to the primary charge storage well. A secondary charge storage well is also provided for temporarily storing excess charges which overflow from the primary charge storage area into such secondary storage well. The converter has built into it a mechanism for sensing the amount of charge stored in the secondary charge storage well and for periodically creating an amount of charge, that is proportional to twice the sensed charge, for transferring same to the primary charge storage well. This converter also has a mechanism for changing a potential barrier level so as to enable the draining of the charge stored in the secondary charge storage well. The CCD component determines whether or not the charge applied to the primary charge storage well exceeds its charge storage capacity. The converter has the ability of draining the charge from the primary charge storage well when overflow charges are sensed and for transferring the charge stored in such primary charge storage well to the secondary charge storage well when overflow charges are not sensed. The converter also includes multiplication capability of charge by way of a feedback loop between an output terminal of the sensed digital signal back to an input gate into the primary charge storage well.
摘要翻译：提供了一种电荷传输乘法反馈A / D转换器，其中CCD分量是转换器的一部分，并且馈送源极跟随器和比较器以向CCD转换器提供电荷反馈路径，并且还向初级电荷存储器提供复位信号在CCD组件内部。主电荷存储阱具有对应于转换器的满量程值的一半的充电容量。施加到转换器的电荷表示到主电荷存储阱的模拟输入信号的瞬时值。还提供二次电荷存储井用于临时存储从主电荷存储区域溢出到这种二次存储井中的过量电荷。转换器内置有一种用于感测存储在次级电荷存储阱中的电荷量的机构，并且用于周期性地产生与感测电荷的两倍成比例的电荷，用于将其传送到主电荷存储阱。该转换器还具有用于改变势垒电平的机构，以便能够排出存储在次级电荷存储器中的电荷。 CCD组件确定施加到主电荷存储阱的电荷是否超过其电荷存储容量。当检测到溢出电荷时，转换器具有从主电荷存储阱中排出电荷的能力，并且当不感测到溢出电荷时将存储在这种主电荷存储阱中的电荷转移到次级电荷存储阱。该转换器还包括通过在所感测的数字信号的输出端之间的反馈回路将电荷的乘法能力返回到主电荷存储阱中的输入门。

7. 发明授权

US4329679A Charge coupled device feedback analog-to-digital converter using successive approximations 失效
标题翻译：使用逐次逼近的电荷耦合器件反馈模数转换器
公开(公告)号：US4329679A
公开(公告)日：1982-05-11
申请号：US83421
申请日：1979-10-10
申请人： William E. Jensen
发明人： William E. Jensen
IPC分类号： H03M1/00 , H03K13/02
CPC分类号： H03M1/40 , H03M1/46
摘要： An analog-to-digital converter includes a charge coupled device comparator receiving an analog signal which is to be converted to an eight bit binary word. An eight bit charge coupled device shift register addresses an eight bit digital-to-analog converter through eight separate resettable latches to generate a reference signal which is compared in successive approximations to the analog signal by the charge coupled device comparator to generate each binary bit of the eight bit word. Sensitivity of the charge coupled device comparator is enhanced by the use of charge coupled regenerative feedback to generate each binary bit of the eight bit binary word, which is read serially into an output register. The charge coupled device comparator decides whether each bit of the eight bit binary word is to be a logic one or a logic zero by comparing the analog input signal with reference signals selected in successive approximations by a shift register addressing the digital-to-analog converter. The analog signal is compared with a progressively increasing reference signal whose magnitude is increased by successively smaller increments. Eight such successive approximations and comparisons are made in order to generate the eight bit binary word.
摘要翻译：模数转换器包括电容耦合器件比较器，其接收要转换为八位二进制字的模拟信号。八位电荷耦合器件移位寄存器通过八个单独的可复位锁存器寻址八位数模转换器，以产生参考信号，该参考信号通过电荷耦合器件比较器在逐次逼近模拟信号中进行比较，以产生每个二进制位八位字。电荷耦合器件比较器的灵敏度通过使用电荷耦合的再生反馈来产生串行读入输出寄存器的八位二进制字的每个二进制位来增强。电荷耦合器件比较器通过将模拟输入信号与通过寻址数模转换器的移位寄存器在逐次逼近中选择的参考信号相比较来判定八位二进制字的每个位是逻辑1还是逻辑零。将模拟信号与逐渐增加的参考信号进行比较，其参数信号的幅度依次递增。进行八次这样的逐次逼近和比较以便产生八位二进制字。

8. 发明授权

US4263522A Background subtractor using CCD techniques 失效
标题翻译：背景减法器采用CCD技术
公开(公告)号：US4263522A
公开(公告)日：1981-04-21
申请号：US972134
申请日：1978-12-21
申请人： William E. Jensen
发明人： William E. Jensen
IPC分类号： G11C27/04 , H01L27/148 , H04N5/217 , H04N5/372 , H03K5/153
CPC分类号： H01L27/14881 , G11C27/04 , H04N5/2173
摘要： A CCD background subtractor having a first charge storage arrangement for detecting, during periodic sampling intervals, the peak value of an applied input signal, and a second charge storage arrangement into which charge representative of said peak value is periodically transferred and held. A third charge storage arrangement also receives the applied input signal and is controlled as a function of the charge held in the second charge storage arrangement such that the output signal from the third charge storage arrangement is representative of the difference between the applied input signal and the peak value thereof sampled during a prior sampling interval.
摘要翻译：一种具有第一电荷存储装置的CCD背景减法器，用于在周期性采样间隔期间检测所施加的输入信号的峰值，以及第二电荷存储装置，代表所述峰值的电荷被周期性地传送和保持在该第二电荷存储装置中。第三电荷存储装置还接收所施加的输入信号并根据第二电荷存储装置中保持的电荷来控制，使得来自第三电荷存储装置的输出信号表示所施加的输入信号和峰值在先前的采样间隔期间采样。

9. 发明授权

US4501007A CCD differentiator 失效
标题翻译： CCD微分器
公开(公告)号：US4501007A
公开(公告)日：1985-02-19
申请号：US088801
申请日：1979-10-29
申请人： William E. Jensen
发明人： William E. Jensen
IPC分类号： G11C19/28 , G11C27/02 , H01L29/78
CPC分类号： G11C19/285 , G11C27/024
摘要： A charge transfer differentiator having a layer of semiconductor material and a contiguous film of overlying electrically insulating material includes a first electrode fed by a first voltage wherein the first electrode is embedded in the film, for establishing an electric potential at the interface between the film and layer. A second electrode fed by a second voltage and a third electrode fed by a third voltage are embedded in the film and charge-coupled to the first electrode for establishing potential barriers at said interface. These electrodes and voltages provide a potential well at the interface. Also included is a fourth electrode embedded in the layer fed by a fourth voltage, and a fifth and sixth electrode separated from each other and embedded in the film, wherein the fifth and sixth electrodes are fed by a clock voltage, the fourth, fifth and sixth electrodes are charge-coupled to the second electrode so as to provide a constant input charge to the potential well. All electrodes and their applied voltages providing differentiation of either the first or the third voltage.
摘要翻译：具有半导体材料层和覆盖电绝缘材料的连续膜的电荷转移微分器包括由第一电压馈送的第一电极，其中第一电极被嵌入膜中，用于在膜和膜的界面处建立电位层。由第二电压馈送的第二电极和由第三电压馈送的第三电极被嵌入在膜中并与第一电极电荷耦合以在所述界面处建立势垒。这些电极和电压在界面处提供了良好的电位。还包括嵌入在由第四电压馈送的层中的第四电极，以及彼此分离并嵌入在膜中的第五和第六电极，其中第五和第六电极通过时钟电压馈送，第四和第五电极第六电极与第二电极电荷耦合，以便为势阱提供恒定的输入电荷。所有电极及其施加的电压提供第一或第三电压的区别。

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