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1. 发明授权

US06829318B2 PLL synthesizer that uses a fractional division value 失效
$PLL synthesizer that uses a fractional division value$
标题翻译：使用分数除法的PLL合成器
公开(公告)号：US06829318B2
公开(公告)日：2004-12-07
申请号：US09885927
申请日：2001-06-22
申请人： Tadashi Kawahara
发明人： Tadashi Kawahara
IPC分类号： H03D324
CPC分类号： H03L7/1976 , H03L7/0898
摘要： A phase locked loop (PLL) frequency synthesizer has a phase comparator, a voltage-controlled oscillator, a charge pump circuit, a loop filter, a variable frequency divider periodically changing a division value in response to a frequency division value changing circuit, and a charge pump bias circuit for supplying a modulated reference bias current, for canceling a phase error, to the charge pump circuit. As a result, without generating additional spurious components, conventionally-generated spurious components can be suppressed.
摘要翻译：锁相环（PLL）频率合成器具有相位比较器，压控振荡器，电荷泵电路，环路滤波器，响应于分频值改变电路周期性地改变分频值的可变分频器，以及电荷泵偏置电路，用于向电荷泵电路提供用于消除相位误差的调制参考偏置电流。结果，不产生额外的杂散分量，可以抑制常规产生的杂散分量。

2. 发明授权

US5625282A Constant current circuit for preventing latch-up 失效
标题翻译：恒流电路防止闭锁
公开(公告)号：US5625282A
公开(公告)日：1997-04-29
申请号：US598892
申请日：1996-02-09
申请人： Tadashi Kawahara
发明人： Tadashi Kawahara
IPC分类号： H01L27/04 , G05F3/26 , G05F3/30 , H01L21/822 , G05F3/04 , G05F3/08 , G05F3/16 , G05F3/20
CPC分类号： G05F3/265
摘要： The present invention provides a constant current circuit for suppressing operation of parasitic thyristor and for preventing short-circuit of IC, even if high voltage such as a thunder is applied to a power source which increases a power supply potential Vcc momentarily. A constant current circuit of the present invention comprises a first current mirror circuit having a first pair of transistors, a second current mirror circuit having a second pair of transistors, and a MOS type capacitor being connected between the collector electrodes of said first pair of transistors and being formed in a second well area of the semiconductor substrate which is adjacent to the first well area where the first and the second mirror circuits are formed thereon.
摘要翻译：本发明提供了一种用于抑制寄生晶闸管的操作并且用于防止IC短路的恒流电路，即使对诸如雷声的高电压施加到瞬时增加电源电位Vcc的电源。本发明的恒流电路包括具有第一对晶体管的第一电流镜电路，具有第二对晶体管的第二电流镜电路和连接在所述第一对晶体管的集电极之间的MOS型电容器并且形成在半导体衬底的与形成有第一和第二镜电路的第一阱区相邻的第二阱区中。

3. 发明授权

US06734739B2 Fractional-frequency-modulation PLL synthesizer that suppresses spurious signals 失效
标题翻译：抑制杂散信号的分频调频PLL合成器
公开(公告)号：US06734739B2
公开(公告)日：2004-05-11
申请号：US10283119
申请日：2002-10-30
申请人： Tadashi Kawahara
发明人： Tadashi Kawahara
IPC分类号： H03L7089
CPC分类号： H03C3/0925 , H03D13/004 , H03L7/0898 , H03L7/1976
摘要： The phase comparator in a phase locked loop synthesizer has a identical first and second transmission gates connected to a front row and a back row of 2N−1 gate delay elements, respectively. Third and fourth transmission gates are permanently set to an ON setting. The first transmission gate and NAND gates operate as a gate delay element when a COUNT signal is at a low logical level and operate as a ring oscillator when the COUNT signal is at a high logical level.
摘要翻译：锁相环合成器中的相位比较器具有相同的第一和第二传输门，分别连接到前排和后排的2N-1个门延迟元件。第三和第四传输门永久地设置为ON设置。当COUNT信号处于低逻辑电平并且当COUNT信号处于高逻辑电平时，第一传输门和NAND门用作门延迟元件，并作为环形振荡器工作。

4. 发明授权

US06622680B2 Air intake duct and manufacturing method therefor 有权
标题翻译：进气管及其制造方法
公开(公告)号：US06622680B2
公开(公告)日：2003-09-23
申请号：US09858501
申请日：2001-05-17
申请人： Hitoshi Kino , Yutaka Ogasawara , Shinji Ito , Yoshikazu Hirose , Takahiro Komori , Tadashi Kawahara
发明人： Hitoshi Kino , Yutaka Ogasawara , Shinji Ito , Yoshikazu Hirose , Takahiro Komori , Tadashi Kawahara
IPC分类号： F02M3510
CPC分类号： F02M35/10321 , B29C65/2015 , B29C66/112 , B29C66/1122 , B29C66/131 , B29C66/5346 , B29C66/71 , B29C66/727 , B29C66/73116 , B29C66/81821 , B29C66/83221 , B29C66/91421 , B29C66/91431 , B29C66/91641 , F02M35/10334 , F02M35/1034 , F02M35/10347 , F02M35/1036 , F02M35/1238 , F02M35/1272 , F02M35/1283 , F05C2225/08 , B29K2023/12 , B29K2023/065 , B29K2077/00
摘要： An opening long in the longitudinal direction of a duct wall is formed. The whole of the opening is covered with non-woven fabric, and the lateral width of the opening is set to be not shorter than {fraction (1/20)} of the circumferential length of the duct wall. Alternatively, a porous member is thermally welded with the head of an opening of a small cylindrical portion projecting from the duct wall of a duct body 1, while the duct body is prevented from deformation. In a method for manufacturing the air take duct, a high-melting molded piece is brought into contact with a hot plate so as to be heated. A low-melting molded piece is disposed at a distance from the hot plate so as to be heated by radiation heat from the hot plate.
摘要翻译：形成在管壁长度方向上长的开口。整个开口被无纺织物覆盖，开口的横向宽度设定为不小于{部分（管壁的圆周长度的1/20），或多孔构件被热焊接从导管体1的导管壁突出的小圆筒部的开口部的头部防止变形，在制造吸气管的方法中，将高熔点成型体与加热板接触以加热，将低熔点成型片设置在距热板一段距离处，以便通过来自热板的辐射热来加热。

5. 发明授权

US6044255A Radio frequency circuit with integrated elements and method of manufacture 失效
标题翻译：具有集成元件和制造方法的射频电路
公开(公告)号：US6044255A
公开(公告)日：2000-03-28
申请号：US939968
申请日：1997-09-29
申请人： Noriharu Suematsu , Masayoshi Ono , Tadashi Kawahara , Mikio Uesugi , Kenji Hiroshige , Yoshitada Iyama
发明人： Noriharu Suematsu , Masayoshi Ono , Tadashi Kawahara , Mikio Uesugi , Kenji Hiroshige , Yoshitada Iyama
IPC分类号： H03F3/19 , H04B1/28
CPC分类号： H04B1/28
摘要： A radio frequency circuit is disclosed which includes a low-noise amplifier and a mixer integrated on the same semiconductor chip by using a silicon BiCMOS process. The low-noise amplifier has a silicon bipolar junction transistor and the mixer has a silicon MOS type field effect transistor. In the radio frequency circuit, the mixer can include two silicon MOS type field effect transistors one of which has a source connected to a drain of the other silicon MOS type field effect transistor and a gate of one silicon MOS type field effect transistor is supplied with a local signal and a gate of the other silicon MOS type field effect transistor is supplied with a radio frequency signal amplified by the low-noise amplifier.
摘要翻译：公开了一种射频电路，其包括通过使用硅BiCMOS工艺在同一半导体芯片上集成的低噪声放大器和混频器。低噪声放大器具有硅双极结型晶体管，混频器具有硅MOS型场效应晶体管。在射频电路中，混频器可以包括两个硅MOS型场效应晶体管，其中一个源极连接到另一个硅MOS型场效应晶体管的漏极，并且一个硅MOS型场效应晶体管的栅极被提供另一硅MOS型场效应晶体管的本地信号和栅极被提供有由低噪声放大器放大的射频信号。

6. 发明授权

US6005441A Amplifying circuit 失效
标题翻译：放大电路
公开(公告)号：US6005441A
公开(公告)日：1999-12-21
申请号：US84020
申请日：1998-05-26
申请人： Tadashi Kawahara
发明人： Tadashi Kawahara
IPC分类号： H03F3/189 , H03F1/26 , H03F3/19 , H04B1/40 , H03F3/191 , H03F1/34
CPC分类号： H03F3/19 , H03F1/26 , H03F2200/372
摘要： An amplifying circuit has a feedback reactance element connected across a biasing feedback resistor and an input terminal for suppressing feedback of thermal noise generated by the biasing feedback resistor.
摘要翻译：放大电路具有跨越偏置反馈电阻器连接的反馈电抗元件和用于抑制由偏置反馈电阻器产生的热噪声的反馈的输入端子。

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