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1. 发明授权

US09207531B2 Pattern forming method 有权
标题翻译：图案形成方法
公开(公告)号：US09207531B2
公开(公告)日：2015-12-08
申请号：US13239449
申请日：2011-09-22
申请人： Hiroko Nakamura , Koji Asakawa , Shigeki Hattori , Satoshi Tanaka , Toshiya Kotani
发明人： Hiroko Nakamura , Koji Asakawa , Shigeki Hattori , Satoshi Tanaka , Toshiya Kotani
IPC分类号： H01L21/31 , H01L21/469 , G03F7/00 , B81C1/00 , B82Y10/00 , B82Y40/00
CPC分类号： G03F7/0002 , B81C1/00031 , B81C2201/0149 , B82Y10/00 , B82Y40/00
摘要： According to one embodiment, a pattern including first and second block phases is formed by self-assembling a block copolymer onto a film to be processed. The entire block copolymer present in a first region is removed under a first condition by carrying out energy beam irradiation and development, thereby leaving a pattern including the first and second block phases in a region other than the first region. The first block phase present in a second region is selectively removed under a second condition by carrying out energy beam irradiation and development, thereby leaving a pattern including the first and second block phases in an overlap region between a region other than the first region and a region other than the second region, and leaving a pattern of second block phase in the second region excluding the overlap region. The film is etched with the left patterns as masks.
摘要翻译：根据一个实施方案，通过将嵌段共聚物自组装成待加工的膜来形成包括第一和第二嵌段相的图案。存在于第一区域中的整个嵌段共聚物在第一条件下通过进行能量束照射和显影而除去，从而在第一区域以外的区域留下包括第一和第二嵌段相的图案。存在于第二区域中的第一块相位通过进行能量束照射和显影而在第二条件下被选择性地去除，从而在包括第一区域和第一区域之间的重叠区域中留下包括第一和第二块相的图案，区域，并且在除了重叠区域之外的第二区域中留下第二块相位的图案。用左图案蚀刻该胶片作为掩模。

2. 发明申请

US20120238109A1 METHOD OF FORMING PATTERN 有权
标题翻译：形成图案的方法
公开(公告)号：US20120238109A1
公开(公告)日：2012-09-20
申请号：US13429901
申请日：2012-03-26
申请人： Shigeki Hattori , Ryota Kitagawa , Koji Asakawa
发明人： Shigeki Hattori , Ryota Kitagawa , Koji Asakawa
IPC分类号： H01L21/312
CPC分类号： G03F7/165 , B05D1/185 , B81C1/00031 , B81C2201/0149 , G03F7/0002 , G03F7/0046 , G03F7/0755 , G03F7/265 , H01L21/0337 , H01L21/306
摘要： According to one embodiment, a method of forming a pattern includes forming a monolayer on a substrate, selectively exposing the monolayer to an energy beam and selectively modifying exposed portions thereof to form patterns of exposed and unexposed portions, forming a block copolymer layer includes first and second block chains on the monolayer, and causing the block copolymer layer to be phase-separated to form patterns of the first and second block chains of the block copolymer layer based on the patterns of the exposed and unexposed portions of the monolayer.
摘要翻译：根据一个实施例，形成图案的方法包括在衬底上形成单层，选择性地将单层暴露于能量束并选择性地修改曝光部分以形成暴露部分和未曝光部分的图案，形成嵌段共聚物层包括第一和基于单层的暴露部分和未曝光部分的图案，使嵌段共聚物层相分离以形成嵌段共聚物层的第一和第二嵌段链的图案。

3. 发明申请

US20120112171A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20120112171A1
公开(公告)日：2012-05-10
申请号：US13234657
申请日：2011-09-16
申请人： Shigeki Hattori , Reika Ichihara , Masaya Terai , Hideyuki Nishizawa , Tsukasa Tada , Koji Asakawa , Hiroyuki Fuke , Satoshi Mikoshiba , Yoshiaki Fukuzumi , Hideaki Aochi
发明人： Shigeki Hattori , Reika Ichihara , Masaya Terai , Hideyuki Nishizawa , Tsukasa Tada , Koji Asakawa , Hiroyuki Fuke , Satoshi Mikoshiba , Yoshiaki Fukuzumi , Hideaki Aochi
IPC分类号： H01L51/54 , H01L51/40
CPC分类号： H01L29/513 , H01L21/02118 , H01L21/02227 , H01L21/28282 , H01L27/11556 , H01L27/1157 , H01L27/11573 , H01L27/11582 , H01L51/0591
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a first stacked structure body, a first semiconductor layer, a first organic film, a first semiconductor-side insulating film, and a first electrode-side insulating film. The first stacked structure body includes a plurality of first electrode films stacked along a first direction and a first inter-electrode insulating film provided between the first electrode films. The first semiconductor layer is opposed to side faces of the first electrode films. The first organic film is provided between the side faces of the first electrode films and the first semiconductor layer and containing an organic compound. The first semiconductor-side insulating film is provided between the first organic film and the first semiconductor layer. The first electrode-side insulating film provided between the first organic film and the side faces of the first electrode films.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括第一层叠结构体，第一半导体层，第一有机膜，第一半导体侧绝缘膜和第一电极侧绝缘膜。第一堆叠结构体包括沿着第一方向堆叠的多个第一电极膜和设置在第一电极膜之间的第一电极间绝缘膜。第一半导体层与第一电极膜的侧面相对。第一有机膜设置在第一电极膜和第一半导体层的侧面之间并含有有机化合物。第一半导体侧绝缘膜设置在第一有机膜和第一半导体层之间。设置在第一有机膜和第一电极膜的侧面之间的第一电极侧绝缘膜。

4. 发明申请

US20090208866A1 PHOTOSENSITIVE COMPOSITION 有权
标题翻译：光敏组合物
公开(公告)号：US20090208866A1
公开(公告)日：2009-08-20
申请号：US12191517
申请日：2008-08-14
申请人： Shigeki HATTORI , Satoshi Saito
发明人： Shigeki HATTORI , Satoshi Saito
IPC分类号： G03F7/004 , G03F7/20
CPC分类号： G03F7/0397 , C07D493/08 , G03F7/0045
摘要： A photosensitive composition is provided, which includes a compound expressed by the formula T3 and a photo-acid generator which generates an acid by an action of actinic radiation. In the formula T3, R3s are hydrogen atoms and hydrophobic groups. The hydrophobic groups are selected from the group consisting of (AD-1), (AD-2), and (AD-3) shown below, and the hydrogen atoms are partially substituted with a hydrophilic group (LA) shown below.
摘要翻译：提供了一种感光组合物，其包括由式T3表示的化合物和通过光化辐射的作用产生酸的光酸产生剂。在式T3中，R3是氢原子和疏水基团。疏水基团选自如下所示的（AD-1），（AD-2）和（AD-3），氢原子被下述亲水基团（LA）部分取代。

5. 发明授权

US08808973B2 Method of forming pattern 有权
标题翻译：形成图案的方法
公开(公告)号：US08808973B2
公开(公告)日：2014-08-19
申请号：US13402400
申请日：2012-02-22
申请人： Satoshi Mikoshiba , Koji Asakawa , Hiroko Nakamura , Shigeki Hattori , Atsushi Hieno , Tsukasa Azuma , Yuriko Seino , Masahiro Kanno
发明人： Satoshi Mikoshiba , Koji Asakawa , Hiroko Nakamura , Shigeki Hattori , Atsushi Hieno , Tsukasa Azuma , Yuriko Seino , Masahiro Kanno
IPC分类号： G03F7/26
CPC分类号： H01L21/0337 , B81C1/00031 , B81C2201/0149 , G03F7/0757 , G03F7/165 , G03F7/26 , H01L21/3086
摘要： According to one embodiment, there is provided a method of forming a pattern including forming a polymer layer on a substrate, the polymer layer including a first and second regions, selectively irradiating either of the first and second regions with energy rays or irradiating the first and second regions with energy rays under different conditions to cause a difference in surface free energy between the first and second regions, thereafter, forming a block copolymer layer on the polymer layer, and causing microphase separation in the block copolymer layer to simultaneously form first and second microphase-separated structures on the first and second regions, respectively.
摘要翻译：根据一个实施方案，提供了一种形成图案的方法，包括在基底上形成聚合物层，聚合物层包括第一和第二区域，用能量射线选择性地照射第一和第二区域中的任一个，或者照射第一和第二区域在不同条件下具有能量射线的第二区域引起第一和第二区域之间的表面自由能的差异，此后在聚合物层上形成嵌段共聚物层，并且使嵌段共聚物层中的微相分离同时形成第一和第二分别在第一和第二区域上的微相分离结构。

6. 发明申请

US20140061762A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20140061762A1
公开(公告)日：2014-03-06
申请号：US13721860
申请日：2012-12-20
申请人： Masaya Terai , Shigeki Hattori , Hideyuki Nishizawa , Koji Asakawa , Tsukasa Tada
发明人： Masaya Terai , Shigeki Hattori , Hideyuki Nishizawa , Koji Asakawa , Tsukasa Tada
IPC分类号： H01L29/792
CPC分类号： H01L27/11582 , G11C13/0016 , G11C13/004 , G11C13/0069 , G11C13/0097 , G11C2213/71 , G11C2213/75 , H01L21/28282 , H01L29/4234 , H01L29/51 , H01L29/511 , H01L29/517 , H01L29/518 , H01L29/792 , H01L29/7926 , H01L51/0078 , H01L51/0591
摘要： A nonvolatile semiconductor memory device of an embodiment includes: a semiconductor layer; a tunnel insulating film formed on the semiconductor layer; an organic molecular layer that is formed on the tunnel insulating film, and includes first organic molecules and second organic molecules having a smaller molecular weight than the first organic molecules, the first organic molecules each including a first alkyl chain or a first alkyl halide chain having one end bound to the tunnel insulating film, the first organic molecules each including a charge storage portion bound to the other end of the first alkyl chain or the first alkyl halide chain, the second organic molecules each including a second alkyl chain or a second alkyl halide chain having one end bound to the tunnel insulating film; a block insulating film formed on the organic molecular layer; and a control gate electrode formed on the block insulating film.
摘要翻译：实施例的非易失性半导体存储器件包括：半导体层; 形成在所述半导体层上的隧道绝缘膜; 形成在所述隧道绝缘膜上的有机分子层，并且包括第一有机分子和具有比所述第一有机分子分子量小的第二有机分子，所述第一有机分子各自包含第一烷基链或第一烷基卤链，所述第一烷基链或第一烷基卤链具有所述第一有机分子各自包含结合到所述第一烷基链或所述第一烷基卤链的另一端的电荷存储部分，所述第二有机分子各自包含第二烷基链或第二烷基卤化物链的一端与隧道绝缘膜结合; 形成在有机分子层上的块绝缘膜; 以及形成在所述块绝缘膜上的控制栅电极。

7. 发明授权

US08481246B2 Method of forming pattern 有权
标题翻译：形成图案的方法
公开(公告)号：US08481246B2
公开(公告)日：2013-07-09
申请号：US13430185
申请日：2012-03-26
申请人： Koji Asakawa , Shigeki Hattori , Ryota Kitagawa
发明人： Koji Asakawa , Shigeki Hattori , Ryota Kitagawa
IPC分类号： G03C5/00
CPC分类号： G03F7/16 , B81C1/00031 , B81C2201/0149 , G03F7/0392
摘要： According to one embodiment, a method of forming a pattern includes applying a block copolymer to a substrate, the block copolymer including a first block and a second block, the first block including polyacrylate or polymethacrylate having a side chain to which an alicyclic hydrocarbon group or a hydrocarbon group including a tertiary carbon is introduced, and the second block including polystyrene substituted with hydrocarbon or halogen at an α-position, causing the block copolymer to be phase-separated, irradiating the block copolymer with an energy beam to decompose the second block, and removing the second block with a developer to form a pattern of the first block.
摘要翻译：根据一个实施方案，形成图案的方法包括将嵌段共聚物施加到基材上，所述嵌段共聚物包括第一嵌段和第二嵌段，所述第一嵌段包括聚丙烯酸酯或聚甲基丙烯酸酯，所述侧链具有脂环族烃基或引入包含叔碳的烃基，第二嵌段包括在α-位置被烃或卤素取代的聚苯乙烯，使嵌段共聚物相分离，用能量束照射嵌段共聚物以分解第二嵌段并且用显影剂移除第二块以形成第一块的图案。

8. 发明申请

US20130075360A1 METHOD OF FORMING PATTERN 有权
标题翻译：形成图案的方法
公开(公告)号：US20130075360A1
公开(公告)日：2013-03-28
申请号：US13431209
申请日：2012-03-27
申请人： Hiroko NAKAMURA , Satoshi Tanaka , Satoshi Mikoshiba , Atsushi Hieno , Shigeki Hattori
发明人： Hiroko NAKAMURA , Satoshi Tanaka , Satoshi Mikoshiba , Atsushi Hieno , Shigeki Hattori
IPC分类号： B29C33/42 , B44C1/22
CPC分类号： G03F7/0002 , B82Y10/00 , B82Y40/00
摘要： According to one embodiment, there is provided a method of forming a pattern, includes forming a guide pattern including a first region having a first surface energy and a second region having a second surface energy on a to-be-processed film, the first and second regions alternately arranged in one direction, forming a block copolymer layer on the guide pattern, and causing microphase separation in the block copolymer layer, the microphase-separated structure is a lamellar block copolymer pattern.
摘要翻译：根据一个实施例，提供了一种形成图案的方法，包括形成包括具有第一表面能的第一区域和在待处理膜上具有第二表面能的第二区域的引导图案，第一和第二区域沿一个方向交替布置，在引导图案上形成嵌段共聚物层，并且在嵌段共聚物层中引起微相分离，微相分离结构是层状嵌段共聚物图案。

9. 发明申请

US20120228576A1 STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：存储装置及其制造方法
公开(公告)号：US20120228576A1
公开(公告)日：2012-09-13
申请号：US13236793
申请日：2011-09-20
申请人： Koji Asakawa , Shigeki Hattori , Hideyuki Nishizawa , Satoshi Mikoshiba , Reika Ichihara , Masaya Terai
发明人： Koji Asakawa , Shigeki Hattori , Hideyuki Nishizawa , Satoshi Mikoshiba , Reika Ichihara , Masaya Terai
IPC分类号： H01L47/00 , H01L21/02
CPC分类号： H01L51/0591 , G11C13/0014 , G11C13/003 , G11C2213/72 , G11C2213/73 , G11C2213/77
摘要： A storage device includes: a plurality of first electrode wirings; a plurality of second electrode wirings which cross the first electrode wirings; a via plug which is formed between the second electrode wiring and the two adjacent first electrode wirings, and in which a maximum diameter of a bottom surface opposing the first electrode wirings in a direction vertical to a direction in which the first electrode wirings stretch is smaller than a length corresponding to a pitch of the first electrode wiring plus a width of the first electrode wirings; a first storage element which is formed between the via plug and one of the two first electrode wirings; and a second storage element which is formed between the via plug and the other one of the two first electrode wirings.
摘要翻译：存储装置包括：多个第一电极布线; 与第一电极布线交叉的多个第二电极布线; 形成在所述第二电极布线和所述两个相邻的第一电极布线之间的通孔塞，其中与所述第一电极布线相反的方向上的与所述第一电极相对的底面的最大直径在与所述第一电极布线拉伸的方向垂直的方向上布线的最大直径较小比对应于第一电极布线的间距加上第一电极布线的宽度的长度; 第一存储元件，其形成在所述通孔插头和所述两个第一电极布线中的一个之间; 以及第二存储元件，其形成在所述通孔插头和所述两个第一电极布线中的另一个之间。

10. 发明授权

US09378962B2 Nonvolatile semiconductor storage device having a charge storage layer that includes metal grains 有权
标题翻译：具有包含金属颗粒的电荷存储层的非易失性半导体存储装置
公开(公告)号：US09378962B2
公开(公告)日：2016-06-28
申请号：US13601539
申请日：2012-08-31
申请人： Shigeki Hattori , Masakazu Yamagiwa , Masaya Terai , Hideyuki Nishizawa , Koji Asakawa , Yoshiaki Fukuzumi
发明人： Shigeki Hattori , Masakazu Yamagiwa , Masaya Terai , Hideyuki Nishizawa , Koji Asakawa , Yoshiaki Fukuzumi
IPC分类号： G11C16/04 , H01L21/28 , B82Y10/00 , H01L29/423 , H01L29/788 , H01L27/115
CPC分类号： H01L21/28273 , B82Y10/00 , G11C16/0416 , G11C16/0483 , H01L27/11556 , H01L29/42332 , H01L29/7881
摘要： A nonvolatile semiconductor storage device includes a semiconductor layer, a first insulating film formed on the semiconductor layer, a charge storage layer formed on the first insulating film and having fine metal grains, a second insulating film formed on the charge storage layer, and a gate electrode formed on the second insulating film. During a write operation, a differential voltage is applied across the gate electrode and the semiconductor layer to place the gate electrode at a lower voltage than the semiconductor layer and cause a positive electric charge to be stored in the charge storage layer.
摘要翻译：非易失性半导体存储装置包括半导体层，形成在半导体层上的第一绝缘膜，形成在第一绝缘膜上并具有细金属颗粒的电荷存储层，形成在电荷存储层上的第二绝缘膜和栅极电极形成在第二绝缘膜上。在写入操作期间，在栅极电极和半导体层两端施加差分电压，以使栅极电极位于比半导体层低的电压下，并将正电荷存储在电荷存储层中。

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