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1. 发明申请

US20130175240A1 TEST PATTERN SELECTION METHOD FOR OPC MODEL CALIBRATION 有权
标题翻译：用于OPC模型校准的测试模式选择方法
公开(公告)号：US20130175240A1
公开(公告)日：2013-07-11
申请号：US13594492
申请日：2012-08-24
申请人： Dmitry VENGERTSEV , Seong-Ho MOON , Artem SHAMSUAROV , Seung-Hune YANG , Moon-Gyu JEONG
发明人： Dmitry VENGERTSEV , Seong-Ho MOON , Artem SHAMSUAROV , Seung-Hune YANG , Moon-Gyu JEONG
IPC分类号： G06F17/50 , B29D11/00 , G03F1/36
CPC分类号： G03F1/36
摘要： A block management method for OPC model calibration includes calculating differences in several different optical functions between first patterns of a first mask and patterns of a second mask corresponding to the first patterns but differing therefrom by a predetermined bias, selecting one or more of the optical functions based on the calculated differences, clustering data of variations in the values of the calculated differences in the selected ones of the optical functions, selecting respective ones of the first patterns in consideration of how the data clusters, and designating the selected first patterns as test patterns.
摘要翻译：用于OPC模型校准的块管理方法包括：计算第一掩模的第一图案与对应于第一图案但与之不同的第二掩模的图案之间的若干不同光学功能的差异，并且通过预定偏置不同，选择光学功能中的一个或多个基于所计算出的差异，对所选择的光学功能中计算出的差异的值的变化进行聚类数据，考虑数据簇的选择并选择所选择的第一图案作为测试图案。

2. 发明授权

US08315330B2 Method of transmitting data in wireless communication system 有权
标题翻译：在无线通信系统中传输数据的方法
公开(公告)号：US08315330B2
公开(公告)日：2012-11-20
申请号：US12340367
申请日：2008-12-19
申请人： Seong Ho Moon , Min Seok Noh , Yeong Hyeon Kwon , Jin Sam Kwak , Dong Cheol Kim , Seung Hee Han , Hyun Woo Lee
发明人： Seong Ho Moon , Min Seok Noh , Yeong Hyeon Kwon , Jin Sam Kwak , Dong Cheol Kim , Seung Hee Han , Hyun Woo Lee
IPC分类号： H04L27/00
CPC分类号： H04L27/2602 , H04W88/06
摘要： A method of transmitting data in a wireless communication system, includes: transmitting first data via a first frame for a first wireless communication system; transmitting second data via a second frame for a second wireless communication system supporting backward compatibility with respect to the first wireless communication system; and transmitting control information with respect to the first and second frames, wherein the control information includes a frame control header (FCH) which indicates information about the second frame by using a reserved bit region of the first frame.
摘要翻译：一种在无线通信系统中发送数据的方法，包括：经由第一无线通信系统的第一帧发送第一数据; 经由第二帧发送第二数据，用于支持相对于所述第一无线通信系统的向后兼容性的第二无线通信系统; 以及发送关于所述第一和第二帧的控制信息，其中所述控制信息包括通过使用所述第一帧的保留比特区域指示关于所述第二帧的信息的帧控制头（FCH）。

3. 发明申请

US20110244689A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20110244689A1
公开(公告)日：2011-10-06
申请号：US13076856
申请日：2011-03-31
申请人： So-ra Han , Yool Kang , Seong-ho Moon , Kyung-hwan Yoon , Hyoung-hee Kim , Seong-woon Choi , Seok-hwan Oh
发明人： So-ra Han , Yool Kang , Seong-ho Moon , Kyung-hwan Yoon , Hyoung-hee Kim , Seong-woon Choi , Seok-hwan Oh
IPC分类号： H01L21/311
CPC分类号： H01L21/0273 , G03F7/40 , H01L21/3086 , H01L21/76229
摘要： A method of manufacturing a semiconductor device includes forming a first mask pattern on a substrate by using a material including a polymer having a protection group de-protectable by an acid, the first mask pattern having a plurality of holes; forming a capping layer on an exposed surface of the first mask pattern, the capping layer including an acid source; diffusing the acid source into the first mask pattern so that the protection group becomes de-protectable from the polymer in the first mask pattern; forming a second mask layer on the capping layer, the second mask layer separate from the first mask pattern and filling the plurality of holes in the first mask pattern; and forming a plurality of second mask patterns in the plurality of holes by removing the capping layer and the first mask pattern.
摘要翻译：一种制造半导体器件的方法包括：通过使用包括具有可被酸去保护的保护基的聚合物的材料在基板上形成第一掩模图案，所述第一掩模图案具有多个孔; 在所述第一掩模图案的暴露表面上形成覆盖层，所述封盖层包括酸源; 将酸源扩散到第一掩模图案中，使得保护基团在第一掩模图案中从聚合物变得不可保护; 在所述覆盖层上形成第二掩模层，所述第二掩模层与所述第一掩模图案分离并填充所述第一掩模图案中的所述多个孔; 以及通过去除所述封盖层和所述第一掩模图案，在所述多个孔中形成多个第二掩模图案。

4. 发明申请

US20100220614A1 METHOD OF PERFORMING CHANNEL SOUNDING IN FREQUENCY DUPLEX SYSTEM 有权
标题翻译：在频率双工系统中执行通道声音的方法
公开(公告)号：US20100220614A1
公开(公告)日：2010-09-02
申请号：US12594663
申请日：2008-05-02
申请人： Doo Hyun Seong , Min Seok Oh , Jin Soo Choi , Seong Ho Moon , Eun Jong Lee , Kyu Jin Park , Jae Hoon Chung , Hyung Ho Park
发明人： Doo Hyun Seong , Min Seok Oh , Jin Soo Choi , Seong Ho Moon , Eun Jong Lee , Kyu Jin Park , Jae Hoon Chung , Hyung Ho Park
IPC分类号： H04J1/16
CPC分类号： H04W72/085 , H04L5/0051
摘要： A method of performing channel sounding in a frequency division duplex (FDD) system in which an uplink frame and a downlink frame use different frequency bands includes dividing a transmission bandwidth with respect to the uplink frame into a plurality of sounding zones, allocating at least one of the plurality of sounding zones to a user equipment and receiving a sounding signal from the user equipment through the allocated sounding zone. Inter-cell interference can be mitigated and overhead due to transmission of the sounding signal can be reduced.
摘要翻译：一种在上行链路帧和下行链路帧使用不同频带的频分双工（FDD）系统中执行信道探测的方法，包括将相对于上行链路帧的传输带宽划分成多个探测区域，分配至少一个多个探测区域中的用户设备，并通过所分配的探测区域从用户设备接收探测信号。可以减轻小区间干扰，并且可以减少由于探测信号的传输而导致的开销。

5. 发明申请

US20100108972A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICES 审中-公开
标题翻译：非易失性半导体存储器件
公开(公告)号：US20100108972A1
公开(公告)日：2010-05-06
申请号：US12611135
申请日：2009-11-03
申请人： Jinshi Zhao , Hyung-Ik Lee , Seong-Ho Moon , In-Gyu Baek , Hyun-Jun Sim , Eun-Kyung Yim
发明人： Jinshi Zhao , Hyung-Ik Lee , Seong-Ho Moon , In-Gyu Baek , Hyun-Jun Sim , Eun-Kyung Yim
IPC分类号： H01L47/00
CPC分类号： G11C13/0011 , B82Y10/00 , G11C13/025 , G11C2213/15 , G11C2213/34 , G11C2213/72 , G11C2213/79 , H01L45/08 , H01L45/1233 , H01L45/141 , H01L45/145 , H01L45/149
摘要： A non-volatile semiconductor memory device includes a lower electrode, an upper electrode, a resistive layer pattern between the lower electrode and the upper electrode, and a filament seed embedded in the resistive layer pattern. The filament seed includes at least one of a carbon nanotube, a nanowire and a nanoparticle.
摘要翻译：非易失性半导体存储器件包括下电极，上电极，下电极和上电极之间的电阻层图案，以及嵌入电阻层图案中的细丝晶种。长丝种子包括碳纳米管，纳米线和纳米粒子中的至少一种。

6. 发明授权

US08614034B2 Method of manufacturing photo-mask 有权
标题翻译：制造光掩模的方法
公开(公告)号：US08614034B2
公开(公告)日：2013-12-24
申请号：US13370496
申请日：2012-02-10
申请人： Seong-ho Moon , Artem Shamsuarov , Seung-hune Yang , Seong-bo Shim
发明人： Seong-ho Moon , Artem Shamsuarov , Seung-hune Yang , Seong-bo Shim
IPC分类号： G03F1/36
CPC分类号： G03F1/36
摘要： Provided is a method of manufacturing a photo-mask having a micro pattern. The method includes providing an analyzing design layout, dividing the analyzing design layout into a two-dimensionally repeated portion, a one-dimensionally repeated portion, and a non-repeated portion, forming a first corrected layout by performing optical proximity correction (OPC) in the two-dimensionally repeated portion, forming a second corrected layout, taking account of the first corrected layout, by performing OPC in the one-dimensionally repeated portion, forming a third corrected layout, taking account of the first corrected layout and the second corrected layout, by performing OPC in the non-repeated portion, and forming a photo-mask based on the first through third corrected layouts.
摘要翻译：提供一种制造具有微图案的光掩模的方法。该方法包括提供分析设计布局，将分析设计布局划分为二维重复部分，一维重复部分和非重复部分，通过执行光学邻近校正（OPC）来形成第一校正布局考虑到第一校正布局和第二校正布局，通过在一维重复部分中执行OPC，形成第三校正布局，形成第二校正布局，形成第二校正布局通过在非重复部分中执行OPC，并且基于第一至第三校正布局形成光掩模。

7. 发明申请

US20110201203A1 METHODS OF FORMING A HOLE HAVING A VERTICAL PROFILE AND SEMICONDUCTOR DEVICES HAVING A VERTICAL HOLE 有权
标题翻译：形成具有垂直剖面的孔的方法和具有垂直孔的半导体器件
公开(公告)号：US20110201203A1
公开(公告)日：2011-08-18
申请号：US13025410
申请日：2011-02-11
申请人： Hyo-San Lee , Bo-Un Yoon , Kun-Tack Lee , Dae-Hyuk Kang , Seong-Ho Moon , So-Ra Han
发明人： Hyo-San Lee , Bo-Un Yoon , Kun-Tack Lee , Dae-Hyuk Kang , Seong-Ho Moon , So-Ra Han
IPC分类号： H01L21/311
CPC分类号： H01L21/31111 , H01L21/32134 , H01L21/76802 , H01L27/10852 , H01L27/10876 , H01L27/10894 , H01L27/11578 , H01L27/11582 , H01L28/91 , H01L29/4236 , H01L29/66621 , H01L29/66833 , H01L29/7926
摘要： In a method of forming a hole, an insulation layer is formed on a substrate, and a preliminary hole exposing the substrate is formed through the insulation layer. A photosensitive layer pattern including an organic polymer is then formed on the substrate to fill the preliminary hole. An etching gas including hydrogen fluoride (HF) or fluorine (F2) is then provided onto the photosensitive layer pattern to etch the insulation layer so that width of the preliminary hole is increased.
摘要翻译：在形成孔的方法中，在基板上形成绝缘层，通过绝缘层形成露出基板的预备孔。然后在基板上形成包含有机聚合物的感光层图案以填充预备孔。然后将包含氟化氢（HF）或氟（F2）的蚀刻气体提供到感光层图案上以蚀刻绝缘层，使得预备孔的宽度增加。

8. 发明申请

US20110032853A1 METHOD AND APPARATUS FOR COMMUNICATION IN A TDD-BASED WIRELESS COMMUNICATION SYSTEM 失效
标题翻译：基于TDD的无线通信系统中通信的方法和装置
公开(公告)号：US20110032853A1
公开(公告)日：2011-02-10
申请号：US12937628
申请日：2009-04-14
申请人： Seong Ho Moon , Min Seok Noh , Yeong Hyeon Kwon , Jin Sam Kwak , Dong Cheol Kim , Seung Hee Han , Hyun Woo Lee
发明人： Seong Ho Moon , Min Seok Noh , Yeong Hyeon Kwon , Jin Sam Kwak , Dong Cheol Kim , Seung Hee Han , Hyun Woo Lee
IPC分类号： H04J3/00
CPC分类号： H04L5/1484 , H04L5/0007
摘要： Disclosed is a method and an apparatus for communication in a TDD (Time Division Duplex) based wireless communication system. The present invention involves setting a first frame comprising a plurality of consecutive downlink subframes and a plurality of consecutive uplink subframes. The start point for the first uplink subframe in the plurality of consecutive uplink subframes, is located at a switching point in a second frame used by another system.
摘要翻译：公开了一种基于TDD（时分双工）的无线通信系统中的通信方法和装置。本发明涉及设置包括多个连续下行链路子帧和多个连续上行链路子帧的第一帧。多个连续的上行链路子帧中的第一上行链路子帧的起始点位于由另一系统使用的第二帧中的切换点。

9. 发明申请

US20090271982A1 Method of forming a wiring having carbon nanotube 有权
标题翻译：形成具有碳纳米管的布线的方法
公开(公告)号：US20090271982A1
公开(公告)日：2009-11-05
申请号：US12387299
申请日：2009-04-29
申请人： Sun-Woo Lee , Seong-Ho Moon , Dong-Woo Kim , Jung-Hyeon Kim , Hong-Sik Yoon
发明人： Sun-Woo Lee , Seong-Ho Moon , Dong-Woo Kim , Jung-Hyeon Kim , Hong-Sik Yoon
IPC分类号： H05K3/10
CPC分类号： H01L21/76879 , H01L21/76849 , H01L23/5252 , H01L23/53276 , H01L2221/1094 , H01L2924/0002 , Y10T29/49117 , Y10T29/4913 , Y10T29/49155 , H01L2924/00
摘要： In a method of forming a wiring having a carbon nanotube, a lower wiring is formed on a substrate, and a catalyst layer is formed on the lower wiring. An insulating interlayer is formed on the substrate to cover the catalyst layer, and an opening is formed through the insulating interlayer to expose an upper face of the catalyst layer. A carbon nanotube wiring is formed in the opening, and an upper wiring is formed on the carbon nanotube wiring and the insulating interlayer to be electrically connected to the carbon nanotube wiring. A thermal stress is generated between the carbon nanotube wiring and the upper wiring to produce a dielectric breakdown of a native oxide layer formed on a surface of the carbon nanotube wiring. A wiring having a reduced electrical resistance between the carbon nanotube wiring and the upper wiring may be obtained.
摘要翻译：在形成具有碳纳米管的布线的方法中，在基板上形成下布线，并且在下布线上形成催化剂层。在衬底上形成绝缘中间层以覆盖催化剂层，并且通过绝缘中间层形成开口以暴露催化剂层的上表面。在开口部形成有碳纳米管布线，在碳纳米管布线和绝缘中间层上形成上部配线，与碳纳米管配线电连接。在碳纳米管布线和上布线之间产生热应力，以产生形成在碳纳米管布线表面上的天然氧化物层的电介质击穿。可以获得碳纳米管布线和上布线之间的电阻降低的布线。

10. 发明申请

US20090146304A1 CARBON NANOTUBE INTEGRATED CIRCUIT DEVICES AND METHODS OF FABRICATION THEREFOR USING PROTECTED CATALYST LAYERS 审中-公开
标题翻译：碳纳米管集成电路器件及其使用受保护的催化层的制造方法
公开(公告)号：US20090146304A1
公开(公告)日：2009-06-11
申请号：US11924308
申请日：2007-10-25
申请人： Yoon-ho Son , Sun-woo Lee , Young-moon Choi , Seong-ho Moon , Hong-sik Yoon , Suk-hun Choi , Kyung-rae Byun
发明人： Yoon-ho Son , Sun-woo Lee , Young-moon Choi , Seong-ho Moon , Hong-sik Yoon , Suk-hun Choi , Kyung-rae Byun
IPC分类号： H01L23/522 , H01L21/768
CPC分类号： H01L21/76879 , H01L21/76834 , H01L21/76849 , H01L21/7685 , H01L21/76876 , H01L23/5226 , H01L23/53276 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要： A method of fabricating an integrated circuit device is provided. The method includes sequentially forming a lower interconnection layer, a catalyst layer, and a buffer layer on a semiconductor substrate, forming an interlayer dielectric layer to cover the buffer layer, forming a contact hole through the interlayer dielectric layer so that a top surface of the buffer layer may be partially exposed, removing a portion of the buffer layer exposed by the contact hole so that a top surface of the catalyst layer may be exposed, and growing carbon nanotubes from a portion of the catalyst layer exposed by the contact hole so that the contact hole may be filled with the carbon nanotubes.
摘要翻译：提供一种制造集成电路器件的方法。该方法包括在半导体衬底上依次形成下互连层，催化剂层和缓冲层，形成覆盖缓冲层的层间电介质层，形成穿过层间电介质层的接触孔，缓冲层可以部分地暴露，去除由接触孔暴露的缓冲层的一部分，使得催化剂层的顶表面可能被暴露，并且从催化剂层的由接触孔暴露的部分生长碳纳米管，使得可以用碳纳米管填充接触孔。

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