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1. 发明授权

US08610479B2 On die low power high accuracy reference clock generation 有权
标题翻译：低功耗高精度基准时钟生成
公开(公告)号：US08610479B2
公开(公告)日：2013-12-17
申请号：US13276269
申请日：2011-10-18
申请人： Kochung Lee , Quan Yu , Yuntao Zhu , Lei Xie , Ming Qu
发明人： Kochung Lee , Quan Yu , Yuntao Zhu , Lei Xie , Ming Qu
IPC分类号： G06F1/04
CPC分类号： H03L7/22
摘要： A system and method are disclosed for generating a high accuracy and low power on die reference clock. An LC clock is generated on die and a frequency divider lowers the LC clock frequency to a target reference frequency. An RCO clock is generated on die with an unknown initial frequency. The RCO clock and target reference clock are compared to determine in which direction the frequency of the RCO clock should be adjusted to move closer to the target reference frequency. A signal is sent causing a current source or capacitor in the RCO circuit to be modified. Therefore, the RCO clock frequency is adjusted. The RCO circuit is repeatedly adjusted until the RCO clock frequency is sufficiently accurate. The LC clock is disabled to conserve the power that would have been consumed in generating the LC clock.
摘要翻译：公开了一种用于在芯片参考时钟上产生高精度和低功耗的系统和方法。在芯片上产生LC时钟，分频器将LC时钟频率降低到目标参考频率。在未知的初始频率的芯片上产生RCO时钟。比较RCO时钟和目标参考时钟，确定在哪个方向上调整RCO时钟的频率以更接近目标参考频率。发送信号，导致RCO电路中的电流源或电容器被修改。因此，调整RCO时钟频率。 RCO电路重复调整，直到RCO时钟频率足够准确。 LC时钟被禁用，以节省在生成LC时钟时消耗的功率。

2. 发明申请

US20130093466A1 ON DIE LOW POWER HIGH ACCURACY REFERENCE CLOCK GENERATION 有权
标题翻译： ON DIE低功率高精度参考时钟产生
公开(公告)号：US20130093466A1
公开(公告)日：2013-04-18
申请号：US13276269
申请日：2011-10-18
申请人： Kochung Lee , Quan Yu , Yuntao Zhu , Lei Xie , Ming Qu
发明人： Kochung Lee , Quan Yu , Yuntao Zhu , Lei Xie , Ming Qu
IPC分类号： H03D13/00
CPC分类号： H03L7/22
摘要： A system and method are disclosed for generating a high accuracy and low power on die reference clock. An LC clock is generated on die and a frequency divider lowers the LC clock frequency to a target reference frequency. An RCO clock is generated on die with an unknown initial frequency. The RCO clock and target reference clock are compared to determine in which direction the frequency of the RCO clock should be adjusted to move closer to the target reference frequency. A signal is sent causing a current source or capacitor in the RCO circuit to be modified. Therefore, the RCO clock frequency is adjusted. The RCO circuit is repeatedly adjusted until the RCO clock frequency is sufficiently accurate. The LC clock is disabled to conserve the power that would have been consumed in generating the LC clock.
摘要翻译：公开了一种用于在芯片参考时钟上产生高精度和低功耗的系统和方法。在芯片上产生LC时钟，分频器将LC时钟频率降低到目标参考频率。在未知的初始频率的芯片上产生RCO时钟。比较RCO时钟和目标参考时钟，确定在哪个方向上调整RCO时钟的频率以更接近目标参考频率。发送信号，导致RCO电路中的电流源或电容器被修改。因此，调整RCO时钟频率。 RCO电路重复调整，直到RCO时钟频率足够准确。 LC时钟被禁用，以节省在生成LC时钟时消耗的功率。

3. 发明申请

US20120059179A1 PALLADIUM-CATALYZED ORTHO-FLUORINATION 审中-公开
标题翻译：钯催化的ORTHO-FLUORINATION
公开(公告)号：US20120059179A1
公开(公告)日：2012-03-08
申请号：US13262593
申请日：2010-04-02
申请人： Jin-Quan Yu
发明人： Jin-Quan Yu
IPC分类号： C07C209/74 , C07C253/00 , C07C67/30 , C07C247/10
CPC分类号： C07C209/74 , C07C303/40 , C07C211/29 , C07C311/09
摘要： A new method of ortho-fluorination where an aryl C—H bond is directly replaced by an aryl C-F bond in a palladium-catalyzed reaction is provided. The method includes the ortho-fluorination of a triflamide protected benzylamine, a palladium catalyst, such as Pd(OTf)2, a fluorinating reagent such as N-fluoro-2,4,6-trimethylpyridinium triflate, and a ligand to promote the reaction such as N-methylpyrrolidinone (NMP).
摘要翻译：提供了一种新的正氟化方法，其中芳基C-H键在钯催化反应中直接被芳基C-F键取代。该方法包括三氟甲磺酰胺保护的苄胺，钯催化剂如Pd（OTf）2，氟化试剂如N-氟-2,4,6-三甲基吡啶鎓三氟甲磺酸酯的正氟化和促进反应的配体例如N-甲基吡咯烷酮（NMP）。

4. 发明授权

US10611723B2 Ligand-enabled meta-C-H activation using a transient mediator 有权
公开(公告)号：US10611723B2
公开(公告)日：2020-04-07
申请号：US15547014
申请日：2016-01-28
申请人： Jin-Quan Yu , The Scripps Research Institute
发明人： Jin-Quan Yu
IPC分类号： C07C233/15 , C07D209/48 , C07B43/06 , C07C231/12 , C07D209/42 , C07D307/84 , C07C233/59 , C07D209/04 , C07D307/77
CPC分类号： C07C233/15 , C07B43/06 , C07C231/12 , C07C233/59 , C07D209/04 , C07D209/42 , C07D209/48 , C07D307/77 , C07D307/84 , C07C2602/10 , C07C231/12 , C07C233/15 , C07C231/12 , C07C233/59
摘要： An alternative approach to formation of a C—C bond at a meta-position of an aromatic compound is disclosed that employs an ethylenically unsaturated bicyclic compound as a transient mediator to achieve meta-selective C—H activation with a simple and common ortho-directing group. The use of a pyridine-based ligand assists in relaying the palladium catalyst to the meta-position by the unsaturated bicyclic compound following initial ortho-C—H activation.

5. 发明申请

US20140003480A1 On Die Jitter Tolerance Test 有权
标题翻译：关于死机容忍测试
公开(公告)号：US20140003480A1
公开(公告)日：2014-01-02
申请号：US13538930
申请日：2012-06-29
申请人： Ming Qu , Yuanping Chen , Yuntao Zhu , Quan Yu , Kochung Lee
发明人： Ming Qu , Yuanping Chen , Yuntao Zhu , Quan Yu , Kochung Lee
IPC分类号： H04B17/00
CPC分类号： H03L7/087 , G01R29/26 , H03L7/0807 , H03L7/081 , H03L7/0998 , H04B17/104 , H04L1/205 , H04L1/243 , H04L7/033
摘要： A system and method are disclosed for performing on die jitter tolerance testing. A set of clocks are generated based on an input signal. The set of clocks include in an in-phase signal based on the data switching edge of the input signal. Additionally, the set of clocks include an inverted clock phase shifted by 180 degrees, and a pair of clocks phase shifted positively and negatively by a certain number of degrees, θ. Data input is sampled based on the inverted clock and the two phase shifted clocks. The eye opening of the input signal can be determined based on whether each of the inverted clock and the two phase shifted clocks sample the correct data from the input signal at various θ values.
摘要翻译：公开了一种用于执行裸片抖动容限测试的系统和方法。基于输入信号产生一组时钟。该组时钟包括基于输入信号的数据切换沿的同相信号。此外，该组时钟包括偏移180度的反相时钟相位和一对相位偏移一定数量度θ的时钟。基于反相时钟和两个相移时钟对数据输入进行采样。可以基于反相时钟和两个相移时钟中的每一个是否以各种θ值从输入信号中采样正确的数据来确定输入信号的开眼。

6. 发明授权

US07697570B2 Method based on backboard transmitting time division multiplexing circuit data and a bridge connector 有权
标题翻译：基于背板传输时分复用电路数据和桥接器的方法
公开(公告)号：US07697570B2
公开(公告)日：2010-04-13
申请号：US10476407
申请日：2002-04-29
申请人： Zhenya Li , Guzheng Wu , Quan Yu , Shoubo Xie , Konggang Wei
发明人： Zhenya Li , Guzheng Wu , Quan Yu , Shoubo Xie , Konggang Wei
IPC分类号： H04J3/00
CPC分类号： H04Q11/04 , H04Q2213/13166 , H04Q2213/13214 , H04Q2213/13292 , H04Q2213/1336
摘要： A method for multi-path TDM data transmission includes: applying a plurality of high-speed serial lines to connect a center switch network board to a plurality of service boards; multiplexing multi-path TDM data from the center switch network board at transmitting side, and transmitting TDM data multiplexed in batch via one of the high-speed serial lines to one of the service boards; at receiving side, serial receiving the TDM data multiplexed and de-multiplexing the TDM data multiplexed to multiple TDM paths. The TDM bridge connector includes: a TDM high-speed serial transmitting adaptive circuit, and a TDM high-speed serial receiving adaptive circuit and a clock control circuit. The invention increases greatly transmission capacity and looses the requirement of clock synchronization, so the system reliability is greatly raised.
摘要翻译：一种用于多径TDM数据传输的方法包括：应用多条高速串行线路将中央交换网络板连接到多个业务板; 从发送侧的中心交换网络多路复用多路TDM数据，并通过一条高速串行线路批量发送TDM数据到其中一个业务板; 在接收侧，串行接收多路复用TDM多路复用TDM多路复用TDM数据的TDM数据并将其解复用。 TDM桥接器包括TDM高速串行传输自适应电路和TDM高速串行接收自适应电路和时钟控制电路。本发明大大提高了传输容量，不再需要时钟同步，因此系统可靠性大大提高。

7. 发明授权

US07382153B2 On-chip resistor calibration for line termination 有权
标题翻译：用于线路端接的片上电阻校准
公开(公告)号：US07382153B2
公开(公告)日：2008-06-03
申请号：US11459880
申请日：2006-07-25
申请人： Quing Ou-yang , Quan Yu , Ming Qu
发明人： Quing Ou-yang , Quan Yu , Ming Qu
IPC分类号： H03K17/16
CPC分类号： H03K19/0005
摘要： A circuit for calibrating a resistance value on an integrated circuit includes a resistor network, a reference voltage generator, a comparator, a servo loop, and a shift register. The resistor network includes a plurality of resistor and switch pairs in parallel. The resistor network further includes a servo resistor in series with a servo resistor switch such that the servo resistor and servo resistor switch are in parallel with the plurality of resistor and switch pairs. The servo loop generates a shift register gating signal and includes a current sample register for storing a current comparator output data value and a previous sample register for storing a previous comparator output data value. The shift register, upon receipt of a shift register gating signal at a first state, inputs the current comparator output data value to shift data bits through the shift register.
摘要翻译：用于校准集成电路上的电阻值的电路包括电阻网络，参考电压发生器，比较器，伺服环路和移位寄存器。电阻网络包括并联的多个电阻器和开关对。电阻网络还包括与伺服电阻器开关串联的伺服电阻器，使得伺服电阻器和伺服电阻器开关与多个电阻器和开关对并联。伺服环路产生移位寄存器门控信号，并包括用于存储当前比较器输出数据值的当前采样寄存器和用于存储先前比较器输出数据值的先前采样寄存器。移位寄存器在第一状态下接收到移位寄存器选通信号时，输入当前比较器输出数据值以通过移位寄存器移位数据位。

8. 发明申请

US20080061837A1 Low Supply Voltage, Large Output Swing, Source-Terminated Output Driver for High Speed AC-coupled Double-Termination Serial Links 审中-公开
标题翻译：低电源电压，大输出摆幅，源极端接输出驱动器，用于高速交流耦合双端子串行链路
公开(公告)号：US20080061837A1
公开(公告)日：2008-03-13
申请号：US11467528
申请日：2006-08-25
申请人： Feng Xu , Quan Yu , Ming Qu
发明人： Feng Xu , Quan Yu , Ming Qu
IPC分类号： H03K19/086
CPC分类号： H03K19/018528
摘要： A current mode logic circuit includes a current mode logic driver circuit and a transistor biasing improvement circuit. The transistor biasing improvement circuit includes a first current source coupled to a first output node of the current mode logic driver circuit and a second current source coupled to a second output node of the current mode logic driver circuit. The first current source and the second current source raise a common mode voltage at the first output node and the second output node.
摘要翻译：电流模式逻辑电路包括电流模式逻辑驱动器电路和晶体管偏置改善电路。晶体管偏置改善电路包括耦合到电流模式逻辑驱动器电路的第一输出节点的第一电流源和耦合到当前模式逻辑驱动器电路的第二输出节点的第二电流源。第一电流源和第二电流源在第一输出节点和第二输出节点处提高共模电压。

9. 发明授权

US06453870B1 Electrically conducting filter 有权
标题翻译：导电过滤器
公开(公告)号：US06453870B1
公开(公告)日：2002-09-24
申请号：US09751482
申请日：2000-12-28
申请人： David Richard Koller , De Quan Yu , Eric Roll , Ling Bai
发明人： David Richard Koller , De Quan Yu , Eric Roll , Ling Bai
IPC分类号： F02B7704
CPC分类号： B01D35/30 , B01D2201/50 , F02M37/106 , F02M37/22 , F02M2037/082 , F02M2037/225
摘要： An electrically conducting fuel filter mechanism for a fuel supply system for an internal combustion engine. The housing for the fuel filter has a conductive inner or core layer and at least one non-conductive outer layer positioned adjacent the fuel. The conductive layer is made from a non-conductive material with conductive fibers or powders mixed in it, while the non-conductive layer is free from the conductive materials. Any electrostatic or electrical charge buildup in the fuel filter, fuel or housing, will be dissipated through the inner non-conductive layer forming conductive paths directly to the conductive layer. This prevents any further charge buildup and pitting.
摘要翻译：一种用于内燃机的燃料供应系统的导电燃料过滤机构。用于燃料过滤器的壳体具有导电内层或芯层和邻近燃料定位的至少一个非导电外层。导电层由具有导电纤维或混合在其中的粉末的非导电材料制成，而非导电层不含导电材料。燃料过滤器，燃料或壳体中的任何静电或电荷积累将通过形成导电路径的内部非导电层直接耗散到导电层。这可防止任何进一步的电荷积聚和点蚀。

10. 发明申请

US20180009739A1 Ligand-Enabled meta-C-H Activation Using a Transient Mediator 审中-公开
公开(公告)号：US20180009739A1
公开(公告)日：2018-01-11
申请号：US15547014
申请日：2016-01-28
申请人： Jin-Quan YU , The Scripps Research Institute
发明人： Jin-Quan Yu
IPC分类号： C07C233/15 , C07D209/48 , C07B43/06 , C07C233/59 , C07C231/12 , C07D307/77 , C07D209/04
CPC分类号： C07C233/15 , C07B43/06 , C07C231/12 , C07C233/59 , C07C2602/10 , C07D209/04 , C07D209/42 , C07D209/48 , C07D307/77 , C07D307/84
摘要： An alternative approach to formation of a C-C bond at a meta-position of an aromatic compound is disclosed that employs an ethylenically unsaturated bicyclic compound as a transient mediator to achieve meta-selective C-H activation with a simple and common ortho-directing group. The use of a pyridine-based ligand assists in relaying the palladium catalyst to the meta-position by the unsaturated bicyclic compound following initial ortho-C-H activation.

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