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1. 发明申请

US20090224365A1 Semiconductor Device Comprising Passive Components 有权
标题翻译：包括被动元件的半导体器件
公开(公告)号：US20090224365A1
公开(公告)日：2009-09-10
申请号：US12426837
申请日：2009-04-20
申请人： Thomas P. Remmel , Sriram Kalpat , Melvy F. Miller , Peter Zurcher
发明人： Thomas P. Remmel , Sriram Kalpat , Melvy F. Miller , Peter Zurcher
IPC分类号： H01L27/06
CPC分类号： H01L27/016 , H01L23/5223 , H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： A method of making a semiconductor device includes the steps of: providing a semiconductor substrate (110, 510, 1010, 1610) having a patterned interconnect layer (120, 520, 1020, 1620) formed thereon; depositing a first dielectric material (130, 530, 1030, 1630) over the interconnect layer; depositing a first electrode material (140, 540, 1040, 1640) over the first dielectric material; depositing a second dielectric material (150, 550, 1050, 1650) over the first electrode material; depositing a second electrode material (160, 560, 1060, 1660) over the second dielectric material; patterning the second electrode material to form a top electrode (211, 611, 1111, 1611) of a first capacitor (210, 710, 1310, 1615); and patterning the first electrode material to form a top electrode (221, 721, 1221, 1621) of a second capacitor (220, 720, 1320, 1625), to form an electrode (212, 712, 1212, 1612) of the first capacitor, and to define a resistor (230, 730, 1330).
摘要翻译：制造半导体器件的方法包括以下步骤：提供具有形成在其上的图案化互连层（120,520,1020,1620）的半导体衬底（110,510,1010,1610）在所述互连层上沉积第一介电材料（130,530,1030,1630）; 在所述第一电介质材料上沉积第一电极材料（140,540,1040,1640）; 在所述第一电极材料上沉积第二介电材料（150,550,1050,1650）; 在所述第二电介质材料上沉积第二电极材料（160,560,1060,1660）; 图案化第二电极材料以形成第一电容器（210,710,1310,1615）的顶部电极（211,611,1111,1611）; 以及图案化所述第一电极材料以形成第二电容器（220,720,1320,1625）的顶部电极（221,721,1221,1621），以形成所述第一电极的电极（212,712,1212,1612）电容器，并且限定电阻器（230,730,1330）。

2. 发明申请

US20090189252A1 III-V MOSFET Fabrication and Device 有权
标题翻译： III-V MOSFET制造和器件
公开(公告)号：US20090189252A1
公开(公告)日：2009-07-30
申请号：US12022942
申请日：2008-01-30
申请人： Matthias Passlack , Jonathan K. Abrokwah , Karthik Rajagopalan , Haiping Zhou , Richard J. Hill , Xu Li , David A. Moran , Iain G. Thayne , Peter Zurcher
发明人： Matthias Passlack , Jonathan K. Abrokwah , Karthik Rajagopalan , Haiping Zhou , Richard J. Hill , Xu Li , David A. Moran , Iain G. Thayne , Peter Zurcher
IPC分类号： H01L21/334 , H01L29/20
CPC分类号： H01L29/78 , H01L29/20 , H01L29/66462 , H01L29/7785
摘要： A semiconductor fabrication process includes forming a gate dielectric layer (120) overlying a substrate (101) that includes a III-V semiconductor compound. The gate dielectric layer is patterned to produce a gate dielectric structure (121) that has a substantially vertical sidewall (127), e.g., a slope of approximately 45° to 90°. A metal contact structure (130) is formed overlying the wafer substrate. The contact structure is laterally displaced from the gate dielectric structure sufficiently to define a gap (133) between the two. The wafer (100) is heat treated, which causes migration of at least one of the metal elements to form an alloy region (137) in the underlying wafer substrate. The alloy region underlies the contact structure and extends across all or a portion of the wafer substrate underlying the gap. An insulative or dielectric capping layer (140,150) is then formed overlying the wafer and covering the portion of the substrate exposed by the gap.
摘要翻译：半导体制造工艺包括形成覆盖在包括III-V半导体化合物的衬底（101）上的栅极电介质层（120）。栅极介电层被图案化以产生具有基本上垂直的侧壁（127）的栅极电介质结构（121），例如大约45°至90°的斜率。金属接触结构（130）形成在晶片衬底上。接触结构被充分地从栅极电介质结构侧向移位以限定两者之间的间隙（133）。对晶片（100）进行热处理，这导致至少一种金属元素迁移，从而在下面的晶片衬底中形成合金区域（137）。合金区域位于接触结构的下面，并且延伸穿过位于间隙下方的晶片衬底的全部或一部分。然后形成绝缘或介电覆盖层（140,150），覆盖晶片并覆盖由间隙暴露的衬底的部分。

3. 发明授权

US07535079B2 Semiconductor device comprising passive components 有权
标题翻译：包括无源元件的半导体器件
公开(公告)号：US07535079B2
公开(公告)日：2009-05-19
申请号：US11899218
申请日：2007-09-04
申请人： Thomas P. Remmel , Sriram Kalpat , Melvy F. Miller , Peter Zurcher
发明人： Thomas P. Remmel , Sriram Kalpat , Melvy F. Miller , Peter Zurcher
IPC分类号： H01L29/00
CPC分类号： H01L27/016 , H01L23/5223 , H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： A method of making a semiconductor device includes the steps of: providing a semiconductor substrate (110, 510, 1010, 1610) having a patterned interconnect layer (120, 520, 1020, 1620) formed thereon; depositing a first dielectric material (130, 530, 1030, 1630) over the interconnect layer; depositing a first electrode material (140, 540, 1040, 1640) over the first dielectric material; depositing a second dielectric material (150, 550, 1050, 1650) over the first electrode material; depositing a second electrode material (160, 560, 1060, 1660) over the second dielectric material; patterning the second electrode material to form a top electrode (211, 611, 1111, 1611) of a first capacitor (210, 710, 1310, 1615); and patterning the first electrode material to form a top electrode (221, 721, 1221, 1621) of a second capacitor (220, 720, 1320, 1625), to form an electrode (212, 712, 1212, 1612) of the first capacitor, and to define a resistor (230, 730, 1330).
摘要翻译：制造半导体器件的方法包括以下步骤：提供具有形成在其上的图案化互连层（120,520,1020,1620）的半导体衬底（110,510,1010,1610）在所述互连层上沉积第一介电材料（130,530,1030,1630）; 在所述第一电介质材料上沉积第一电极材料（140,540,1040,1640）; 在所述第一电极材料上沉积第二介电材料（150,550,1050,1650）; 在所述第二电介质材料上沉积第二电极材料（160,560,1060,1660）; 图案化第二电极材料以形成第一电容器（210,710,1310,1615）的顶部电极（211,611,1111,1611）; 以及图案化所述第一电极材料以形成第二电容器（220,720,1320,1625）的顶部电极（221,721,1221,1621），以形成所述第一电极的电极（212,712,1212,1612）电容器，并且限定电阻器（230,730,1330）。

4. 发明申请

US20080128901A1 Micro-electro-mechanical systems device and integrated circuit device integrated in a three-dimensional semiconductor structure 审中-公开
标题翻译：微机电系统器件和集成电路器件集成在三维半导体结构中
公开(公告)号：US20080128901A1
公开(公告)日：2008-06-05
申请号：US11606739
申请日：2006-11-30
申请人： Peter Zurcher , Carl E. D'Acosta , Thomas P. Remmel
发明人： Peter Zurcher , Carl E. D'Acosta , Thomas P. Remmel
IPC分类号： H01L23/538 , H01L21/50 , H01L23/64
CPC分类号： B81C1/00238 , H01L23/585 , H01L25/16 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： Semiconductor devices (300, 400, and 500) including an integrated circuit (IC) device (100) coupled to a micro-electro-mechanical systems (MEMS) device (200) and a method (600) for producing same are disclosed. The IC device includes a die seal ring (130) and the MEMS device includes a MEMS seal ring (230), and the IC device is coupled to the MEMS device via the die seal ring and the MEMS seal ring. The MEMS device may include one or more passive devices (450, 475) coupled to it. Moreover, a substrate (510) including an aperture (550) may be coupled to the passive device, wherein the aperture enables the passive device to be trimmed after being disposed on the MEMS device. The semiconductor devices include an RF signal path (486) and at least one other signal path (482 and 484), wherein the other signal path(s) may be an analog and/or a digital signal path.
摘要翻译：公开了包括耦合到微电子机械系统（MEMS）装置（200）的集成电路（IC）装置（100）和用于制造其的方法（600））的半导体装置（300,400和500）。 IC器件包括管芯密封环（130），并且MEMS器件包括MEMS密封环（230），并且IC器件经由管芯密封环和MEMS密封环耦合到MEMS器件。 MEMS器件可以包括耦合到其的一个或多个无源器件（450,475）。此外，包括孔径（550）的衬底（510）可以耦合到无源器件，其中，所述孔径使得能够在被放置在MEMS器件上之后对被动器件进行修整。半导体器件包括RF信号路径（486）和至少一个其它信号路径（482和484），其中另一个信号路径可以是模拟和/或数字信号路径。

5. 发明授权

US06344413B1 Method for forming a semiconductor device 失效
标题翻译：半导体器件形成方法
公开(公告)号：US06344413B1
公开(公告)日：2002-02-05
申请号：US09022756
申请日：1998-02-12
申请人： Peter Zurcher , Robert E. Jones, Jr. , Papu D. Maniar , Peir Chu
发明人： Peter Zurcher , Robert E. Jones, Jr. , Papu D. Maniar , Peir Chu
IPC分类号： H01L2170
CPC分类号： H01L21/3212 , H01L27/1057 , H01L27/108 , H01L27/10844 , H01L27/10852 , H01L27/10882 , H01L28/55 , H01L28/60 , H01L28/65
摘要： Method for forming a semiconductor device having an capacitor, where the capacitor is in-laid in a cavity formed in the semiconductor substrate and part of a high density memory. One embodiment first forms a bottom electrode in the cavity and then fills the cavity with a sacrificial layer to allow chemical mechanical polishing (CMP) of at least one of the capacitor electrodes. After removing portions of the bottom electrode and portions of the sacrificial layer, a dielectric layer is formed. A top electrode is then formed over the dielectric layer. The dielectric layer so formed isolates the bottom electrode from the top electrode preventing shorting and leakage currents. In one embodiment, a single top electrode layer is formed for multiple bottom electrodes, reducing the complexity of the memory circuit.
摘要翻译：用于形成具有电容器的半导体器件的方法，其中电容器嵌入形成在半导体衬底中的空腔中，并且部分高密度存储器。一个实施例首先在空腔中形成底部电极，然后用牺牲层填充空腔，以允许电容器电极中的至少一个的化学机械抛光（CMP）。在去除底部电极的部分和牺牲层的部分之后，形成介电层。然后在电介质层上形成顶部电极。这样形成的电介质层将底部电极与顶部电极隔离，防止短路和漏电流。在一个实施例中，为多个底部电极形成单个顶部电极层，从而降低了存储器电路的复杂性。

6. 发明授权

US07898059B2 Semiconductor device comprising passive components 有权
标题翻译：包括无源元件的半导体器件
公开(公告)号：US07898059B2
公开(公告)日：2011-03-01
申请号：US12426837
申请日：2009-04-20
申请人： Thomas P. Remmel , Peter Zurcher , Sriram Kalpat , Melvy F. Miller
发明人： Thomas P. Remmel , Peter Zurcher , Sriram Kalpat , Melvy F. Miller
IPC分类号： H01L29/00
CPC分类号： H01L27/016 , H01L23/5223 , H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： A method of making a semiconductor device includes the steps of: providing a semiconductor substrate (110, 510, 1010, 1610) having a patterned interconnect layer (120, 520, 1020, 1620) formed thereon; depositing a first dielectric material (130, 530, 1030, 1630) over the interconnect layer; depositing a first electrode material (140, 540, 1040, 1640) over the first dielectric material; depositing a second dielectric material (150, 550, 1050, 1650) over the first electrode material; depositing a second electrode material (160, 560, 1060, 1660) over the second dielectric material; patterning the second electrode material to form a top electrode (211, 611, 1111, 1611) of a first capacitor (210, 710, 1310, 1615); and patterning the first electrode material to form a top electrode (221, 721, 1221, 1621) of a second capacitor (220, 720, 1320, 1625), to form an electrode (212, 712, 1212, 1612) of the first capacitor, and to define a resistor (230, 730, 1330).
摘要翻译：制造半导体器件的方法包括以下步骤：提供具有形成在其上的图案化互连层（120,520,1020,1620）的半导体衬底（110,510,1010,1610）在所述互连层上沉积第一介电材料（130,530,1030,1630）; 在所述第一电介质材料上沉积第一电极材料（140,540,1040,1640）; 在所述第一电极材料上沉积第二介电材料（150,550,1050,1650）; 在所述第二电介质材料上沉积第二电极材料（160,560,1060,1660）; 图案化第二电极材料以形成第一电容器（210,710,1310,1615）的顶部电极（211,611,1111,1611）; 以及图案化所述第一电极材料以形成第二电容器（220,720,1320,1625）的顶部电极（221,721,1221,1621），以形成所述第一电极的电极（212,712,1212,1612）电容器，并且限定电阻器（230,730,1330）。

7. 发明授权

US07666698B2 Method for forming and sealing a cavity for an integrated MEMS device 失效
标题翻译：用于形成和密封用于集成MEMS器件的空腔的方法
公开(公告)号：US07666698B2
公开(公告)日：2010-02-23
申请号：US11386147
申请日：2006-03-21
申请人： Peter Zurcher
发明人： Peter Zurcher
IPC分类号： H01L21/00 , H01L21/31 , H01L21/469
CPC分类号： B81C1/00253
摘要： A method is provided for constructing a microelectronic assembly. A semiconductor substrate having a MEMS device formed on a first portion thereof, a semiconductor device formed on a second portion thereof, and a build up layer having a first portion formed over the MEMS device and a second portion formed over the semiconductor device is provided. The first portion of the build up layer over the MEMS device is removed. A release body is formed adjacent to the MEMS device. A structural material is formed over the release body. An opening is formed in the structural material to expose the release body. The release body is removed through the opening to form a cavity between the MEMS device and the structural material. The opening in the structural material is sealed with a sealing material.
摘要翻译：提供了一种用于构建微电子组件的方法。一种半导体衬底，其具有形成在其第一部分上的MEMS器件，形成在其第二部分上的半导体器件，以及具有形成在MEMS器件上的第一部分和形成在半导体器件上的第二部分的堆积层。移除MEMS器件上的累积层的第一部分。释放体形成在与MEMS装置相邻的位置。在释放体上形成结构材料。在结构材料中形成开口以露出释放体。通过开口去除释放体，以在MEMS器件和结构材料之间形成空腔。结构材料中的开口用密封材料密封。

8. 发明授权

US06919244B1 Method of making a semiconductor device, and semiconductor device made thereby 有权
标题翻译：制造半导体器件的方法和由此制成的半导体器件
公开(公告)号：US06919244B1
公开(公告)日：2005-07-19
申请号：US10799554
申请日：2004-03-10
申请人： Thomas P. Remmel , Sriram Kalpat , Melvy F. Miller , Peter Zurcher
发明人： Thomas P. Remmel , Sriram Kalpat , Melvy F. Miller , Peter Zurcher
IPC分类号： H01L21/02 , H01L21/20 , H01L21/8242 , H01L27/06 , H01L27/108 , H01L29/00 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L27/0682 , H01L23/5223 , H01L23/5228 , H01L28/20 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要： A method of making a semiconductor device includes the steps of: providing a semiconductor substrate (110, 510, 1010, 1610) having a patterned interconnect layer (120, 520, 1020, 1620) formed thereon; depositing a first dielectric material (130, 530, 1030, 1630) over the interconnect layer; depositing a first electrode material (140, 540, 1040, 1640) over the first dielectric material; depositing a second dielectric material (150, 550, 1050, 1650) over the first electrode material; depositing a second electrode material (160, 560, 1060, 1660) over the second dielectric material; patterning the second electrode material to form a top electrode (211, 611, 1111, 1611) of a first capacitor (210, 710, 1310, 1615); and patterning the first electrode material to form a top electrode (221, 721, 1221, 1621) of a second capacitor (220, 720, 1320, 1625), to form an electrode (212, 712, 1212, 1612) of the first capacitor, and to define a resistor (230, 730, 1330).
摘要翻译：制造半导体器件的方法包括以下步骤：提供具有形成在其上的图案化互连层（120,520,1020,1620）的半导体衬底（110,510,1010,1610）在所述互连层上沉积第一介电材料（130,530,1030,1630）; 在所述第一电介质材料上沉积第一电极材料（140,540,1040,1640）; 在所述第一电极材料上沉积第二介电材料（150,550,1050,1650）; 在所述第二电介质材料上沉积第二电极材料（160,560,1060,1660）; 图案化第二电极材料以形成第一电容器（210,710,1310,1615）的顶部电极（211,611,1111,1611）; 以及图案化所述第一电极材料以形成第二电容器（220,720,1320,1625）的顶部电极（221,721,1221,1621），以形成所述第一电极的电极（212,712,1212,1612）电容器，并且限定电阻器（230,730,1330）。

9. 发明授权

US06870444B1 Electromechanical resonator and method of operating same 有权
标题翻译：机电谐振器及其操作方法
公开(公告)号：US06870444B1
公开(公告)日：2005-03-22
申请号：US10652406
申请日：2003-08-28
申请人： Peter Zurcher , Rashaunda Monique Henderson , Sergio Palma Pacheco
发明人： Peter Zurcher , Rashaunda Monique Henderson , Sergio Palma Pacheco
IPC分类号： H03H3/007 , H03H9/24 , H03H9/15 , B81B7/02
CPC分类号： H03H3/0077 , H03H9/02409 , H03H9/2405 , H03H2009/02496
摘要： An electromechanical resonator includes a substrate (150, 450), an anchor (110, 510, 810) coupled to the substrate, a beam (120, 620, 1020, 1120, 1220, 1420) coupled to the anchor and suspended over the substrate, and a drive electrode (130, 435, 630, 930, 933, 935, 1030, 1035, 1130, 1135, 1435) coupled to the substrate and separated from the beam by a gap (140, 445, 640, 1040, 1045, 1140, 1145, 1445). The beam has a first surface (321, 621, 1021, 1121), a second surface (322, 622), and a third surface (323, 623, 1023, 1123, 1223, 1423). The first surface defines a width and a height, the second surface defines the height and a length, and the third surface defines the length and the width. The width, height, and length are substantially mutually perpendicular, and the beam resonates substantially only in compression mode and substantially only along an axis defined by the length.
摘要翻译：机电谐振器包括基板（150,450），联接到基板的锚固件（110,510,810），耦合到锚固件并悬挂在基板上的梁（120,620,1020,1120,1220,1420），以及耦合到所述衬底并且通过间隙（140,445,640,1040,1045）从所述光束分离的驱动电极（130,435,630,930,933,935,1030,1035,1130,1135,1435），1140,1145,1445）。梁具有第一表面（321,621,1021,1121），第二表面（322,622）和第三表面（323,623,1023,1123,1223,1423）。第一表面限定宽度和高度，第二表面限定高度和长度，第三表面限定长度和宽度。宽度，高度和长度基本相互垂直，并且光束基本上仅在压缩模式下并且基本上仅沿着由长度限定的轴共振。

10. 发明申请

US20050046518A1 ELECTROMECHANICAL RESONATOR AND METHOD OF OPERATING SAME 有权
标题翻译：电动共振器及其操作方法
公开(公告)号：US20050046518A1
公开(公告)日：2005-03-03
申请号：US10652406
申请日：2003-08-28
申请人： Peter Zurcher , Rashaunda Henderson , Sergio Pacheco
发明人： Peter Zurcher , Rashaunda Henderson , Sergio Pacheco
IPC分类号： H03H3/007 , H03H9/24 , H03H9/15
CPC分类号： H03H3/0077 , H03H9/02409 , H03H9/2405 , H03H2009/02496
摘要： An electromechanical resonator includes a substrate (150, 450), an anchor (110, 510, 810) coupled to the substrate, a beam (120, 620, 1020, 1120, 1220, 1420) coupled to the anchor and suspended over the substrate, and a drive electrode (130, 435, 630, 930, 933, 935, 1030, 1035, 1130, 1135, 1435) coupled to the substrate and separated from the beam by a gap (140, 445, 640, 1040, 1045, 1140, 1145, 1445). The beam has a first surface (321, 621, 1021, 1121), a second surface (322, 622), and a third surface (323, 623, 1023, 1123, 1223, 1423). The first surface defines a width and a height, the second surface defines the height and a length, and the third surface defines the length and the width. The width, height, and length are substantially mutually perpendicular, and the beam resonates substantially only in compression mode and substantially only along an axis defined by the length.
摘要翻译：机电谐振器包括基板（150,450），联接到基板的锚固件（110,510,810），耦合到锚固件并悬挂在基板上的梁（120,620,1020,1120,1220,1420），以及耦合到所述衬底并且通过间隙（140,445,640,1040,1045）从所述光束分离的驱动电极（130,435,630,930,933,935,1030,1035,1130,1135,1435），1140,1145,1445）。梁具有第一表面（321,621,1021,1121），第二表面（322,622）和第三表面（323,623,1023,1123,1223,1423）。第一表面限定宽度和高度，第二表面限定高度和长度，第三表面限定长度和宽度。宽度，高度和长度基本相互垂直，并且光束基本上仅在压缩模式下并且基本上仅沿着由长度限定的轴共振。

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