专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07473953B2 Method for fabricating metallic bit-line contacts 有权
标题翻译：金属位线触点的制造方法
公开(公告)号：US07473953B2
公开(公告)日：2009-01-06
申请号：US11929215
申请日：2007-10-30
申请人： Ralf Staub , Jürgen Amon , Norbert Urbansky
发明人： Ralf Staub , Jürgen Amon , Norbert Urbansky
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L21/76808 , H01L21/28512 , H01L21/76807 , H01L21/76877 , H01L21/76895 , H01L21/76897 , H01L27/10829 , H01L27/10885 , H01L27/10888 , H01L27/10894 , Y10S257/905
摘要： A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor wafer, a contact hole is filled with a metal or a metal alloy. A liner layer may be introduced between the semiconductor substrate and the metal filling. The semiconductor substrate has a doped region in the contact hole.
摘要翻译：提供了一种存储单元及其形成方法。为了在半导体晶片上的动态存储单元的位线和选择晶体管之间进行接触，接触孔填充有金属或金属合金。可以在半导体衬底和金属填充物之间引入衬里层。半导体衬底在接触孔中具有掺杂区域。

2. 发明申请

US20120074573A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR MAKING SAME 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US20120074573A1
公开(公告)日：2012-03-29
申请号：US12892947
申请日：2010-09-29
申请人： Gerald DALLMANN , Heike ROSSLAU , Norbert URBANSKY , Scott WALLACE
发明人： Gerald DALLMANN , Heike ROSSLAU , Norbert URBANSKY , Scott WALLACE
IPC分类号： H01L23/532 , H01L21/768
CPC分类号： H01L23/53238 , H01L21/76843 , H01L21/7685 , H01L21/76867 , H01L21/76873 , H01L23/53223 , H01L23/53252 , H01L24/03 , H01L24/05 , H01L24/48 , H01L24/85 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0362 , H01L2224/04042 , H01L2224/0508 , H01L2224/05082 , H01L2224/051 , H01L2224/05147 , H01L2224/05558 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05666 , H01L2224/48 , H01L2224/85375 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： One or more embodiments relate to a method of forming a semiconductor device, comprising: forming a structure, the structure including at least a first element and a second element; and forming a passivation layer over the structure, the passivation layer including at least the first element and the second element, the first element and the second element of the passivation layer coming from the structure.
摘要翻译：一个或多个实施例涉及形成半导体器件的方法，包括：形成结构，所述结构至少包括第一元件和第二元件; 以及在所述结构上形成钝化层，所述钝化层至少包括所述第一元件和所述第二元件，所述钝化层的所述第一元件和所述第二元件来自所述结构。

3. 发明申请

US20080048229A1 METHOD FOR FABRICATING METALLIC BIT-LINE CONTACTS 有权
标题翻译：制造金属线对联系的方法
公开(公告)号：US20080048229A1
公开(公告)日：2008-02-28
申请号：US11929215
申请日：2007-10-30
申请人： Ralf Staub , Jurgen Amon , Norbert Urbansky
发明人： Ralf Staub , Jurgen Amon , Norbert Urbansky
IPC分类号： H01L27/108
CPC分类号： H01L21/76808 , H01L21/28512 , H01L21/76807 , H01L21/76877 , H01L21/76895 , H01L21/76897 , H01L27/10829 , H01L27/10885 , H01L27/10888 , H01L27/10894 , Y10S257/905
摘要： A memory cell and method of forming the same is provided. To make contact between a bit line and a select transistor of a dynamic memory unit on a semiconductor wafer, a contact hole is filled with a metal or a metal alloy. A liner layer may be introduced between the semiconductor substrate and the metal filling. The semiconductor substrate has a doped region in the contact hole.
摘要翻译：提供了一种存储单元及其形成方法。为了在半导体晶片上的动态存储单元的位线和选择晶体管之间进行接触，接触孔填充有金属或金属合金。可以在半导体衬底和金属填充物之间引入衬里层。半导体衬底在接触孔中具有掺杂区域。

4. 发明授权

US06365510B2 Method for fabricating a contact layer 有权
标题翻译：接触层的制造方法
公开(公告)号：US06365510B2
公开(公告)日：2002-04-02
申请号：US09811798
申请日：2001-03-19
申请人： Sven Schmidbauer , Norbert Urbansky
发明人： Sven Schmidbauer , Norbert Urbansky
IPC分类号： H01L214763
CPC分类号： H01L21/76855 , H01L21/76843 , Y10S438/909
摘要： A contact layer is used, for example, as a liner for the fabrication of electrical contacts in contact holes. The contact layer is fabricated in two steps, in a first step a first contact layer is deposited, in which only a small proportion of the particles to be sputtered is ionized. In a second sputtering step, a second contact layer is sputtered, in the course of whose fabrication a larger proportion of the particles to be sputtered is ionized. The procedure ensures that the first contact layer is disposed as a protective layer on the substrate by gentle sputtering before the second contact layer is sputtered.
摘要翻译：接触层例如用作在接触孔中制造电触头的衬垫。接触层以两个步骤制造，在第一步骤中沉积第一接触层，其中只有少部分被溅射的颗粒被电离。在第二溅射步骤中，溅射第二接触层，在其制造过程中，要溅射的较大比例的颗粒被电离。该过程确保在溅射第二接触层之前通过温和溅射将第一接触层设置在衬底上作为保护层。

5. 发明授权

US06274492B1 Process and device for production of metallic coatings on semiconductor structures 失效
标题翻译：在半导体结构上生产金属涂层的工艺和装置
公开(公告)号：US06274492B1
公开(公告)日：2001-08-14
申请号：US09194370
申请日：1999-01-03
申请人： Wolfgang Klimes , Christian Wenzel , Norbert Urbansky , Peter Siemroth , Thomas Shuelke , Bernd Schultrich
发明人： Wolfgang Klimes , Christian Wenzel , Norbert Urbansky , Peter Siemroth , Thomas Shuelke , Bernd Schultrich
IPC分类号： H01L21314
CPC分类号： H01L21/76843 , C23C14/046 , C23C14/325 , H01L21/76877
摘要： The invention relates to a process and a device for metallization of semiconductor structures, with which areas of the surface can be connected to be electrically conductive using strip conductors in one or a plurality of planes, and contacts between the strip conductors of different planes. The process for producing metallic coatings on semiconductor structures by depositing from a vapor phase under vacuum, in trenches produced for the strip conductors and holes for strip conductor connection in the substrate material such as SiO2 or other inorganic and organic materials is characterized in that a known per se pulsed vacuum-arc evaporator is used, a barrier layer being deposited on the surface of the trenches and holes of the substrates using the plasma of the evaporator and/or the trenches and holes being filled with low-impedance strip conductor material from a further plasma of said type of evaporator. The invention describes a device for carrying out the process which can be used, along with the device, to metal-coat trenches and holes with a high aspect ratio without hollow spaces.
摘要翻译：本发明涉及用于半导体结构金属化的方法和装置，其中可以使用一个或多个平面中的带状导体将该表面的区域连接成导电，以及不同平面的带状导体之间的接触。通过在真空下的气相沉积在用于带状导体的沟槽中形成半导体结构上的金属涂层的方法以及诸如SiO 2或其它无机和有机材料的衬底材料中的带状导体连接的孔的特征在于已知本身使用脉冲真空电弧蒸发器，使用蒸发器的等离子体和/或沟槽和孔填充低阻抗带状导体材料的方法，将阻挡层沉积在衬底的沟槽和孔的表面上，所述类型蒸发器的进一步等离子体。本发明描述了一种用于实施该方法的装置，该装置可以与该装置一起使用，以高纵横比的金属覆盖沟槽和孔而没有中空空间。

6. 发明授权

US08872341B2 Semiconductor structure having metal oxide or nirtride passivation layer on fill layer and method for making same 有权
标题翻译：在填充层上具有金属氧化物或氮化物钝化层的半导体结构及其制造方法
公开(公告)号：US08872341B2
公开(公告)日：2014-10-28
申请号：US12892947
申请日：2010-09-29
申请人： Gerald Dallmann , Heike Rosslau , Norbert Urbansky , Scott Wallace
发明人： Gerald Dallmann , Heike Rosslau , Norbert Urbansky , Scott Wallace
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L21/44 , H01L23/532 , H01L21/768 , H01L23/00
CPC分类号： H01L23/53238 , H01L21/76843 , H01L21/7685 , H01L21/76867 , H01L21/76873 , H01L23/53223 , H01L23/53252 , H01L24/03 , H01L24/05 , H01L24/48 , H01L24/85 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0362 , H01L2224/04042 , H01L2224/0508 , H01L2224/05082 , H01L2224/051 , H01L2224/05147 , H01L2224/05558 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05666 , H01L2224/48 , H01L2224/85375 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/14 , H01L2224/45099 , H01L2924/00
摘要： One or more embodiments relate to a method of forming a semiconductor device, comprising: forming a structure, the structure including at least a first element and a second element; and forming a passivation layer over the structure, the passivation layer including at least the first element and the second element, the first element and the second element of the passivation layer coming from the structure.
摘要翻译：一个或多个实施例涉及形成半导体器件的方法，包括：形成结构，所述结构至少包括第一元件和第二元件; 以及在所述结构上形成钝化层，所述钝化层至少包括所述第一元件和所述第二元件，所述钝化层的所述第一元件和所述第二元件来自所述结构。

7. 发明授权

US08835319B2 Protection layers for conductive pads and methods of formation thereof 有权
标题翻译：导电焊盘的保护层及其形成方法
公开(公告)号：US08835319B2
公开(公告)日：2014-09-16
申请号：US13410751
申请日：2012-03-02
申请人： Dirk Meinhold , Norbert Mais , Reimund Engl , Hans-Joerg Timme , Alfred Vater , Stephan Henneck , Norbert Urbansky
发明人： Dirk Meinhold , Norbert Mais , Reimund Engl , Hans-Joerg Timme , Alfred Vater , Stephan Henneck , Norbert Urbansky
IPC分类号： H01L23/488 , H01L21/283
CPC分类号： H01L23/564 , H01L21/7685 , H01L21/76852 , H01L23/53219 , H01L23/53228 , H01L23/53238 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/02166 , H01L2224/04042 , H01L2224/05624 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45664 , H01L2224/48463 , H01L2224/48624 , H01L2224/48824 , H01L2224/4911 , H01L2924/01015 , H01L2924/10253 , H01L2924/12042 , H01L2924/1301 , H01L2924/181 , H01L2924/00 , H01L2924/00014 , H01L2924/20752
摘要： In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line.
摘要翻译：在一个实施例中，形成半导体器件的方法包括在衬底上形成金属线，并在金属线的顶表面上沉积合金材料层。该方法还包括通过将合金材料层与金属线组合来形成保护层。

8. 发明申请

US20140015523A1 SENSOR DEVICE, A DETECTOR ARRANGEMENT AND A METHOD FOR DETECTING ARCING 审中-公开
标题翻译：传感器装置，检测器装置和检测电弧的方法
公开(公告)号：US20140015523A1
公开(公告)日：2014-01-16
申请号：US13545032
申请日：2012-07-10
申请人： Jan Rupf , Markus Fischer , Peter Brockhaus , Percy Heger , Norbert Urbansky
发明人： Jan Rupf , Markus Fischer , Peter Brockhaus , Percy Heger , Norbert Urbansky
IPC分类号： G01R33/02
CPC分类号： G01R19/0061 , G01R33/04
摘要： Detecting arcing events in a DC driven semiconductor tool is a challenging process. Various embodiments comprise dedicated sensor devices capable of detecting arcing events by observing the slope of voltage and/or current of a DC power supply line. Using the incorporated interfaces, the sensor could be connected to a computer system. Besides the detector arrangement the unit also provides a method and a corresponding computer program product. Furthermore a simple detection, the unit has the capability of separating the events into its severeness.
摘要翻译：在DC驱动的半导体工具中检测电弧事件是一个具有挑战性的过程。各种实施例包括能够通过观察直流电源线的电压和/或电流的斜率来检测电弧事件的专用传感器装置。使用结合的接口，传感器可以连接到计算机系统。除了检测器布置之外，该单元还提供了一种方法和相应的计算机程序产品。此外，一个简单的检测，该单位有能力将事件分离成其精神。

9. 发明申请

US20130228929A1 Protection Layers for Conductive Pads and Methods of Formation Thereof 有权
标题翻译：导电垫的保护层及其形成方法
公开(公告)号：US20130228929A1
公开(公告)日：2013-09-05
申请号：US13410751
申请日：2012-03-02
申请人： Dirk Meinhold , Norbert Mais , Reimund Engl , Hans-Joerg Timme , Alfred Vater , Stephan Henneck , Norbert Urbansky
发明人： Dirk Meinhold , Norbert Mais , Reimund Engl , Hans-Joerg Timme , Alfred Vater , Stephan Henneck , Norbert Urbansky
IPC分类号： H01L23/488 , H01L21/283
CPC分类号： H01L23/564 , H01L21/7685 , H01L21/76852 , H01L23/53219 , H01L23/53228 , H01L23/53238 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/02166 , H01L2224/04042 , H01L2224/05624 , H01L2224/45015 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45664 , H01L2224/48463 , H01L2224/48624 , H01L2224/48824 , H01L2224/4911 , H01L2924/01015 , H01L2924/10253 , H01L2924/12042 , H01L2924/1301 , H01L2924/181 , H01L2924/00 , H01L2924/00014 , H01L2924/20752
摘要： In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line.
摘要翻译：在一个实施例中，形成半导体器件的方法包括在衬底上形成金属线，并在金属线的顶表面上沉积合金材料层。该方法还包括通过将合金材料层与金属线组合来形成保护层。

10. 发明授权

US09064875B2 Semiconductor structure and method for making same 有权
标题翻译：半导体结构及其制造方法
公开(公告)号：US09064875B2
公开(公告)日：2015-06-23
申请号：US13300692
申请日：2011-11-21
申请人： Jakob Kriz , Norbert Urbansky
发明人： Jakob Kriz , Norbert Urbansky
IPC分类号： H01L21/4763 , H01L23/532 , H01L21/768 , H01L23/00
CPC分类号： H01L23/53223 , H01L21/76831 , H01L21/76834 , H01L21/76843 , H01L21/76856 , H01L21/76864 , H01L21/76873 , H01L21/76885 , H01L23/53238 , H01L23/53252 , H01L23/53295 , H01L24/03 , H01L24/05 , H01L2224/03462 , H01L2224/03848 , H01L2224/0391 , H01L2224/05557 , H01L2224/05567 , H01L2224/05573 , H01L2224/05647 , H01L2924/00014 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2224/05552
摘要： Embodiments relate to a method for making a semiconductor structure, the method comprising: forming a seed layer in direct contact with a dielectric material; forming a masking layer over the seed layer; patterning the masking layer to expose the seed layer; forming a fill layer over the exposed seed layer; and causing the seed layer to react with the dielectric layer to form a barrier layer between the fill layer and the dielectric layer.
摘要翻译：实施例涉及制造半导体结构的方法，所述方法包括：形成与电介质材料直接接触的晶种层; 在种子层上形成掩模层; 图案化掩模层以暴露种子层; 在所述暴露的种子层上形成填充层; 并使种子层与介电层反应，以在填充层和介电层之间形成阻挡层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式