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1. 发明授权

US06391676B1 Thermoelectric module and a method of fabricating the same 失效
标题翻译：热电模块及其制造方法
公开(公告)号：US06391676B1
公开(公告)日：2002-05-21
申请号：US09200972
申请日：1998-11-30
申请人： Michimasa Tsuzaki , Nobuteru Maekawa , Narimasa Iwamoto , Junji Imai , Hiroaki Okada , Teruaki Komatsu , Shinya Murase , Hiroyuki Inoue , Masayuki Sagawa , Yuri Sakai
发明人： Michimasa Tsuzaki , Nobuteru Maekawa , Narimasa Iwamoto , Junji Imai , Hiroaki Okada , Teruaki Komatsu , Shinya Murase , Hiroyuki Inoue , Masayuki Sagawa , Yuri Sakai
IPC分类号： H01L2100
CPC分类号： H01L35/325 , H01L35/32 , H01L2924/0002 , H01L2924/00
摘要： A thermoelectric module is capable of successfully reducing the heat stress for increased reliability. The module includes a plurality of thermoelectric chips of P-type and N-type arranged in a matrix between sets of first and second contacts to form a series electrical circuit. The chips are arranged to give at least three chip arrays each having a limited number of the chips. A first carrier is provided on one side of the chips to carry the first contacts and to include first bridges each integrally joining two adjacent first contacts to define first discrete couples for electrical connection of the chips in each chip array. The first carrier further includes at least two inter-array bridges which are solely responsible for electrical interconnection between the adjacent chip arrays. On the opposite side of the chips, there are formed a plurality of second bridges each integrally joining the two adjacent second contacts to give second discrete couples for electrical connection of the two adjacent chips in each of the chip arrays. Thus, the inter-array bridges are formed only on one side of the chips for interconnection of the first contacts between the adjacent chip arrays. Therefore, the heat stress applied to the end of the chip array where the two adjacent chip arrays are interconnected can be well relieved on the side of the second contacts in which the second discrete couples are kept totally isolated from each other.
摘要翻译：热电模块能够成功地降低热应力以提高可靠性。该模块包括在第一和第二触点组之间以矩阵形式布置的多个P型和N型热电芯片，以形成串联电路。芯片被布置成给出至少三个芯片阵列，每个芯片阵列具有有限数量的芯片。第一载体设置在芯片的一侧以承载第一触点并且包括每个一体地连接两个相邻的第一触点的第一桥，以限定用于每个芯片阵列中的芯片的电连接的第一离散耦合。第一载体还包括至少两个排列间桥，其单独负责相邻芯片阵列之间的电互连。在芯片的相对侧，形成多个第二桥，每个第二桥整体地连接两个相邻的第二触点，以给出第二离散耦合，用于电连接每个芯片阵列中的两个相邻的芯片。因此，阵列间桥仅形成在芯片的一侧，用于相邻芯片阵列之间的第一触点的互连。因此，施加到两个相邻芯片阵列相互连接的芯片阵列的端部的热应力可以在第二接触件的一侧彼此完全隔离的第二触头侧得到很好的缓解。

2. 发明授权

US5950067A Method of fabricating a thermoelectric module 失效
标题翻译：制造热电模块的方法
公开(公告)号：US5950067A
公开(公告)日：1999-09-07
申请号：US973095
申请日：1998-03-19
申请人： Nobuteru Maegawa , Hiroaki Okada , Michimasa Tsuzaki , Yuri Sakai , Katsuyoshi Shimoda , Teruaki Komatsu , Shinya Murase , Hiroyuki Inoue , Masayuki Sagawa
发明人： Nobuteru Maegawa , Hiroaki Okada , Michimasa Tsuzaki , Yuri Sakai , Katsuyoshi Shimoda , Teruaki Komatsu , Shinya Murase , Hiroyuki Inoue , Masayuki Sagawa
IPC分类号： H01L35/32 , H01L35/34 , H01L21/324
CPC分类号： H01L35/32 , H01L35/325 , H01L35/34 , Y10S257/93
摘要： A method of fabricating a thermoelectric module in which a plurality of thermoelectric chips are arranged in a matrix between first and second dielectric substrates and electrically connected in series so as to heat one of the substrates and cool the other substrate. Elongated thermoelectric bars of P-type and N-type to be cut into the chips are employed together with a first conductive plate having a plurality of first contacts arranged in a matrix pattern. Adjacent first contacts spaced along the row are interconnected by horizontal bridges. The method of the present invention comprises the steps of integrating the first conductive plate to the first substrate to support the first conductive plate thereby; placing a plurality of the bars of the P-type and N-type on the first contacts along the rows in such a manner that the P-type bars alternate with the N-type bars in a spaced relation along the column; bonding each bar on its one face to the first contacts; cutting each bar into the chips and cutting the horizontal bridges simultaneously to allocate the chips on the individual first contacts; placing a plurality of second contacts of a second substrate onto the chips to form a series electric circuit of the chips in combination with the first contacts, and bonding the second substrate supporting the second contacts to the first substrate.
摘要翻译： PCT No.PCT / JP97 / 01797 Sec。 371日期：1998年3月19日 102（e）1998年3月19日PCT PCT 1997年6月3日PCT公布。公开号WO97 / 45882 日期1997年12月4日一种制造热电模块的方法，其中多个热电芯片以矩阵形式布置在第一和第二电介质基板之间并串联电连接以加热其中一个基板并冷却另一个基板。将要切割成芯片的P型和N型的细长热电棒与具有以矩阵图案排列的多个第一触头的第一导电板一起使用。沿着行间隔的相邻的第一接触件通过水平桥互连。本发明的方法包括以下步骤：将第一导电板与第一基板集成，从而支撑第一导电板; 沿着行将P型和N型的多个条放置在第一触点上，使得P型条以与柱相隔的关系与N型条交替; 将其一个面上的每个条连接到第一触点; 将每个棒切割成芯片并同时切割水平桥，以将芯片分配在单独的第一触点上; 将第二基板的多个第二触点放置在芯片上以与第一触点组合形成芯片的串联电路，以及将支撑第二触点的第二基板接合到第一基板。

3. 发明授权

US5275878A Composite dielectric and printed-circuit use substrate utilizing the same 失效
标题翻译：复合电介质和印刷电路用基板
公开(公告)号：US5275878A
公开(公告)日：1994-01-04
申请号：US648872
申请日：1991-01-31
申请人： Seishiro Yamakawa , Michimasa Tsuzaki , Kiyotaka Komori , Satoshi Fujiki , Akiyoshi Nozue , Kazunobu Abe , Masashi Aoki
发明人： Seishiro Yamakawa , Michimasa Tsuzaki , Kiyotaka Komori , Satoshi Fujiki , Akiyoshi Nozue , Kazunobu Abe , Masashi Aoki
IPC分类号： C08K7/22 , C08L71/12 , H05K1/03 , H05K1/16 , C08F23/00
CPC分类号： H05K1/0373 , C08K7/22 , C08L71/123 , H05K1/162 , H05K2201/0116 , H05K2201/0209 , Y10T428/249953 , Y10T428/249955 , Y10T428/249975 , Y10T428/249987 , Y10T428/249991 , Y10T428/27
摘要： A composite dielectric is formed with a matrix synthetic resin and particulate porous, inorganic dielectric dispersed in the matrix synthetic resin. The dielectric constant of this composite dielectric can be thereby elevated effectively without enlarging the dissipation factor (tan .delta.) of the composite dielectric.
摘要翻译：复合电介质由矩阵合成树脂和分散在基体合成树脂中的颗粒状多孔无机电介质形成。因此，可以有效地提高复合电介质的介电常数，而不会增大复合电介质的耗散因数（tan（delta））。

4. 发明授权

US06400013B1 Thermoelectric module with interarray bridges 失效
标题翻译：带电桥的热电模块
公开(公告)号：US06400013B1
公开(公告)日：2002-06-04
申请号：US09709577
申请日：2000-11-13
申请人： Michimasa Tsuzaki , Nobuteru Maekawa , Narimasa Iwamoto , Junji Imai , Hiroaki Okada , Teruaki Komatsu , Shinya Murase , Hiroyuki Inoue , Masayuki Sagawa , Yuri Sakai
发明人： Michimasa Tsuzaki , Nobuteru Maekawa , Narimasa Iwamoto , Junji Imai , Hiroaki Okada , Teruaki Komatsu , Shinya Murase , Hiroyuki Inoue , Masayuki Sagawa , Yuri Sakai
IPC分类号： H01L2334
CPC分类号： H01L35/325 , H01L35/32 , H01L2924/0002 , H01L2924/00
摘要： A thermoelectric module is capable of successfully reducing the heat stress for increased reliability. The module includes a plurality of thermoelectric chips of P-type and N-type arranged in a matrix between sets of first and second contacts to form a series electrical circuit. The chips are arranged to give at least three chip arrays each having a limited number of the chips. A first carrier is provided on one side of the chips to carry the first contacts and to include first bridges each integrally joining two adjacent first contacts to define first discrete couples for electrical connection of the chips in each chip array. The first carrier further includes at least two inter-array bridges which are solely responsible for electrical interconnection between the adjacent chip arrays. On the opposite side of the chips, there are formed a plurality of second bridges each integrally joining the two adjacent second contacts to give second discrete couples for electrical connection of the two adjacent chips in each of the chip arrays. Thus, the inter-array bridges are formed only on one side of the chips for interconnection of the first contacts between the adjacent chip arrays. Therefore, the heat stress applied to the end of the chip array where the two adjacent chip arrays are interconnected can be well relieved on the side of the second contacts in which the second discrete couples are kept totally isolated from each other.
摘要翻译：热电模块能够成功地降低热应力以提高可靠性。该模块包括在第一和第二触点组之间以矩阵形式布置的多个P型和N型热电芯片，以形成串联电路。芯片被布置成给出至少三个芯片阵列，每个芯片阵列具有有限数量的芯片。第一载体设置在芯片的一侧以承载第一触点并且包括每个一体地连接两个相邻的第一触点的第一桥，以限定用于每个芯片阵列中的芯片的电连接的第一离散耦合。第一载体还包括至少两个排列间桥，其单独负责相邻芯片阵列之间的电互连。在芯片的相对侧，形成多个第二桥，每个第二桥整体地连接两个相邻的第二触点，以给出第二离散耦合，用于电连接每个芯片阵列中的两个相邻的芯片。因此，阵列间桥仅形成在芯片的一侧，用于相邻芯片阵列之间的第一触点的互连。因此，施加到两个相邻芯片阵列相互连接的芯片阵列的端部的热应力可以在第二接触件的一侧彼此完全隔离的第二触头侧得到很好的缓解。

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