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1. 发明授权

US07140188B2 Gas turbine engine with intake air flow control mechanism 有权
标题翻译：具有进气流量控制机构的燃气轮机
公开(公告)号：US07140188B2
公开(公告)日：2006-11-28
申请号：US10782793
申请日：2004-02-23
申请人： Yasufumi Hosokawa , Makoto Gouda , Masahiro Ogata
发明人： Yasufumi Hosokawa , Makoto Gouda , Masahiro Ogata
IPC分类号： F02C9/20
CPC分类号： F02C7/057 , F02C9/50 , F05D2270/08 , F23R3/26
摘要： A gas turbine engine includes: an air flow control system installed in an air intake path for introducing air to a compressor. The air intake path is located outside and upstream with respect to the compressor. The engine also includes intake air flow control means for controlling an intake air flow by operating the air flow control system according to a load of the engine so as to maintain an air-to-fuel ratio in the combustor within a proper range suited to suppress a discharge of an atmospheric pollutant.
摘要翻译：燃气涡轮发动机包括：空气流量控制系统，其安装在用于将空气引入压缩机的进气路径中。进气通道相对于压缩机位于外部和上游。发动机还包括进气流量控制装置，用于通过根据发动机的负载操作气流控制系统来控制进气流，从而将燃烧器中的空燃比保持在适于抑制的适当范围内排放大气污染物。

2. 发明授权

US06805219B2 Engine cover 失效
标题翻译：发动机盖
公开(公告)号：US06805219B2
公开(公告)日：2004-10-19
申请号：US10205207
申请日：2002-07-26
申请人： Zenichi Yasuda , Yutaka Ogasawara , Yoshikazu Hirose , Yasuo Sakakibara , Masahiro Ogata
发明人： Zenichi Yasuda , Yutaka Ogasawara , Yoshikazu Hirose , Yasuo Sakakibara , Masahiro Ogata
IPC分类号： F01N1100
CPC分类号： F02B77/13 , F02F7/006
摘要： An engine cover has a cover body having a through hole penetrating both sides of the cover body in an area opposed to a resonant space in which resonant sounds are generated. An opening of the through hole is covered with the sound absorbing member layer. Because a part of the resonant space is open, resonant sounds generated in the resonance space are decreased.
摘要翻译：发动机盖具有盖主体，该盖主体在与产生共鸣声的共振空间相对的区域中贯穿盖体的两侧。通孔的开口被吸音构件层覆盖。由于共振空间的一部分是开放的，共振空间中产生的共振声音减小。

3. 发明授权

US06210850B1 Carrier for electrophotographic developer and electrophotographic developer containing the same 有权
标题翻译：用于电子照相显影剂的载体和含有它的电子照相显影剂
公开(公告)号：US06210850B1
公开(公告)日：2001-04-03
申请号：US09477798
申请日：2000-01-05
申请人： Masahiro Ogata , Kazunori Takagi , Takao Sugiura , Yuji Yoshikawa , Masaaki Yamaya
发明人： Masahiro Ogata , Kazunori Takagi , Takao Sugiura , Yuji Yoshikawa , Masaaki Yamaya
IPC分类号： G03G9113
CPC分类号： G03G9/1135 , G03G9/1136
摘要： A resin-coated carrier for an electrophotographic developer which comprises a carrier core coated with an acryl-modified silicone resin the silicone resin of which has a methyl group and other organic groups, the molar ratio of the methyl group to the total organic groups inclusive of the methyl group [methyl group/(methyl group+other organic groups)]being 64 mol % or higher and lower than 70 mol %, and the acrylic resin to silicone resin weight ratio ranging from 2/8 to 4/6.
摘要翻译：一种用于电子照相显影剂的树脂涂覆载体，其包含涂覆有丙烯酸改性的有机硅树脂的载体芯，其硅树脂具有甲基和其它有机基团，甲基与总有机基团的摩尔比，包括甲基[甲基/（甲基+其他有机基）]为64摩尔％以上且低于70摩尔％，丙烯酸树脂与硅酮树脂的重量比为2/8〜4/6。

4. 发明授权

US5598373A Semiconductor memory system 失效
标题翻译：半导体存储器系统
公开(公告)号：US5598373A
公开(公告)日：1997-01-28
申请号：US476765
申请日：1995-06-07
申请人： Shoji Wada , Kanehide Kenmizaki , Masaya Muranaka , Masahiro Ogata , Hidetomo Aoyagi , Tetsuya Kitame , Masahiro Katayama , Shoji Kubono , Yukihide Suzuki , Makoto Morino , Sinichi Miyatake , Seiichi Shundo , Yoshihisa Koyama , Nobuhiko Ohno
发明人： Shoji Wada , Kanehide Kenmizaki , Masaya Muranaka , Masahiro Ogata , Hidetomo Aoyagi , Tetsuya Kitame , Masahiro Katayama , Shoji Kubono , Yukihide Suzuki , Makoto Morino , Sinichi Miyatake , Seiichi Shundo , Yoshihisa Koyama , Nobuhiko Ohno
IPC分类号： G06F12/16 , G11C29/00 , G11C29/02 , G11C29/44 , H01L21/82 , G11C7/00 , G11C8/00 , G11C11/34
CPC分类号： G11C29/80 , G11C29/02 , G11C29/44
摘要： A defect remedy LSI mounted on a memory module, comprising: an input interface portion for capturing address and control signals, the input interface portion being the same as that of a dynamic RAM; an input/output interface portion corresponding to a data bus of a memory device comprised of a plurality of dynamic random access memories; a memory circuit to which a chip address and an X defective address of any of the plurality of random access memories are electrically written, the memory circuit being substantially made nonvolatile; a redundancy remedy RAM portion composed of a static RAM wherein a word line is selected by a compare match signal between an X address signal and the defective address of the memory circuit, the X address signal and the defective address being captured via the input interface portion, and a column is selected by a Y address signal captured via the input interface portion; a selecting portion for connecting a data input/output bus of the redundancy remedy RAM portion to an input/output circuit corresponding to a defective chip address; a data input/output portion for selectively activating an input/output circuit to be connected to a data bus corresponding to a dynamic RAM found defective; and a mask portion for outputting a control signal for putting in a high-impedance state an output pin of the defective RAM in a read operation.
摘要翻译：安装在存储器模块上的缺陷补救LSI包括：用于捕获地址和控制信号的输入接口部分，所述输入接口部分与动态RAM的相同; 对应于由多个动态随机存取存储器构成的存储器件的数据总线的输入/输出接口部分; 存储器电路，其中电子地写入多个随机存取存储器中的任何一个的芯片地址和X缺陷地址，所述存储器电路基本上是非易失性的; 由静态RAM组成的冗余补救RAM部分，其中通过X地址信号和存储器电路的缺陷地址之间的比较匹配信号来选择字线，X地址信号和缺陷地址经由输入接口部分捕获并且通过经由输入接口部分捕获的Y地址信号来选择列; 选择部分，用于将冗余补救RAM部分的数据输入/输出总线连接到对应于有缺陷的芯片地址的输入/输出电路; 数据输入/输出部分，用于选择性地激活要连接到与发现有缺陷的动态RAM相对应的数据总线的输入/输出电路; 以及掩模部分，用于在读取操作中输出用于将缺陷RAM的输出引脚置于高阻抗状态的控制信号。

5. 发明授权

US5595850A Ferrite carrier for electrophotographic developer and developer containing the carrier 失效
标题翻译：含有载体的电子照相显影剂和显影剂的铁氧体载体
公开(公告)号：US5595850A
公开(公告)日：1997-01-21
申请号：US496023
申请日：1995-06-28
申请人： Toshio Honjo , Yuji Sato , Kanao Kayamoto , Masahiro Ogata , Hiromichi Kobayashi
发明人： Toshio Honjo , Yuji Sato , Kanao Kayamoto , Masahiro Ogata , Hiromichi Kobayashi
IPC分类号： C01G49/00 , G03G9/08 , G03G9/107 , G03G9/113 , H01F1/36
CPC分类号： G03G9/107 , G03G9/113
摘要： A ferrite carrier for electrophotographic developers which comprises a Mn-Mg ferrite having the general formula(MnO).sub.x (MgO).sub.y (Fe.sub.2 O.sub.3).sub.zwherein x+y+z=100 mol % and SrO is substituted for a part of MnO, MgO and/or Fe.sub.2 O.sub.3.
摘要翻译：一种用于电子照相显影剂的铁氧体载体，其包含具有通式（MnO）x（MgO）y（Fe 2 O 3）z）的Mn-Mg铁氧体，其中x + y + z = 100mol％，SrO代替一部分MnO，MgO 和/或Fe 2 O 3。

6. 发明授权

US5467315A Semiconductor memory device facilitated with plural self-refresh modes 失效
标题翻译：具有多个自刷新模式的半导体存储器件
公开(公告)号：US5467315A
公开(公告)日：1995-11-14
申请号：US234414
申请日：1994-04-28
申请人： Takeshi Kajimoto , Yutaka Shimbo , Katsuyuki Sato , Masahiro Ogata , Kanehide Kenmizaki , Shouji Kubono , Nobuo Kato , Kiichi Manita , Michitaro Kanamitsu
发明人： Takeshi Kajimoto , Yutaka Shimbo , Katsuyuki Sato , Masahiro Ogata , Kanehide Kenmizaki , Shouji Kubono , Nobuo Kato , Kiichi Manita , Michitaro Kanamitsu
IPC分类号： G01R31/26 , G01R31/28 , G11C11/401 , G11C11/403 , G11C11/406 , G11C11/407 , G11C11/408 , G11C11/409 , G11C11/4093 , G11C29/00 , G11C29/02 , G11C29/14 , G11C29/50 , H01L21/82 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , H03K3/037 , H03K19/096 , G11C7/00
CPC分类号： G11C29/027 , G11C11/406 , G11C11/4093 , G11C29/02 , G11C29/50 , G11C29/50012 , G11C29/50016 , G11C2029/5004
摘要： The semiconductor memory is facilitated with control circuitry for effecting plural self-refresh modes having respectively different refresh periods. The plural self-refresh modes are typified by a PS (pseudo) refresh mode which is applied when the memory is in the nonselected state for a comparatively long period of time, such as in the state in which memory backup is being facilitated, and by a VS (virtual) refresh mode in which the refreshing operation of the memory cells is effected intermittently during the intervals of memory accessings. The pseudo refresh mode has a longer refresh time period than the virtual refresh mode. The control circuitry also has counter circuits for the generating of refresh address signals in accordance with a first timing signal indicative of a pseudo refresh mode and a second timing signal indicative of a virtual refresh mode, the latter timing signal being a higher frequency signal. Such availability of plural self-refresh modes becomes particularly advantageous when considering consumption of the back-up power for maintaining the IC memory device versus stability of stored data. While the consumption of the back-up power for maintaining the device would be relatively lower under one of the self-refresh modes, namely, the PS (pseudo) refresh mode, the stability of data stored would, however, be greater under another self-refresh mode, namely, the VS (virtual) refresh mode.
摘要翻译：利用用于实现分别具有不同刷新周期的多个自刷新模式的控制电路来促进半导体存储器。多个自刷新模式以PS（伪）刷新模式为代表，当存储器处于非选择状态较长时间段时，例如在便于存储器备份的状态下，以及由在存储器访问的间隔期间间歇地执行存储器单元的刷新操作的VS（虚拟）刷新模式。伪刷新模式具有比虚拟刷新模式更长的刷新时间段。控制电路还具有用于根据指示伪刷新模式的第一定时信号和指示虚拟刷新模式的第二定时信号产生刷新地址信号的计数器电路，后一定时信号是较高频率信号。当考虑用于维持IC存储器件的备用电源与存储的数据的稳定性的消耗时，这种多重自刷新模式的可用性变得特别有利。虽然在自刷新模式之一（即PS）（伪）刷新模式下，用于维持设备的备份功率的消耗将相对较低，但是存储的数据的稳定性在另一个自身下将更大 - 刷新模式，即VS（虚拟）刷新模式。

7. 发明授权

US5436870A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US5436870A
公开(公告)日：1995-07-25
申请号：US283177
申请日：1994-08-03
申请人： Katsuyuki Sato , Miki Matsumoto , Sadayuki Ohkuma , Masahiro Ogata , Masahiro Yoshida
发明人： Katsuyuki Sato , Miki Matsumoto , Sadayuki Ohkuma , Masahiro Ogata , Masahiro Yoshida
IPC分类号： G11C29/00 , G11C7/10 , G11C7/18 , G11C8/10 , G11C11/401 , G11C29/04 , G11C11/40 , G11C13/00
CPC分类号： G11C7/18 , G11C7/1075 , G11C8/10
摘要： A multiport memory is provided which permits both random access and serial access. In order to reduce parasitic capacitance and improve operating speed, the serial input/output lines are each divided into two parts at their middle points. Sense amplifiers for the serial input/output lines are provided at upper and lower ends of the serial access memory elements to respectively amplify signals from the divided lines. Additional features are provided for improving both the serial and random operation. For example, during the serial read mode, the column selector for random access is simultaneously operated, and read data passing through the random access column selector is used as head data for the serial output operation to be delivered through the serial output circuit. Also, a serial selector can be controlled by a select signal formed by a Gray Code counter to improve operating speed. Further features included a redundancy system for relief of defective bits, the use of common bit lines to improve integration density and an improved refreshing arrangement to reduce power consumption during the refresh mode.
摘要翻译：提供多端口存储器，允许随机访问和串行访问。为了减少寄生电容并提高工作速度，串行输入/输出线在其中间点分为两部分。用于串行输入/输出线的读出放大器设置在串行存取存储器元件的上端和下端，以分别放大来自分割线的信号。提供了另外的功能来改进串行和随机操作。例如，在串行读取模式期间，用于随机存取的列选择器被同时操作，并且通过随机存取列选择器的读数据被用作通过串行输出电路传送的串行输出操作的头数据。此外，串行选择器可以由格雷码计数器形成的选择信号控制，以提高操作速度。其他特征包括用于缓解缺陷位的冗余系统，使用公共位线来提高集成密度以及改进的刷新布置以减少刷新模式期间的功耗。

8. 发明授权

US5115413A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US5115413A
公开(公告)日：1992-05-19
申请号：US496258
申请日：1990-03-20
申请人： Katsuyuki Sato , Miki Matsumoto , Sadayuki Ohkuma , Masahiro Ogata , Masahiro Yoshida
发明人： Katsuyuki Sato , Miki Matsumoto , Sadayuki Ohkuma , Masahiro Ogata , Masahiro Yoshida
IPC分类号： G11C29/00 , G11C7/10 , G11C7/18 , G11C8/10 , G11C11/401 , G11C29/04
CPC分类号： G11C7/18 , G11C7/1075 , G11C8/10
摘要： A multiport memory is provided which permits both random access and serial access. In order to reduce parasitic capacitance and improve operating speed, the serial input/output lines are each divided into two parts at their middle points. Sense amplifiers for the serial input/output lines are provided at upper and lower ends of the serial access memory elements to respectively amplify signals from the divided lines. Additional features are provided for improving both the serial and random operation. For example, during the serial read mode, the column selector for random access is simultaneously operated, and read data passing through the random access column selector is used as head data for the serial output operation to be delivered through the serial output circuit. Also, a serial selector can be controlled by a select signal formed by a Gray Code counter to improve operating speed. Further features include a redundancy system for relief of defective bits, the use of common bit lines to improve integration density and an improved refreshing arrangement to reduce power consumption during the refresh mode.
摘要翻译：提供多端口存储器，允许随机访问和串行访问。为了减少寄生电容并提高工作速度，串行输入/输出线在其中间点分为两部分。用于串行输入/输出线的读出放大器设置在串行存取存储器元件的上端和下端，以分别放大来自分割线的信号。提供了另外的功能来改进串行和随机操作。例如，在串行读取模式期间，用于随机存取的列选择器被同时操作，并且通过随机存取列选择器的读数据被用作通过串行输出电路传送的串行输出操作的头数据。此外，串行选择器可以由格雷码计数器形成的选择信号控制，以提高操作速度。其他特征包括用于缓解缺陷位的冗余系统，使用公共位线来提高集成密度，以及改进的刷新布置以减少刷新模式期间的功耗。

9. 发明授权

US4948087A Apparatus for pressure molding ceramic articles 失效
标题翻译：用于压制陶瓷制品的设备
公开(公告)号：US4948087A
公开(公告)日：1990-08-14
申请号：US313101
申请日：1989-02-21
申请人： Masanobu Hisaeda , Satoru Saitou , Masahiro Ogata
发明人： Masanobu Hisaeda , Satoru Saitou , Masahiro Ogata
IPC分类号： B28B1/26 , B28B13/06
CPC分类号： B28B13/06 , B28B1/266 , Y02P40/63
摘要： An apparatus for pressure molding ceramic articles includes at least one split mold including a core mold and an outer mold which are joined together for defining a pressure mold cavity therebetween. At least the bottom surface of the pressure mold cavity is inclined longitudinally and laterally, while the split mold per se is not inclined and the slip supply passage for supplying the slip into the pressure mold cavity communicates with the lowermost end of the pressure mold cavity. Due to the above construction, it is no longer necessary to incline the entirety of the split molds so that the frame structure of the apparatus can be vertically constructed on a horizontal floor which permits easy construction installation and adjustment and maintenance of the apparatus. Furthermore, since the bottom surface of the pressure mold cavity is inclined longitudinally and laterally, the surplus slip is discharged completely and smoothly, and does not remain in the pressure mold cavity. Accordingly, molded articles of high-quality and uniform thickness can be obtained.

10. 发明授权

US4839860A Semiconductor device having head only memory with differential amplifier 失效
标题翻译：半导体器件具有仅具有差分放大器的头部存储器
公开(公告)号：US4839860A
公开(公告)日：1989-06-13
申请号：US820523
申请日：1986-01-17
申请人： Takashi Shinoda , Kikuo Sakai , Masahiro Ogata , Hiroshi Kawamoto , Yoshiaki Onishi, deceased , by Junko Onishi, administratrix
发明人： Takashi Shinoda , Kikuo Sakai , Masahiro Ogata , Hiroshi Kawamoto , Yoshiaki Onishi, deceased , by Junko Onishi, administratrix
IPC分类号： G06F11/10 , G11C17/08
CPC分类号： G06F11/1008 , G06F11/1076 , G11C17/08
摘要： A semiconductor memory includes a dummy cell for forming a reference potential, a read-only memory cell, and a differential amplifier circuit which receives the reference potential formed by the dummy cell and a signal read out from the memory cell. The differential amplifier circuit is dynamically operated so that the semiconductor memory is made smaller in power consumption and size than conventional units. Moreover, in order to reduce the power consumption, the memory cell is brought into the nonselection state when a predetermined time has passed after being selected. In addition, the semiconductor memory is provided with a compensating circuit in order to make the value of the capacitance connected to a word line for transmitting a selecting signal to the memory cell and the value of the capacitance connected to a dummy word line for transmitting a selecting signal to the dummy cell substantially equal to each other. Thus, the changes in potential of both the selecting signals are made substantially equal to each other. Accordingly, it is possible to reduce malfunctions.
摘要翻译：半导体存储器包括用于形成参考电位的虚拟单元，只读存储单元和接收由虚设单元形成的参考电位的差分放大器电路和从存储单元读出的信号。差分放大器电路是动态操作的，使得半导体存储器的功耗和尺寸比常规单元小。此外，为了降低功耗，当选择了规定时间后，使存储单元变为非选择状态。此外，半导体存储器设置有补偿电路，以便连接到用于将选择信号发送到存储单元的字线的电容的值和连接到用于发送选择信号的虚拟字线的电容的值选择到虚拟单元的信号基本相等。因此，使选择信号的电位变化大致相等。因此，可以减少故障。

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