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1. 发明申请

US20080211563A1 Interface Circuit, Power Conversion Device, and Vehicle-Mounted Electric Machinery System 审中-公开
标题翻译：接口电路，电源转换装置和车载电机系统
公开(公告)号：US20080211563A1
公开(公告)日：2008-09-04
申请号：US12026616
申请日：2008-02-06
申请人： Masamitsu Inaba , Masahiro Iwamura , Satoru Shigeta
发明人： Masamitsu Inaba , Masahiro Iwamura , Satoru Shigeta
IPC分类号： H03L5/00
CPC分类号： H03K19/018 , F02N2011/0888 , H03K19/00376
摘要： An interface circuit capable of reliably transmitting signal even when there is fluctuation in the potential difference in reference potentials between circuits between which signal transmission is carried out. An interface circuit 4 is comprised of a level shift circuit 20 and a potential selection circuit 10 for selecting the potential of a power supply voltage for operating the level shift circuit 20. The potential selection circuit 10 selects one of a plurality of input potentials. The level shift circuit 20 receives a voltage pulse having a first potential as reference potential and outputs a voltage pulse having a second potential as reference potential. The level shift circuit 20 is operated on the basis of both a potential difference between the output potential from the potential selection circuit and the first potential and a potential difference between the selected potential and the second potential.
摘要翻译：即使在执行信号传输的电路之间的参考电位的电位差发生波动时，也能够可靠地发送信号的接口电路。接口电路4包括电平移位电路20和用于选择用于操作电平移位电路20的电源电压的电位的电位选择电路10。电位选择电路10选择多个输入电位之一。电平移位电路20接收具有第一电位的电压脉冲作为参考电位，并输出具有第二电位的电压脉冲作为参考电位。电平移位电路20基于来自电势选择电路的输出电位与第一电位之间的电位差和所选择的电位与第二电位之间的电位差两者来操作。

2. 发明申请

US20070182384A1 Vehicle Rotating Electric Machine 审中-公开
标题翻译：车辆旋转电机
公开(公告)号：US20070182384A1
公开(公告)日：2007-08-09
申请号：US11735819
申请日：2007-04-16
申请人： Shinji SHIRAKAWA , Mutsuhiro MORI , Masamitsu INABA , Tatsumi YAMAUCHI , Masahiro IWAMURA , Keiichi MASHINO , Masanori TSUCHIYA
发明人： Shinji SHIRAKAWA , Mutsuhiro MORI , Masamitsu INABA , Tatsumi YAMAUCHI , Masahiro IWAMURA , Keiichi MASHINO , Masanori TSUCHIYA
IPC分类号： H02P9/00
CPC分类号： F02N11/04 , B60K6/26 , B60K6/48 , B60W10/08 , F02D2041/2075 , F02N11/0814 , F02N11/0859 , F02N2011/0896 , H01L24/36 , H01L24/40 , H01L24/41 , H01L2224/32225 , H01L2224/40225 , H01L2224/4103 , H01L2924/00014 , H01L2924/13055 , H01L2924/13091 , H02J7/1492 , H02M7/003 , Y02T10/6221 , Y02T10/7005 , H01L2924/00 , H01L2224/37099
摘要： An inverter device is mounted on the rotating electric machine body The inverter device includes a module unit having a converter circuit and a control unit that controls the operation of the converter circuit. The converter circuit is configured by connecting a plurality of the following series circuits in parallel, each of the series circuits includes a P-channel MOS semiconductor device disposed at a higher potential side and an N-channel MOS semiconductor device disposed at a lower potential side which are electrically connected in series. An electric power that is supplied from a battery or an electric power that is supplied to the battery is controlled.
摘要翻译：逆变器装置安装在旋转电机体上。逆变器装置包括具有转换器电路的模块单元和控制转换器电路的操作的控制单元。转换器电路通过并联连接多个以下串联电路而构成，每个串联电路包括设置在较高电位侧的P沟道MOS半导体器件和设置在较低电位侧的N沟道MOS半导体器件它们串联电连接。从供给电池的电池或电力供给的电力被控制。

3. 发明申请

US20060192534A1 Generating apparatus and motor control apparatus 有权
标题翻译：发电机和电机控制装置
公开(公告)号：US20060192534A1
公开(公告)日：2006-08-31
申请号：US11356075
申请日：2006-02-17
申请人： Tatsumi Yamauchi , Shinji Shirakawa , Masahiro Iwamura , Masamitsu Inaba , Keiichi Mashino , Keiji Kunii
发明人： Tatsumi Yamauchi , Shinji Shirakawa , Masahiro Iwamura , Masamitsu Inaba , Keiichi Mashino , Keiji Kunii
IPC分类号： H02H7/06 , H02P9/00 , H02P11/00
CPC分类号： H02P9/102 , H02P6/005 , H02P9/107 , H02P2101/45
摘要： A generator having a field coil L, and an SW1 control circuit 2 for controlling field current flowing through the field coil L. When a generating operation of the generator is to be ended, a switch 1 SW1 is turned off to interrupt the field current flowing through the field coil L, and a switch 2 SW2 is turned off to allow the field current remaining the field coil L to the current path including a resistance element 1 with a resistance element capable of quickly attenuating the field current.
摘要翻译：具有励磁线圈L的发电机和用于控制流过励磁线圈L的励磁电流的SW 1控制电路2.当发电机的发电操作结束时，开关1 SW 1断开以中断励磁流过励磁线圈L的电流和开关2 SW 2截止，使励磁线圈L的励磁电流保持在包括具有能够快速衰减励磁电流的电阻元件的电阻元件1的电流路径。

4. 发明授权

US06675311B2 Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices 失效
标题翻译：数据处理系统从输入时钟产生时钟信号，锁相到输入时钟并用于时钟逻辑器件
公开(公告)号：US06675311B2
公开(公告)日：2004-01-06
申请号：US10002444
申请日：2001-12-06
申请人： Takashi Hotta , Kozaburo Kurita , Masahiro Iwamura , Hideo Maejima , Shigeya Tanaka , Tadaaki Bandoh , Yasuhiro Nakatsuka , Kazuo Kato , Sin-ichi Sinoda
发明人： Takashi Hotta , Kozaburo Kurita , Masahiro Iwamura , Hideo Maejima , Shigeya Tanaka , Tadaaki Bandoh , Yasuhiro Nakatsuka , Kazuo Kato , Sin-ichi Sinoda
IPC分类号： G06F104
CPC分类号： H03K5/1565 , G06F1/10 , H03L7/18
摘要： An information processing system having an original clock oscillator for delivering at least one original clock signal K defined as a first clock signal and a plurality of information processing units supplied with the original clock signal K, wherein each information processing unit comprises clock generating means for generating at least one second clock signal K1 which is phase-locked with the original clock signal K and which has a predetermined duty cycle and a logic device whose operation timing is controlled by the second clock signal K1, And the operation timing of an interface provided between at least one pair oflogic devices is synchronously controlled by the clock signal K1.
摘要翻译：一种具有原始时钟振荡器的信息处理系统，用于传送被定义为第一时钟信号的至少一个原始时钟信号K和提供有原始时钟信号K的多个信息处理单元，其中每个信息处理单元包括时钟发生装置，用于产生至少一个第二时钟信号K1与原始时钟信号K锁相并具有预定的占空比，以及由第二时钟信号K1控制其操作定时的逻辑器件。至少一对逻辑设备由时钟信号K1同步控制。

5. 发明授权

US06373731B1 Surge voltage suppressed power inverter using a voltage driven switching element 有权
标题翻译：使用电压驱动开关元件的浪涌电压抑制功率逆变器
公开(公告)号：US06373731B1
公开(公告)日：2002-04-16
申请号：US09654084
申请日：2000-09-01
申请人： Masahiro Iwamura , Hideki Miyazaki , Katsunori Suzuki , Junichi Sakano , Mutsuhiro Mori , Koji Tateno
发明人： Masahiro Iwamura , Hideki Miyazaki , Katsunori Suzuki , Junichi Sakano , Mutsuhiro Mori , Koji Tateno
IPC分类号： H02H7122
CPC分类号： H02M1/34 , H02M1/44 , H02M7/5387 , H02M2001/344
摘要： A power inverter using a voltage driven switching element, capable of suppressing an excessive surge voltage which is generated on high-speed switching of IGBTs or MOSFETs, and suppressing radio frequency oscillation after the suppression of the surge voltage. The power inverter includes a switching element rendering a power path conducting and non-conducting, and a speeding-up circuit of a feedback path in an active clamping circuit added to the switching element.
摘要翻译：一种使用电压驱动开关元件的电力逆变器，其能够抑制在IGBT或MOSFET的高速开关时产生的过大的浪涌电压，并且在抑制浪涌电压之后抑制射频振荡。功率逆变器包括形成导通和不导通的功率路径的开关元件，以及添加到开关元件的有源钳位电路中的反馈路径的加速电路。

6. 发明授权

US6088808A Low power consumption semiconductor integrated circuit device and microprocessor 失效
公开(公告)号：US6088808A
公开(公告)日：2000-07-11
申请号：US966972
申请日：1997-11-10
申请人： Masahiro Iwamura , Shigeya Tanaka , Hideo Maejima , Tetsuo Nakano
发明人： Masahiro Iwamura , Shigeya Tanaka , Hideo Maejima , Tetsuo Nakano
IPC分类号： G06F1/32 , B60Q1/44 , G06F1/26 , G06F9/34 , G06F9/38 , G06F15/78 , G11C11/417 , G11C11/419
CPC分类号： G06F1/3203 , G06F1/26 , G06F1/3287 , G06F15/7832 , G06F9/3822 , G06F9/3824 , G06F9/3836 , G06F9/3859 , G06F9/3869 , G06F9/3885 , G11C11/417 , G11C11/419 , Y02B60/1282 , Y02B60/32
摘要： In semiconductor integrated circuit device and microprocessor including at least one functional circuit block, the start of operation of the functional circuit block is detected prior to the start of operation, the functional circuit block for which the start of operation has been detected is activated prior to the start of operation and inactivated after the termination of operation.

7. 发明授权

US5600268A Gate circuit of combined field-effect and bipolar transistors 失效
标题翻译：组合场效应和双极晶体管的门电路
公开(公告)号：US5600268A
公开(公告)日：1997-02-04
申请号：US315594
申请日：1994-09-30
申请人： Ikuro Masuda , Kazuo Kato , Takao Sasayama , Yoji Nishio , Shigeo Kuboki , Masahiro Iwamura
发明人： Ikuro Masuda , Kazuo Kato , Takao Sasayama , Yoji Nishio , Shigeo Kuboki , Masahiro Iwamura
IPC分类号： H01L27/06 , H03K19/01 , H03K19/017 , H03K19/0944
CPC分类号： H03K19/09448 , H01L27/0623 , H03K19/01 , H03K19/01721
摘要： A high-speed operation, low-power consumption gate circuit structure comprises a combination of complementary field-effect-transistors and bipolar transistors and discharge means for discharging accumulated charges from these transistors when the field-effect-transistors and bipolar transistors are turned off.
摘要翻译：低功耗门电路结构包括互补场效应晶体管和双极型晶体管的组合，以及放电装置，用于当场效应晶体管和双极晶体管截止时从这些晶体管放电累积的电荷。

8. 发明授权

US5523713A Multiplex circuit arrangement for use with a semiconductor integrated circuit 失效
标题翻译：用于半导体集成电路的多路电路装置
公开(公告)号：US5523713A
公开(公告)日：1996-06-04
申请号：US464344
申请日：1995-06-05
申请人： Seigoh Yukutake , Yutaka Kobayashi , Takashi Akioka , Masahiro Iwamura
发明人： Seigoh Yukutake , Yutaka Kobayashi , Takashi Akioka , Masahiro Iwamura
IPC分类号： H03F3/72 , H03K17/62
CPC分类号： H03F3/72 , H03K17/6264 , H03F2203/7203
摘要： A multiplex circuit is disclosed in which a plurality of bipolar transistors are combined and in which the respective base terminals thereof are used as inputs, thereby to construct an emitter follower type multiplex circuit. In such an emitter follower type multiplex circuit, the multiplexing function of non-selection/selection is effected by controlling the base potential of the respective bipolar transistors by providing a MOS transistor between each base and a high potential of the power source through a resistor and a current drawing circuit. In accordance with such a scheme, when a selection of one input signal is made, the bipolar transistor corresponding thereto is permitted to turn ON on the basis of an input signal supplied to the base terminal thereof. The bipolar transistors corresponding to the non-selection input signals are maintained OFF, through activating the current drawing circuits associated therewith, irrespective of the potential levels of the incoming input signals supplied to the base terminals thereof. In the emitter follower type multiplex circuit, a constant current source is also provided between the commonly connected emitters of the bipolar transistors and the power source of low potential. The multiplex arrangement effected can be of the collector dot type multiplex circuit. Such multiplex circuits are used with a semiconductor integrated circuit such as a memory circuit.
摘要翻译：公开了一种多路复用电路，其中组合了多个双极晶体管，并且将其各自的基极端子用作输入，从而构成射极跟随器型多路复用电路。在这种射极跟踪器型多路复用电路中，通过在每个基极之间设置MOS晶体管和通过电阻器的电源的高电位之间来控制各个双极型晶体管的基极电位来实现非选择/选择的多路复用功能，电流绘制电路。根据这种方案，当进行一个输入信号的选择时，与其相对应的双极晶体管被允许基于提供给其基极的输入信号而导通。与非选择输入信号相对应的双极晶体管通过激活与其相关的电流绘制电路而保持关闭，而不管提供给其基极的输入信号的电位电平如何。在射极跟踪器型多路复用电路中，在双极晶体管的共同连接的发射极和低电位的电源之间也设置恒流源。所实现的复用布置可以是集电极点型多路复用电路。这种多路复用电路与诸如存储电路的半导体集成电路一起使用。

9. 发明授权

US5495183A Level conversion circuitry for a semiconductor integrated circuit 失效
标题翻译：半导体集成电路的电平转换电路
公开(公告)号：US5495183A
公开(公告)日：1996-02-27
申请号：US440335
申请日：1995-05-12
申请人： Yukio Suzuki , Ikuro Masuda , Masahiro Iwamura , Shinji Kadono , Akira Urragami , Masayoshi Yoshimura , Toshiaki Matsubara
发明人： Yukio Suzuki , Ikuro Masuda , Masahiro Iwamura , Shinji Kadono , Akira Urragami , Masayoshi Yoshimura , Toshiaki Matsubara
IPC分类号： H03K19/0175 , H03K19/018 , H03K19/094 , H03K19/0944 , H03K19/177
CPC分类号： H03K19/1778 , H03K19/017518 , H03K19/01806 , H03K19/09429 , H03K19/09448 , H03K19/17784 , H03K19/17792
摘要： In an input level converter for TTL--CMOS level conversion (or other conversion to CMOS) for an internal logic block operating with CMOS levels, an output transistor for executing the charge or discharge of the output capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the input level converter can be lessened. Similarly, in an output level converter for CMOS--TTL level conversion (or other conversion from CMOS) for the internal logic block operating with the CMOS levels, an output transistor for executing the charge or discharge of the output load capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the output level converter can also be lessened.
摘要翻译：在用于CMOS电平工作的内部逻辑块的TTL-CMOS电平转换（或其他转换为CMOS）的输入电平转换器中，用于执行其输出电容的充电或放电的输出晶体管由双极晶体管形成。因此，可以减小输入电平转换器的传播延迟时间及其电容依赖性。类似地，在用于CMOS电平操作的内部逻辑块的用于CMOS-TTL电平转换（或来自CMOS的其它转换）的输出电平转换器中，用于执行其输出负载电容的充电或放电的输出晶体管由双极晶体管。因此，也可以减小输出电平转换器的传播延迟时间及其电容依赖性。

10. 发明授权

US5457790A Low power consumption semiconductor integrated circuit device and microprocessor 失效
公开(公告)号：US5457790A
公开(公告)日：1995-10-10
申请号：US136990
申请日：1993-10-18
申请人： Masahiro Iwamura , Shigeya Tanaka , Hideo Maejima , Tetsuo Nakano
发明人： Masahiro Iwamura , Shigeya Tanaka , Hideo Maejima , Tetsuo Nakano
IPC分类号： G06F1/32 , B60Q1/44 , G06F1/26 , G06F9/34 , G06F9/38 , G06F15/78 , G11C11/417 , G11C11/419
CPC分类号： G06F1/3203 , G06F1/26 , G06F1/3287 , G06F15/7832 , G06F9/3822 , G06F9/3824 , G06F9/3836 , G06F9/3859 , G06F9/3869 , G06F9/3885 , G11C11/417 , G11C11/419 , Y02B60/1282 , Y02B60/32
摘要： In semiconductor integrated circuit device and microprocessor including at least one functional circuit block, the start of operation of the functional circuit block is detected prior to the start of operation, the functional circuit block for which the start of operation has been detected is activated prior to the start of operation and inactivated after the termination of operation.

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