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1. 发明申请

US20080048866A1 Communications System and Method with A/D Converter 失效
标题翻译：具有A / D转换器的通信系统和方法
公开(公告)号：US20080048866A1
公开(公告)日：2008-02-28
申请号：US11855788
申请日：2007-09-14
申请人： Scott Hahn , Mark Van Horn
发明人： Scott Hahn , Mark Van Horn
IPC分类号： G08B13/14
CPC分类号： G01D9/005 , G06K17/00 , G06K19/0717 , G06K19/0723
摘要： A communications system includes a radio frequency identification device including an integrated circuit having a single die including a microprocessor, a receiver coupled to the microprocessor, and a backscatter transmitter coupled to the microprocessor, the integrated circuit having a digital input, and the receiver being configured to receive wireless communications from a remote interrogator; and an analog to digital converter external of the single die and having a digital output coupled to the digital input of the integrated circuit, and having an analog input configured to be coupled to an analog measuring device, wherein the radio frequency identification device is configured to transmit a signal indicative of the analog input using the backscatter transmitter. A communications method includes coupling an analog to digital converter to a radio frequency identification device.
摘要翻译：通信系统包括射频识别装置，其包括集成电路，该集成电路具有包括微处理器的单个管芯，耦合到微处理器的接收器和耦合到微处理器的后向散射发射器，该集成电路具有数字输入端，接收器被配置从远程询问器接收无线通信; 以及单芯片外部的模数转换器，并且具有耦合到集成电路的数字输入的数字输出，并且具有被配置为耦合到模拟测量装置的模拟输入，其中射频识别装置被配置为使用反向散射发射器发射指示模拟输入的信号。通信方法包括将模数转换器耦合到射频识别装置。

2. 发明申请

US20060043987A1 Methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer 失效
标题翻译：使用网络分析仪测量电气元件上的I / O引脚的寄生电容和电感的方法
公开(公告)号：US20060043987A1
公开(公告)日：2006-03-02
申请号：US11269047
申请日：2005-11-07
申请人： Mark Van Horn , Richard Hedden , David Cuthbert , Aaron Schoenfeld
发明人： Mark Van Horn , Richard Hedden , David Cuthbert , Aaron Schoenfeld
IPC分类号： G01R31/02
CPC分类号： G01R31/04 , G01R1/0408 , G01R1/06772 , G01R27/2617 , G01R31/2896 , H01L24/73 , H01L2224/32013 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48253 , H01L2224/4847 , H01L2224/73265 , H01L2924/01087 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： Methods are provided for measuring the potential for mutual coupling in an integrated circuit package of any type or configuration using a network analyzer in conjunction with a coaxial test probe. Simple, low-cost test fixturing and methods of testing may be used to measure the parasitic capacitance and inductance of one or more I/O leads of an integrated circuit package, the measured parasitic capacitances and inductances providing an indication of the susceptibility of the integrated circuit package to mutual coupling between electrical leads of the package or between an electrical lead and other components of the integrated circuit package.
摘要翻译：提供了用于使用网络分析仪与同轴测试探针一起测量任何类型或配置的集成电路封装中的互耦合的可能性的方法。简单，低成本的测试夹具和测试方法可用于测量集成电路封装的一个或多个I / O引线的寄生电容和电感，所测量的寄生电容和电感提供了集成电路的易感性指示电路封装以在封装的电引线之间或电引线和集成电路封装的其它部件之间相互耦合。

3. 发明申请

US20050078007A1 Communications system and method with A/D converter 失效
标题翻译：具有A / D转换器的通信系统和方法
公开(公告)号：US20050078007A1
公开(公告)日：2005-04-14
申请号：US10893112
申请日：2004-07-16
申请人： Scott Hahn , Mark Van Horn
发明人： Scott Hahn , Mark Van Horn
IPC分类号： G06K17/00 , G06K19/07 , G08B13/14
CPC分类号： G01D9/005 , G06K17/00 , G06K19/0717 , G06K19/0723
摘要： A communications system includes a radio frequency identification device including an integrated circuit having a single die including a microprocessor, a receiver coupled to the microprocessor, and a backscatter transmitter coupled to the microprocessor, the integrated circuit having a digital input, and the receiver being configured to receive wireless communications from a remote interrogator; and an analog to digital converter external of the single die and having a digital output coupled to the digital input of the integrated circuit, and having an analog input configured to be coupled to an analog measuring device, wherein the radio frequency identification device is configured to transmit a signal indicative of the analog input using the backscatter transmitter. A communications method includes coupling an analog to digital converter to a radio frequency identification device.
摘要翻译：通信系统包括射频识别装置，其包括集成电路，该集成电路具有包括微处理器的单个管芯，耦合到微处理器的接收器和耦合到微处理器的后向散射发射器，该集成电路具有数字输入端，接收器被配置从远程询问器接收无线通信; 以及单芯片外部的模数转换器，并且具有耦合到集成电路的数字输入的数字输出，并且具有被配置为耦合到模拟测量装置的模拟输入，其中射频识别装置被配置为使用反向散射发射器发射指示模拟输入的信号。通信方法包括将模数转换器耦合到射频识别装置。

4. 发明授权

US5384547A Apparatus and method for attenuating a multicarrier input signal of a linear device 失效
标题翻译：用于衰减线性装置的多载波输入信号的装置和方法
公开(公告)号：US5384547A
公开(公告)日：1995-01-24
申请号：US100806
申请日：1993-08-02
申请人： Charles N. Lynk, Jr. , Mark Van Horn
发明人： Charles N. Lynk, Jr. , Mark Van Horn
IPC分类号： H03G3/20 , H03G3/30 , H04L27/26
CPC分类号： H03G3/3078 , H03G3/3036 , H04L27/2601 , H04L27/2624
摘要： The apparatus first measures the peak power of a multichannel signal, or representation thereof. The peak power is compared with one or more peak power threshold values. If the measured peak power exceeds a threshold value, the multichannel signal is attenuated prior to being processed by the linear power amplifier.
摘要翻译：该装置首先测量多声道信号的峰值功率或其表示。将峰值功率与一个或多个峰值功率阈值进行比较。如果测量的峰值功率超过阈值，则在由线性功率放大器处理之前，多通道信号被衰减。

5. 发明申请

US20050161801A1 Apparatus and methods for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer 失效
公开(公告)号：US20050161801A1
公开(公告)日：2005-07-28
申请号：US11083591
申请日：2005-03-18
申请人： Mark Van Horn , Richard Hedden , David Cuthbert , Aaron Schoenfeld
发明人： Mark Van Horn , Richard Hedden , David Cuthbert , Aaron Schoenfeld
IPC分类号： G01R1/04 , G01R27/26 , H01L23/52
CPC分类号： G01R31/04 , G01R1/0408 , G01R1/06772 , G01R27/2617 , G01R31/2896 , H01L24/73 , H01L2224/32013 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48253 , H01L2224/4847 , H01L2224/73265 , H01L2924/01087 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： Apparatus and methods are provided for measuring the potential for mutual coupling in an integrated circuit package of any type or configuration using a network analyzer in conjunction with a coaxial test probe. Simple, low-cost test fixturing and methods of testing may be used to measure the parasitic capacitance and inductance of one or more I/O leads of an integrated circuit package, the measured parasitic capacitances and inductances providing an indication of the susceptibility of the integrated circuit package to mutual coupling between electrical leads of the package or between an electrical lead and other components of the integrated circuit package.

6. 发明申请

US20050024068A1 Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer 失效
标题翻译：使用网络分析仪测量电气元件上的I / O引脚的寄生电容和电感的装置
公开(公告)号：US20050024068A1
公开(公告)日：2005-02-03
申请号：US10925337
申请日：2004-08-23
申请人： Mark Van Horn , Richard Hedden , David Cuthbert , Aaron Schoenfeld
发明人： Mark Van Horn , Richard Hedden , David Cuthbert , Aaron Schoenfeld
IPC分类号： G01R1/04 , G01R27/26 , H01L29/40
CPC分类号： G01R31/04 , G01R1/0408 , G01R1/06772 , G01R27/2617 , G01R31/2896 , H01L24/73 , H01L2224/32013 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48253 , H01L2224/4847 , H01L2224/73265 , H01L2924/01087 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/30107 , H01L2924/3011 , H01L2924/00012 , H01L2924/00 , H01L2924/00014
摘要： Apparatus and methods for measuring the potential for mutual coupling in an integrated circuit package of any type or configuration using a network analyzer in conjunction with a coaxial test probe. Simple, low-cost test fixturing and methods of testing may be used to measure the parasitic capacitance and inductance of one or more I/O leads of an integrated circuit package, the measured parasitic capacitances and inductances providing an indication of the susceptibility of the integrated circuit package to mutual coupling between electrical leads of the package or between an electrical lead and other components of the integrated circuit package.
摘要翻译：使用网络分析仪结合同轴测试探针测量任何类型或配置的集成电路封装中的互耦合电位的装置和方法。简单，低成本的测试夹具和测试方法可用于测量集成电路封装的一个或多个I / O引线的寄生电容和电感，所测量的寄生电容和电感提供了集成电路的易感性指示电路封装以在封装的电引线之间或电引线和集成电路封装的其它部件之间相互耦合。

7. 发明授权

US5689272A Method and system for producing antenna element signals for varying an antenna array pattern 失效
标题翻译：用于产生用于改变天线阵列图案的天线元件信号的方法和系统
公开(公告)号：US5689272A
公开(公告)日：1997-11-18
申请号：US681772
申请日：1996-07-29
申请人： Robert Mark Harrison , Mark Van Horn , Walter Joseph Rozanski, Jr.
发明人： Robert Mark Harrison , Mark Van Horn , Walter Joseph Rozanski, Jr.
IPC分类号： H01Q3/22 , H01Q3/26 , H01Q3/40 , H01Q25/00 , H01Q3/24
CPC分类号： H01Q3/26 , H01Q25/00 , H01Q3/22 , H01Q3/40
摘要： In a method and system for producing a plurality of antenna element signals that produce a selected antenna array pattern, first (56) and second (58) input signals are coupled to first (82) and second (84) amplifiers, respectively. The amplitude of said first input signal is modified (68) according to a first factor to produce a first modified signal, and the amplitude of said second input signal is modified (66) according to a second factor to produce a second modified signal. The first input signal is combined (48) with the second modified signal to produce a first combined signal, and the second input signal is combined (50) with the first modified signal to produce a second combined signal. Thereafter, the first combined signal and the second combined signal are amplified using first (82) and second (84) amplifiers, respectively. Next, the amplified signals are transformed with a transform matrix (96) to produce the plurality of antenna element signals.
摘要翻译：在产生选择的天线阵列图案的多个天线元件信号的方法和系统中，第一（56）和第二（58）输入信号分别耦合到第一（82）和第二（84）放大器。所述第一输入信号的幅度根据第一因素被修改（68）以产生第一修改信号，并且根据第二因素修改所述第二输入信号的幅度（66）以产生第二修改信号。第一输入信号与第二修改信号组合（48）以产生第一组合信号，并且第二输入信号与第一修改信号组合（50）以产生第二组合信号。此后，第一组合信号和第二组合信号分别使用第一（82）和第二（84）放大器放大。接下来，用变换矩阵（96）变换放大的信号，以产生多个天线元件信号。

8. 发明授权

US07113761B2 RF power device with on-chip digital control and optical interface 有权
标题翻译：射频功率器件具有片上数字控制和光接口
公开(公告)号：US07113761B2
公开(公告)日：2006-09-26
申请号：US10680836
申请日：2003-10-07
申请人： Richard S. Bickham , Joseph Schultz , Dale Anderson , Mark Van Horn
发明人： Richard S. Bickham , Joseph Schultz , Dale Anderson , Mark Van Horn
IPC分类号： H04B1/28
CPC分类号： H04B10/801
摘要： RF power device module (500) having an RF power device chip (206) which integrates an RF power device (208) with at least one of DC detector circuits (201, 202), RF detector circuits (203, 204), and thermal detector circuit (235) which cooperate with optical emitter/detector components (213) that supports a bi-directional optical link (210) made through free space with diagnostic processing and control circuits implemented on a separate chip (214) mounted within the same enclosure (205). The bi-directional optical link (210) enables interpretation of detection signals (227) received from the RF power device chip (206) and the feed back of default or other management and control signals (229) sent back to the RF power device chip (206) in response to the detected and analyzed conditions. The RF power device module (500) can be used in RF power transistors, such used in a base station, or mobile or portable transmitters, used in telecommunications, or in RF power amplifiers and instrumentation amplifiers in general.
摘要翻译： RF功率器件模块（500）具有RF功率器件芯片（206），其将RF功率器件（208）与DC检测器电路（201,202），RF检测器电路（203,204）和热检测器电路（235），其与支持通过自由空间制成的双向光学链路（210）的光发射器/检测器部件（213）配合，诊断处理和控制电路实现在安装在同一外壳内的单独芯片（214）上（205）。双向光链路（210）使得能够解释从RF功率器件芯片（206）接收的检测信号（227）以及发送回RF功率器件芯片的默认或其他管理和控制信号（229）的反馈（206）响应于检测和分析的条件。 RF功率器件模块（500）可用于RF功率晶体管，例如在通信中使用的基站或移动或便携式发射机中，或通常用于RF功率放大器和仪表放大器中。

9. 发明授权

US06177944B1 Two phase rendering for computer graphics 有权
标题翻译：计算机图形的两相渲染
公开(公告)号：US06177944B1
公开(公告)日：2001-01-23
申请号：US09156934
申请日：1998-09-18
申请人： Mark Christopher Fowler , Kirk Steffen Haskell , Robert Spencer Horton , Thomas Yu-Kiu Kwok , Steve Mastrianni , Chandrasekhar Narayanaswami , Bengt-Olaf Schneider , Mark van Horn , James Lewis van Welzen
发明人： Mark Christopher Fowler , Kirk Steffen Haskell , Robert Spencer Horton , Thomas Yu-Kiu Kwok , Steve Mastrianni , Chandrasekhar Narayanaswami , Bengt-Olaf Schneider , Mark van Horn , James Lewis van Welzen
IPC分类号： G06F1500
CPC分类号： G06T15/005
摘要： A method and apparatus for a computer graphics rendering system which slices the traditional geometry pipeline into two phases to improve overall graphics system utilization is described. The graphics system consists of a host processor and a graphics adapter. The host creates work items and feeds them to the graphics adapter. In the two phase method, the first phase computes the clipping status and immediately returns this status information, before completion of the actual clipping, to the application running on the host processor to minimize stalling the host processor and hence the application. The second phase performs the rest of the work necessary to draw the objects on the screen. The advantage of two phase method is that the host processor minimizes its wait (but only for model/view transformation and clipping status determination) for a return status from the graphics adapter for the current work item and gets to create the next work item from the application sooner.
摘要翻译：描述了一种用于计算机图形绘制系统的方法和装置，其将传统几何管线分成两个阶段以提高整体图形系统的利用率。图形系统由主机处理器和图形适配器组成。主机创建工作项并将其馈送到图形适配器。在两相方法中，第一阶段计算削波状态，并且在完成实际削波之前立即将该状态信息返回到在主机处理器上运行的应用，以最小化主机处理器和因此应用的停顿。第二阶段执行在屏幕上绘制对象所需的其余工作。两相方法的优点是主机处理器最小化其等待（但仅用于模型/视图转换和裁剪状态确定），用于从当前工作项的图形适配器返回状态，并从下一个工作项中创建申请更早

10. 发明授权

US6052129A Method and apparatus for deferred clipping of polygons 失效
标题翻译：多边形延迟剪切的方法和装置
公开(公告)号：US6052129A
公开(公告)日：2000-04-18
申请号：US942078
申请日：1997-10-01
申请人： Mark Christopher Fowler , Kirk Steffen Haskell , Robert Spencer Horton , Thomas Yu-Kiu Kwok , Chandrasekhar Narayanaswami , Bengt-Olaf Schneider , Mark Van Horn , James Lewis van Welzen
发明人： Mark Christopher Fowler , Kirk Steffen Haskell , Robert Spencer Horton , Thomas Yu-Kiu Kwok , Chandrasekhar Narayanaswami , Bengt-Olaf Schneider , Mark Van Horn , James Lewis van Welzen
IPC分类号： G06T15/30
CPC分类号： G06T15/30
摘要： While executing the standard graphics processing steps, problem polygons (i.e., those outside of a defined clip volume) are buffered for later processing, while the standard graphics processing continues, without the need for periodically reformatting data and performing clipping. After either a predefined number of polygons have been stored at the buffer location, or at such time as a change in the rendering state occurs, the buffered polygons are clipped.
摘要翻译：在执行标准图形处理步骤时，在标准图形处理继续进行的同时，不需要周期性重新格式化数据并进行裁剪，因此缓冲问题多边形（即，定义的剪辑卷之外的那些）被稍后处理。在预定义数量的多边形已经存储在缓冲器位置之后，或者在呈现状态改变的时候，缓冲的多边形被剪切。

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